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047ea784 PM |
1 | #ifndef _ASM_POWERPC_PCI_BRIDGE_H |
2 | #define _ASM_POWERPC_PCI_BRIDGE_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
047ea784 PM |
4 | |
5 | #ifndef CONFIG_PPC64 | |
6 | #include <asm-ppc/pci-bridge.h> | |
7 | #else | |
1da177e4 LT |
8 | |
9 | #include <linux/pci.h> | |
76f9f87f | 10 | #include <linux/list.h> |
1da177e4 LT |
11 | |
12 | /* | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License | |
15 | * as published by the Free Software Foundation; either version | |
16 | * 2 of the License, or (at your option) any later version. | |
17 | */ | |
18 | ||
19 | /* | |
20 | * Structure of a PCI controller (host bridge) | |
21 | */ | |
22 | struct pci_controller { | |
23 | struct pci_bus *bus; | |
24 | char is_dynamic; | |
357518fa | 25 | int node; |
1da177e4 LT |
26 | void *arch_data; |
27 | struct list_head list_node; | |
803d4573 | 28 | struct device *parent; |
1da177e4 LT |
29 | |
30 | int first_busno; | |
31 | int last_busno; | |
32 | ||
33 | void __iomem *io_base_virt; | |
34 | unsigned long io_base_phys; | |
35 | ||
36 | /* Some machines have a non 1:1 mapping of | |
37 | * the PCI memory space in the CPU bus space | |
38 | */ | |
39 | unsigned long pci_mem_offset; | |
40 | unsigned long pci_io_size; | |
41 | ||
42 | struct pci_ops *ops; | |
43 | volatile unsigned int __iomem *cfg_addr; | |
17a6392d | 44 | volatile void __iomem *cfg_data; |
1da177e4 LT |
45 | |
46 | /* Currently, we limit ourselves to 1 IO range and 3 mem | |
47 | * ranges since the common pci_bus structure can't handle more | |
48 | */ | |
49 | struct resource io_resource; | |
50 | struct resource mem_resources[3]; | |
51 | int global_number; | |
52 | int local_number; | |
53 | unsigned long buid; | |
54 | unsigned long dma_window_base_cur; | |
55 | unsigned long dma_window_size; | |
56 | }; | |
57 | ||
1635317f PM |
58 | /* |
59 | * PCI stuff, for nodes representing PCI devices, pointed to | |
60 | * by device_node->data. | |
61 | */ | |
62 | struct pci_controller; | |
63 | struct iommu_table; | |
64 | ||
65 | struct pci_dn { | |
7684b40c LV |
66 | int busno; /* pci bus number */ |
67 | int bussubno; /* pci subordinate bus number */ | |
68 | int devfn; /* pci device and function number */ | |
69 | int class_code; /* pci device class */ | |
b5166cc2 BH |
70 | |
71 | #ifdef CONFIG_PPC_PSERIES | |
1635317f PM |
72 | int eeh_mode; /* See eeh.h for possible EEH_MODEs */ |
73 | int eeh_config_addr; | |
25e591f6 | 74 | int eeh_pe_config_addr; /* new-style partition endpoint address */ |
1635317f PM |
75 | int eeh_check_count; /* # times driver ignored error */ |
76 | int eeh_freeze_count; /* # times this device froze up. */ | |
b5166cc2 | 77 | #endif |
1635317f PM |
78 | int pci_ext_config_space; /* for pci devices */ |
79 | struct pci_controller *phb; /* for pci devices */ | |
80 | struct iommu_table *iommu_table; /* for phb's or bridges */ | |
81 | struct pci_dev *pcidev; /* back-pointer to the pci device */ | |
82 | struct device_node *node; /* back-pointer to the device_node */ | |
83 | u32 config_space[16]; /* saved PCI config space */ | |
84 | }; | |
85 | ||
86 | /* Get the pointer to a device_node's pci_dn */ | |
87 | #define PCI_DN(dn) ((struct pci_dn *) (dn)->data) | |
88 | ||
1da177e4 LT |
89 | struct device_node *fetch_dev_dn(struct pci_dev *dev); |
90 | ||
1635317f PM |
91 | /* Get a device_node from a pci_dev. This code must be fast except |
92 | * in the case where the sysdata is incorrect and needs to be fixed | |
93 | * up (this will only happen once). | |
94 | * In this case the sysdata will have been inherited from a PCI host | |
95 | * bridge or a PCI-PCI bridge further up the tree, so it will point | |
96 | * to a valid struct pci_dn, just not the one we want. | |
1da177e4 LT |
97 | */ |
98 | static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev) | |
99 | { | |
100 | struct device_node *dn = dev->sysdata; | |
1635317f | 101 | struct pci_dn *pdn = dn->data; |
1da177e4 | 102 | |
1635317f | 103 | if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number) |
1da177e4 | 104 | return dn; /* fast path. sysdata is good */ |
1635317f | 105 | return fetch_dev_dn(dev); |
1da177e4 LT |
106 | } |
107 | ||
40ef8cbc PM |
108 | static inline int pci_device_from_OF_node(struct device_node *np, |
109 | u8 *bus, u8 *devfn) | |
110 | { | |
111 | if (!PCI_DN(np)) | |
112 | return -ENODEV; | |
113 | *bus = PCI_DN(np)->busno; | |
114 | *devfn = PCI_DN(np)->devfn; | |
115 | return 0; | |
116 | } | |
117 | ||
1da177e4 LT |
118 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
119 | { | |
120 | if (bus->self) | |
121 | return pci_device_to_OF_node(bus->self); | |
122 | else | |
123 | return bus->sysdata; /* Must be root bus (PHB) */ | |
124 | } | |
125 | ||
2bf6a8fa LV |
126 | /** Find the bus corresponding to the indicated device node */ |
127 | struct pci_bus * pcibios_find_pci_bus(struct device_node *dn); | |
128 | ||
1da177e4 | 129 | extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, |
f7abbc19 | 130 | struct device_node *dev, int primary); |
1da177e4 | 131 | |
2bf6a8fa LV |
132 | /** Remove all of the PCI devices under this bus */ |
133 | void pcibios_remove_pci_devices(struct pci_bus *bus); | |
134 | ||
135 | /** Discover new pci devices under this bus, and add them */ | |
136 | void pcibios_add_pci_devices(struct pci_bus * bus); | |
31087d7d | 137 | void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus); |
2bf6a8fa | 138 | |
1da177e4 LT |
139 | extern int pcibios_remove_root_bus(struct pci_controller *phb); |
140 | ||
1da177e4 LT |
141 | static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) |
142 | { | |
143 | struct device_node *busdn = bus->sysdata; | |
144 | ||
145 | BUG_ON(busdn == NULL); | |
1635317f | 146 | return PCI_DN(busdn)->phb; |
1da177e4 LT |
147 | } |
148 | ||
463ce0e1 BH |
149 | extern struct pci_controller* |
150 | pci_find_hose_for_OF_device(struct device_node* node); | |
151 | ||
b5166cc2 BH |
152 | extern struct pci_controller * |
153 | pcibios_alloc_controller(struct device_node *dev); | |
154 | extern void pcibios_free_controller(struct pci_controller *phb); | |
155 | ||
d2dd482b | 156 | #ifdef CONFIG_PCI |
f2c4583a | 157 | extern unsigned long pci_address_to_pio(phys_addr_t address); |
d2dd482b | 158 | #else |
f2c4583a | 159 | static inline unsigned long pci_address_to_pio(phys_addr_t address) |
d2dd482b | 160 | { |
f2c4583a | 161 | return (unsigned long)-1; |
d2dd482b BH |
162 | } |
163 | #endif | |
164 | ||
4267292b PM |
165 | /* Return values for ppc_md.pci_probe_mode function */ |
166 | #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ | |
167 | #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ | |
168 | #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ | |
169 | ||
357518fa AB |
170 | #ifdef CONFIG_NUMA |
171 | #define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE)) | |
172 | #else | |
173 | #define PHB_SET_NODE(PHB, NODE) ((PHB)->node = -1) | |
174 | #endif | |
175 | ||
047ea784 | 176 | #endif /* CONFIG_PPC64 */ |
88ced031 | 177 | #endif /* __KERNEL__ */ |
1da177e4 | 178 | #endif |