projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #ifndef __PPC_PCI_H |
| 2 | #define __PPC_PCI_H | |
| 3 | #ifdef __KERNEL__ | |
| 4 | ||
| 5 | #include <linux/types.h> | |
| 6 | #include <linux/slab.h> | |
| 7 | #include <linux/string.h> | |
| 8 | #include <linux/mm.h> | |
| 9 | #include <asm/scatterlist.h> | |
| 10 | #include <asm/io.h> | |
| 11 | #include <asm/pci-bridge.h> | |
| 12 | #include <asm-generic/pci-dma-compat.h> | |
| 13 | ||
| 14 | struct pci_dev; | |
| 15 | ||
| 16 | /* Values for the `which' argument to sys_pciconfig_iobase syscall. */ | |
| 17 | #define IOBASE_BRIDGE_NUMBER 0 | |
| 18 | #define IOBASE_MEMORY 1 | |
| 19 | #define IOBASE_IO 2 | |
| 20 | #define IOBASE_ISA_IO 3 | |
| 21 | #define IOBASE_ISA_MEM 4 | |
| 22 | ||
| 23 | /* | |
| 24 | * Set this to 1 if you want the kernel to re-assign all PCI | |
| 25 | * bus numbers | |
| 26 | */ | |
| 27 | extern int pci_assign_all_busses; | |
| 28 | ||
| 29 | #define pcibios_assign_all_busses() (pci_assign_all_busses) | |
| 30 | #define pcibios_scan_all_fns(a, b) 0 | |
| 31 | ||
| 32 | #define PCIBIOS_MIN_IO 0x1000 | |
| 33 | #define PCIBIOS_MIN_MEM 0x10000000 | |
| 34 | ||
| 35 | extern inline void pcibios_set_master(struct pci_dev *dev) | |
| 36 | { | |
| 37 | /* No special bus mastering setup handling */ | |
| 38 | } | |
| 39 | ||
| 40 | extern inline void pcibios_penalize_isa_irq(int irq) | |
| 41 | { | |
| 42 | /* We don't do dynamic PCI IRQ allocation */ | |
| 43 | } | |
| 44 | ||
| 45 | extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res); | |
| 46 | ||
| 47 | /* | |
| 48 | * The PCI bus bridge can translate addresses issued by the processor(s) | |
| 49 | * into a different address on the PCI bus. On 32-bit cpus, we assume | |
| 50 | * this mapping is 1-1, but on 64-bit systems it often isn't. | |
| 51 | * | |
| 52 | * Obsolete ! Drivers should now use pci_resource_to_bus | |
| 53 | */ | |
| 54 | extern unsigned long phys_to_bus(unsigned long pa); | |
| 55 | extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr); | |
| 56 | extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr); | |
| 57 | ||
| 58 | /* The PCI address space does equal the physical memory | |
| 59 | * address space. The networking and block device layers use | |
| 60 | * this boolean for bounce buffer decisions. | |
| 61 | */ | |
| 62 | #define PCI_DMA_BUS_IS_PHYS (1) | |
| 63 | ||
| 64 | /* pci_unmap_{page,single} is a nop so... */ | |
| 65 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | |
| 66 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | |
| 67 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | |
| 68 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | |
| 69 | #define pci_unmap_len(PTR, LEN_NAME) (0) | |
| 70 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | |
| 71 | ||
| 72 | /* | |
| 73 | * At present there are very few 32-bit PPC machines that can have | |
| 74 | * memory above the 4GB point, and we don't support that. | |
| 75 | */ | |
| 76 | #define pci_dac_dma_supported(pci_dev, mask) (0) | |
| 77 | ||
| 78 | /* Return the index of the PCI controller for device PDEV. */ | |
| 79 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index | |
| 80 | ||
| 81 | /* Set the name of the bus as it appears in /proc/bus/pci */ | |
| 82 | static inline int pci_proc_domain(struct pci_bus *bus) | |
| 83 | { | |
| 84 | return 0; | |
| 85 | } | |
| 86 | ||
| 87 | /* Map a range of PCI memory or I/O space for a device into user space */ | |
| 88 | int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, | |
| 89 | enum pci_mmap_state mmap_state, int write_combine); | |
| 90 | ||
| 91 | /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ | |
| 92 | #define HAVE_PCI_MMAP 1 | |
| 93 | ||
| 94 | extern void | |
| 95 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | |
| 96 | struct resource *res); | |
| 97 | ||
| 98 | extern void pcibios_add_platform_entries(struct pci_dev *dev); | |
| 99 | ||
| 100 | struct file; | |
| 101 | extern pgprot_t pci_phys_mem_access_prot(struct file *file, | |
| 102 | unsigned long offset, | |
| 103 | unsigned long size, | |
| 104 | pgprot_t prot); | |
| 105 | ||
| 2311b1f2 ME |
106 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER |
| 107 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
| 108 | const struct resource *rsrc, | |
| 109 | u64 *start, u64 *end); | |
| 110 | ||
| 111 | ||
| 1da177e4 LT |
112 | #endif /* __KERNEL__ */ |
| 113 | ||
| 114 | #endif /* __PPC_PCI_H */ |