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1 | #ifndef _PPC64_PACA_H |
2 | #define _PPC64_PACA_H | |
3 | ||
4 | /* | |
5 | * include/asm-ppc64/paca.h | |
6 | * | |
7 | * This control block defines the PACA which defines the processor | |
8 | * specific data for each logical processor on the system. | |
9 | * There are some pointers defined that are utilized by PLIC. | |
10 | * | |
11 | * C 2001 PPC 64 Team, IBM Corp | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License | |
15 | * as published by the Free Software Foundation; either version | |
16 | * 2 of the License, or (at your option) any later version. | |
17 | */ | |
18 | ||
19 | #include <linux/config.h> | |
20 | #include <asm/types.h> | |
21 | #include <asm/lppaca.h> | |
22 | #include <asm/iSeries/ItLpRegSave.h> | |
23 | #include <asm/mmu.h> | |
24 | ||
25 | register struct paca_struct *local_paca asm("r13"); | |
26 | #define get_paca() local_paca | |
27 | ||
28 | struct task_struct; | |
29 | struct ItLpQueue; | |
30 | ||
31 | /* | |
32 | * Defines the layout of the paca. | |
33 | * | |
34 | * This structure is not directly accessed by firmware or the service | |
35 | * processor except for the first two pointers that point to the | |
36 | * lppaca area and the ItLpRegSave area for this CPU. Both the | |
37 | * lppaca and ItLpRegSave objects are currently contained within the | |
38 | * PACA but they do not need to be. | |
39 | */ | |
40 | struct paca_struct { | |
41 | /* | |
42 | * Because hw_cpu_id, unlike other paca fields, is accessed | |
43 | * routinely from other CPUs (from the IRQ code), we stick to | |
44 | * read-only (after boot) fields in the first cacheline to | |
45 | * avoid cacheline bouncing. | |
46 | */ | |
47 | ||
48 | /* | |
49 | * MAGIC: These first two pointers can't be moved - they're | |
50 | * accessed by the firmware | |
51 | */ | |
52 | struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ | |
53 | struct ItLpRegSave *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ | |
54 | ||
55 | /* | |
56 | * MAGIC: the spinlock functions in arch/ppc64/lib/locks.c | |
57 | * load lock_token and paca_index with a single lwz | |
58 | * instruction. They must travel together and be properly | |
59 | * aligned. | |
60 | */ | |
61 | u16 lock_token; /* Constant 0x8000, used in locks */ | |
62 | u16 paca_index; /* Logical processor number */ | |
63 | ||
64 | u32 default_decr; /* Default decrementer value */ | |
65 | struct ItLpQueue *lpqueue_ptr; /* LpQueue handled by this CPU */ | |
66 | u64 kernel_toc; /* Kernel TOC address */ | |
67 | u64 stab_real; /* Absolute address of segment table */ | |
68 | u64 stab_addr; /* Virtual address of segment table */ | |
69 | void *emergency_sp; /* pointer to emergency stack */ | |
70 | s16 hw_cpu_id; /* Physical processor number */ | |
71 | u8 cpu_start; /* At startup, processor spins until */ | |
72 | /* this becomes non-zero. */ | |
73 | ||
74 | /* | |
75 | * Now, starting in cacheline 2, the exception save areas | |
76 | */ | |
77 | u64 exgen[8] __attribute__((aligned(0x80))); /* used for most interrupts/exceptions */ | |
78 | u64 exmc[8]; /* used for machine checks */ | |
79 | u64 exslb[8]; /* used for SLB/segment table misses | |
80 | * on the linear mapping */ | |
81 | mm_context_t context; | |
82 | u16 slb_cache[SLB_CACHE_ENTRIES]; | |
83 | u16 slb_cache_ptr; | |
84 | ||
85 | /* | |
86 | * then miscellaneous read-write fields | |
87 | */ | |
88 | struct task_struct *__current; /* Pointer to current */ | |
89 | u64 kstack; /* Saved Kernel stack addr */ | |
90 | u64 stab_rr; /* stab/slb round-robin counter */ | |
91 | u64 next_jiffy_update_tb; /* TB value for next jiffy update */ | |
92 | u64 saved_r1; /* r1 save for RTAS calls */ | |
93 | u64 saved_msr; /* MSR saved here by enter_rtas */ | |
94 | u32 lpevent_count; /* lpevents processed */ | |
95 | u8 proc_enabled; /* irq soft-enable flag */ | |
96 | ||
97 | /* not yet used */ | |
98 | u64 exdsi[8]; /* used for linear mapping hash table misses */ | |
99 | ||
100 | /* | |
101 | * iSeries structure which the hypervisor knows about - | |
102 | * this structure should not cross a page boundary. | |
103 | * The vpa_init/register_vpa call is now known to fail if the | |
104 | * lppaca structure crosses a page boundary. | |
105 | * The lppaca is also used on POWER5 pSeries boxes. | |
106 | * The lppaca is 640 bytes long, and cannot readily change | |
107 | * since the hypervisor knows its layout, so a 1kB | |
108 | * alignment will suffice to ensure that it doesn't | |
109 | * cross a page boundary. | |
110 | */ | |
111 | struct lppaca lppaca __attribute__((__aligned__(0x400))); | |
112 | #ifdef CONFIG_PPC_ISERIES | |
113 | struct ItLpRegSave reg_save; | |
114 | #endif | |
115 | }; | |
116 | ||
117 | extern struct paca_struct paca[]; | |
118 | ||
119 | #endif /* _PPC64_PACA_H */ |