[deliverable/linux.git] / include / asm-ppc64 / page.h

#ifndef _PPC64_PAGE_H
#define _PPC64_PAGE_H

/*
 * Copyright (C) 2001 PPC64 Team, IBM Corp
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/config.h>
#include <asm/asm-compat.h>

/*
 * We support either 4k or 64k software page size. When using 64k pages
 * however, wether we are really supporting 64k pages in HW or not is
 * irrelevant to those definitions. We always define HW_PAGE_SHIFT to 12
 * as use of 64k pages remains a linux kernel specific, every notion of
 * page number shared with the firmware, TCEs, iommu, etc... still assumes
 * a page size of 4096.
 */
#ifdef CONFIG_PPC_64K_PAGES
#define PAGE_SHIFT		16
#else
#define PAGE_SHIFT		12
#endif

#define PAGE_SIZE		(ASM_CONST(1) << PAGE_SHIFT)
#define PAGE_MASK		(~(PAGE_SIZE-1))

/* HW_PAGE_SHIFT is always 4k pages */
#define HW_PAGE_SHIFT		12
#define HW_PAGE_SIZE		(ASM_CONST(1) << HW_PAGE_SHIFT)
#define HW_PAGE_MASK		(~(HW_PAGE_SIZE-1))

/* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
 * HW_PAGE_SHIFT, that is 4k pages
 */
#define PAGE_FACTOR		(PAGE_SHIFT - HW_PAGE_SHIFT)

/* Segment size */
#define SID_SHIFT       	28
#define SID_MASK        	0xfffffffffUL
#define ESID_MASK		0xfffffffff0000000UL
#define GET_ESID(x)     	(((x) >> SID_SHIFT) & SID_MASK)

/* Large pages size */

#ifndef __ASSEMBLY__
extern unsigned int HPAGE_SHIFT;
#define HPAGE_SIZE		((1UL) << HPAGE_SHIFT)
#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
#endif /* __ASSEMBLY__ */

#ifdef CONFIG_HUGETLB_PAGE


#define HTLB_AREA_SHIFT		40
#define HTLB_AREA_SIZE		(1UL << HTLB_AREA_SHIFT)
#define GET_HTLB_AREA(x)	((x) >> HTLB_AREA_SHIFT)

#define LOW_ESID_MASK(addr, len)    (((1U << (GET_ESID(addr+len-1)+1)) \
	   	                      - (1U << GET_ESID(addr))) & 0xffff)
#define HTLB_AREA_MASK(addr, len)   (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
	   	                      - (1U << GET_HTLB_AREA(addr))) & 0xffff)

#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
#define ARCH_HAS_SETCLEAR_HUGE_PTE

#define touches_hugepage_low_range(mm, addr, len) \
	(LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
#define touches_hugepage_high_range(mm, addr, len) \
	(HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)

#define __within_hugepage_low_range(addr, len, segmask) \
	((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
#define within_hugepage_low_range(addr, len) \
	__within_hugepage_low_range((addr), (len), \
				    current->mm->context.low_htlb_areas)
#define __within_hugepage_high_range(addr, len, zonemask) \
	((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))
#define within_hugepage_high_range(addr, len) \
	__within_hugepage_high_range((addr), (len), \
				    current->mm->context.high_htlb_areas)

#define is_hugepage_only_range(mm, addr, len) \
	(touches_hugepage_high_range((mm), (addr), (len)) || \
	  touches_hugepage_low_range((mm), (addr), (len)))
#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA

#define in_hugepage_area(context, addr) \
	(cpu_has_feature(CPU_FTR_16M_PAGE) && \
	 ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \
	   ( ((addr) < 0x100000000L) && \
	     ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )

#else /* !CONFIG_HUGETLB_PAGE */

#define in_hugepage_area(mm, addr)	0

#endif /* !CONFIG_HUGETLB_PAGE */

/* align addr on a size boundary - adjust address up/down if needed */
#define _ALIGN_UP(addr,size)	(((addr)+((size)-1))&(~((size)-1)))
#define _ALIGN_DOWN(addr,size)	((addr)&(~((size)-1)))

/* align addr on a size boundary - adjust address up if needed */
#define _ALIGN(addr,size)     _ALIGN_UP(addr,size)

/* to align the pointer to the (next) page boundary */
#define PAGE_ALIGN(addr)	_ALIGN(addr, PAGE_SIZE)

#ifdef __KERNEL__
#ifndef __ASSEMBLY__
#include <asm/cache.h>

#undef STRICT_MM_TYPECHECKS

#define REGION_SIZE   4UL
#define REGION_SHIFT  60UL
#define REGION_MASK   (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)

static __inline__ void clear_page(void *addr)
{
	unsigned long lines, line_size;

	line_size = ppc64_caches.dline_size;
	lines = ppc64_caches.dlines_per_page;

	__asm__ __volatile__(
	"mtctr  	%1	# clear_page\n\
1:      dcbz  	0,%0\n\
	add	%0,%0,%3\n\
	bdnz+	1b"
        : "=r" (addr)
        : "r" (lines), "0" (addr), "r" (line_size)
	: "ctr", "memory");
}

extern void copy_4K_page(void *to, void *from);

#ifdef CONFIG_PPC_64K_PAGES
static inline void copy_page(void *to, void *from)
{
	unsigned int i;
	for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
		copy_4K_page(to, from);
		to += 4096;
		from += 4096;
	}
}
#else /* CONFIG_PPC_64K_PAGES */
static inline void copy_page(void *to, void *from)
{
	copy_4K_page(to, from);
}
#endif /* CONFIG_PPC_64K_PAGES */

struct page;
extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *p);

#ifdef STRICT_MM_TYPECHECKS
/*
 * These are used to make use of C type-checking.  
 * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
 */

/* PTE level */
typedef struct { unsigned long pte; } pte_t;
#define pte_val(x)	((x).pte)
#define __pte(x)	((pte_t) { (x) })

/* 64k pages additionally define a bigger "real PTE" type that gathers
 * the "second half" part of the PTE for pseudo 64k pages
 */
#ifdef CONFIG_PPC_64K_PAGES
typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
#else
typedef struct { pte_t pte; } real_pte_t;
#endif

/* PMD level */
typedef struct { unsigned long pmd; } pmd_t;
#define pmd_val(x)	((x).pmd)
#define __pmd(x)	((pmd_t) { (x) })

/* PUD level exusts only on 4k pages */
#ifndef CONFIG_PPC_64K_PAGES
typedef struct { unsigned long pud; } pud_t;
#define pud_val(x)	((x).pud)
#define __pud(x)	((pud_t) { (x) })
#endif

/* PGD level */
typedef struct { unsigned long pgd; } pgd_t;
#define pgd_val(x)	((x).pgd)
#define __pgd(x)	((pgd_t) { (x) })

/* Page protection bits */
typedef struct { unsigned long pgprot; } pgprot_t;
#define pgprot_val(x)	((x).pgprot)
#define __pgprot(x)	((pgprot_t) { (x) })

#else

/*
 * .. while these make it easier on the compiler
 */

typedef unsigned long pte_t;
#define pte_val(x)	(x)
#define __pte(x)	(x)

#ifdef CONFIG_PPC_64K_PAGES
typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
#else
typedef unsigned long real_pte_t;
#endif


typedef unsigned long pmd_t;
#define pmd_val(x)	(x)
#define __pmd(x)	(x)

#ifndef CONFIG_PPC_64K_PAGES
typedef unsigned long pud_t;
#define pud_val(x)	(x)
#define __pud(x)	(x)
#endif

typedef unsigned long pgd_t;
#define pgd_val(x)	(x)
#define pgprot_val(x)	(x)

typedef unsigned long pgprot_t;
#define __pgd(x)	(x)
#define __pgprot(x)	(x)

#endif

#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)

extern int page_is_ram(unsigned long pfn);

extern u64 ppc64_pft_size;		/* Log 2 of page table size */

/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
#define __HAVE_ARCH_GATE_AREA		1

#endif /* __ASSEMBLY__ */

#ifdef MODULE
#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
#else
#define __page_aligned \
	__attribute__((__aligned__(PAGE_SIZE), \
		__section__(".data.page_aligned")))
#endif


/* This must match the -Ttext linker address            */
/* Note: tophys & tovirt make assumptions about how     */
/*       KERNELBASE is defined for performance reasons. */
/*       When KERNELBASE moves, those macros may have   */
/*             to change!                               */
#define PAGE_OFFSET     ASM_CONST(0xC000000000000000)
#define KERNELBASE      PAGE_OFFSET
#define VMALLOCBASE     ASM_CONST(0xD000000000000000)

#define VMALLOC_REGION_ID  (VMALLOCBASE >> REGION_SHIFT)
#define KERNEL_REGION_ID   (KERNELBASE >> REGION_SHIFT)
#define USER_REGION_ID     (0UL)
#define REGION_ID(ea)	   (((unsigned long)(ea)) >> REGION_SHIFT)

#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))

#ifdef CONFIG_FLATMEM
#define pfn_to_page(pfn)	(mem_map + (pfn))
#define page_to_pfn(page)	((unsigned long)((page) - mem_map))
#define pfn_valid(pfn)		((pfn) < max_mapnr)
#endif

#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define pfn_to_kaddr(pfn)	__va((pfn) << PAGE_SHIFT)

#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)

/*
 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
 * and needs to be executable.  This means the whole heap ends
 * up being executable.
 */
#define VM_DATA_DEFAULT_FLAGS32	(VM_READ | VM_WRITE | VM_EXEC | \
				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_DATA_DEFAULT_FLAGS64	(VM_READ | VM_WRITE | \
				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_DATA_DEFAULT_FLAGS \
	(test_thread_flag(TIF_32BIT) ? \
	 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)

/*
 * This is the default if a program doesn't have a PT_GNU_STACK
 * program header entry. The PPC64 ELF ABI has a non executable stack
 * stack by default, so in the absense of a PT_GNU_STACK program header
 * we turn execute permission off.
 */
#define VM_STACK_DEFAULT_FLAGS32	(VM_READ | VM_WRITE | VM_EXEC | \
					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_STACK_DEFAULT_FLAGS64	(VM_READ | VM_WRITE | \
					 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#define VM_STACK_DEFAULT_FLAGS \
	(test_thread_flag(TIF_32BIT) ? \
	 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)

#endif /* __KERNEL__ */

#include <asm-generic/page.h>

#endif /* _PPC64_PAGE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _PPC64_PAGE_H
	2	#define _PPC64_PAGE_H
	3
	4	/*
	5	* Copyright (C) 2001 PPC64 Team, IBM Corp
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version
	10	* 2 of the License, or (at your option) any later version.
	11	*/
	12
	13	#include <linux/config.h>
3ddfbcf1	14	#include <asm/asm-compat.h>
1da177e4	15
3c726f8d BH	16	/*
	17	* We support either 4k or 64k software page size. When using 64k pages
	18	* however, wether we are really supporting 64k pages in HW or not is
	19	* irrelevant to those definitions. We always define HW_PAGE_SHIFT to 12
	20	* as use of 64k pages remains a linux kernel specific, every notion of
	21	* page number shared with the firmware, TCEs, iommu, etc... still assumes
	22	* a page size of 4096.
	23	*/
	24	#ifdef CONFIG_PPC_64K_PAGES
	25	#define PAGE_SHIFT 16
	26	#else
	27	#define PAGE_SHIFT 12
	28	#endif
1da177e4	29
3c726f8d BH	30	#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
3c726f8d BH	31	#define PAGE_MASK (~(PAGE_SIZE-1))
1da177e4	32
3c726f8d BH	33	/* HW_PAGE_SHIFT is always 4k pages */
	34	#define HW_PAGE_SHIFT 12
	35	#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
	36	#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
1da177e4	37
3c726f8d BH	38	/* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
	39	* HW_PAGE_SHIFT, that is 4k pages
	40	*/
	41	#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
	42
	43	/* Segment size */
	44	#define SID_SHIFT 28
	45	#define SID_MASK 0xfffffffffUL
	46	#define ESID_MASK 0xfffffffff0000000UL
	47	#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
1da177e4	48
3c726f8d BH	49	/* Large pages size */
	50
	51	#ifndef __ASSEMBLY__
	52	extern unsigned int HPAGE_SHIFT;
	53	#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
	54	#define HPAGE_MASK (~(HPAGE_SIZE - 1))
1da177e4	55	#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
3c726f8d BH	56	#endif /* __ASSEMBLY__ */
	57
	58	#ifdef CONFIG_HUGETLB_PAGE
	59
1da177e4	60
c594adad DG	61	#define HTLB_AREA_SHIFT 40
	62	#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
	63	#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
1da177e4	64
3c726f8d BH	65	#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \
	66	- (1U << GET_ESID(addr))) & 0xffff)
	67	#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
	68	- (1U << GET_HTLB_AREA(addr))) & 0xffff)
1da177e4 LT	69
	70	#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
	71	#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
e28f7faf	72	#define ARCH_HAS_SETCLEAR_HUGE_PTE
1da177e4 LT	73
1da177e4 LT	74	#define touches_hugepage_low_range(mm, addr, len) \
c594adad DG	75	(LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
	76	#define touches_hugepage_high_range(mm, addr, len) \
	77	(HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)
1da177e4 LT	78
	79	#define __within_hugepage_low_range(addr, len, segmask) \
	80	((LOW_ESID_MASK((addr), (len)) \| (segmask)) == (segmask))
	81	#define within_hugepage_low_range(addr, len) \
	82	__within_hugepage_low_range((addr), (len), \
c594adad DG	83	current->mm->context.low_htlb_areas)
	84	#define __within_hugepage_high_range(addr, len, zonemask) \
	85	((HTLB_AREA_MASK((addr), (len)) \| (zonemask)) == (zonemask))
	86	#define within_hugepage_high_range(addr, len) \
	87	__within_hugepage_high_range((addr), (len), \
	88	current->mm->context.high_htlb_areas)
1da177e4 LT	89
1da177e4 LT	90	#define is_hugepage_only_range(mm, addr, len) \
c594adad	91	(touches_hugepage_high_range((mm), (addr), (len)) \|\| \
1da177e4 LT	92	touches_hugepage_low_range((mm), (addr), (len)))
	93	#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
	94
	95	#define in_hugepage_area(context, addr) \
	96	(cpu_has_feature(CPU_FTR_16M_PAGE) && \
c594adad	97	( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) \|\| \
1da177e4	98	( ((addr) < 0x100000000L) && \
c594adad	99	((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )
1da177e4 LT	100
	101	#else /* !CONFIG_HUGETLB_PAGE */
	102
	103	#define in_hugepage_area(mm, addr) 0
	104
	105	#endif /* !CONFIG_HUGETLB_PAGE */
	106
	107	/* align addr on a size boundary - adjust address up/down if needed */
	108	#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
	109	#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
	110
	111	/* align addr on a size boundary - adjust address up if needed */
	112	#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
	113
1da177e4 LT	114	/* to align the pointer to the (next) page boundary */
	115	#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
	116
	117	#ifdef __KERNEL__
	118	#ifndef __ASSEMBLY__
	119	#include <asm/cache.h>
	120
	121	#undef STRICT_MM_TYPECHECKS
	122
	123	#define REGION_SIZE 4UL
	124	#define REGION_SHIFT 60UL
	125	#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
1da177e4 LT	126
	127	static __inline__ void clear_page(void *addr)
	128	{
	129	unsigned long lines, line_size;
	130
	131	line_size = ppc64_caches.dline_size;
	132	lines = ppc64_caches.dlines_per_page;
	133
	134	__asm__ __volatile__(
	135	"mtctr %1 # clear_page\n\
	136	1: dcbz 0,%0\n\
	137	add %0,%0,%3\n\
	138	bdnz+ 1b"
	139	: "=r" (addr)
	140	: "r" (lines), "0" (addr), "r" (line_size)
	141	: "ctr", "memory");
	142	}
	143
3c726f8d BH	144	extern void copy_4K_page(void to, void from);
	145
	146	#ifdef CONFIG_PPC_64K_PAGES
	147	static inline void copy_page(void to, void from)
	148	{
	149	unsigned int i;
	150	for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
	151	copy_4K_page(to, from);
	152	to += 4096;
	153	from += 4096;
	154	}
	155	}
	156	#else /* CONFIG_PPC_64K_PAGES */
	157	static inline void copy_page(void to, void from)
	158	{
	159	copy_4K_page(to, from);
	160	}
	161	#endif /* CONFIG_PPC_64K_PAGES */
	162
1da177e4 LT	163	struct page;
	164	extern void clear_user_page(void page, unsigned long vaddr, struct page pg);
	165	extern void copy_user_page(void to, void from, unsigned long vaddr, struct page *p);
	166
	167	#ifdef STRICT_MM_TYPECHECKS
	168	/*
	169	* These are used to make use of C type-checking.
	170	* Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
	171	*/
1da177e4	172
3c726f8d BH	173	/* PTE level */
3c726f8d BH	174	typedef struct { unsigned long pte; } pte_t;
1da177e4	175	#define pte_val(x) ((x).pte)
e28f7faf	176	#define __pte(x) ((pte_t) { (x) })
3c726f8d BH	177
	178	/* 64k pages additionally define a bigger "real PTE" type that gathers
	179	* the "second half" part of the PTE for pseudo 64k pages
	180	*/
	181	#ifdef CONFIG_PPC_64K_PAGES
	182	typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
	183	#else
	184	typedef struct { pte_t pte; } real_pte_t;
	185	#endif
	186
	187	/* PMD level */
	188	typedef struct { unsigned long pmd; } pmd_t;
	189	#define pmd_val(x) ((x).pmd)
e28f7faf	190	#define __pmd(x) ((pmd_t) { (x) })
3c726f8d BH	191
	192	/* PUD level exusts only on 4k pages */
	193	#ifndef CONFIG_PPC_64K_PAGES
	194	typedef struct { unsigned long pud; } pud_t;
	195	#define pud_val(x) ((x).pud)
e28f7faf	196	#define __pud(x) ((pud_t) { (x) })
3c726f8d BH	197	#endif
	198
	199	/* PGD level */
	200	typedef struct { unsigned long pgd; } pgd_t;
	201	#define pgd_val(x) ((x).pgd)
e28f7faf	202	#define __pgd(x) ((pgd_t) { (x) })
3c726f8d BH	203
	204	/* Page protection bits */
	205	typedef struct { unsigned long pgprot; } pgprot_t;
	206	#define pgprot_val(x) ((x).pgprot)
e28f7faf	207	#define __pgprot(x) ((pgprot_t) { (x) })
1da177e4 LT	208
1da177e4 LT	209	#else
3c726f8d	210
1da177e4 LT	211	/*
	212	* .. while these make it easier on the compiler
	213	*/
1da177e4	214
3c726f8d	215	typedef unsigned long pte_t;
1da177e4	216	#define pte_val(x) (x)
3c726f8d BH	217	#define __pte(x) (x)
	218
	219	#ifdef CONFIG_PPC_64K_PAGES
	220	typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
	221	#else
	222	typedef unsigned long real_pte_t;
	223	#endif
	224
	225
	226	typedef unsigned long pmd_t;
1da177e4	227	#define pmd_val(x) (x)
3c726f8d BH	228	#define __pmd(x) (x)
	229
	230	#ifndef CONFIG_PPC_64K_PAGES
	231	typedef unsigned long pud_t;
e28f7faf	232	#define pud_val(x) (x)
3c726f8d BH	233	#define __pud(x) (x)
	234	#endif
	235
	236	typedef unsigned long pgd_t;
1da177e4 LT	237	#define pgd_val(x) (x)
	238	#define pgprot_val(x) (x)
	239
3c726f8d	240	typedef unsigned long pgprot_t;
1da177e4 LT	241	#define __pgd(x) (x)
	242	#define __pgprot(x) (x)
	243
	244	#endif
	245
1da177e4 LT	246	#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
	247
	248	extern int page_is_ram(unsigned long pfn);
	249
	250	extern u64 ppc64_pft_size; /* Log 2 of page table size */
	251
	252	/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
	253	#define __HAVE_ARCH_GATE_AREA 1
	254
	255	#endif /* __ASSEMBLY__ */
	256
	257	#ifdef MODULE
	258	#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
	259	#else
	260	#define __page_aligned \
	261	__attribute__((__aligned__(PAGE_SIZE), \
	262	__section__(".data.page_aligned")))
	263	#endif
	264
	265
	266	/* This must match the -Ttext linker address */
	267	/* Note: tophys & tovirt make assumptions about how */
	268	/* KERNELBASE is defined for performance reasons. */
	269	/* When KERNELBASE moves, those macros may have */
	270	/* to change! */
	271	#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
	272	#define KERNELBASE PAGE_OFFSET
	273	#define VMALLOCBASE ASM_CONST(0xD000000000000000)
1da177e4	274
1f8d419e DG	275	#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
1f8d419e DG	276	#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
1da177e4	277	#define USER_REGION_ID (0UL)
1f8d419e	278	#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
1da177e4	279
1da177e4 LT	280	#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
1da177e4 LT	281
145e6642	282	#ifdef CONFIG_FLATMEM
1da177e4 LT	283	#define pfn_to_page(pfn) (mem_map + (pfn))
	284	#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
	285	#define pfn_valid(pfn) ((pfn) < max_mapnr)
	286	#endif
	287
	288	#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
	289	#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
	290
	291	#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
	292
	293	/*
	294	* Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
	295	* and needs to be executable. This means the whole heap ends
	296	* up being executable.
	297	*/
	298	#define VM_DATA_DEFAULT_FLAGS32 (VM_READ \| VM_WRITE \| VM_EXEC \| \
	299	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	300
	301	#define VM_DATA_DEFAULT_FLAGS64 (VM_READ \| VM_WRITE \| \
	302	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	303
	304	#define VM_DATA_DEFAULT_FLAGS \
	305	(test_thread_flag(TIF_32BIT) ? \
	306	VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
	307
	308	/*
	309	* This is the default if a program doesn't have a PT_GNU_STACK
a2f95a5a AB	310	* program header entry. The PPC64 ELF ABI has a non executable stack
	311	* stack by default, so in the absense of a PT_GNU_STACK program header
	312	* we turn execute permission off.
1da177e4	313	*/
a2f95a5a AB	314	#define VM_STACK_DEFAULT_FLAGS32 (VM_READ \| VM_WRITE \| VM_EXEC \| \
	315	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	316
	317	#define VM_STACK_DEFAULT_FLAGS64 (VM_READ \| VM_WRITE \| \
	318	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
	319
	320	#define VM_STACK_DEFAULT_FLAGS \
	321	(test_thread_flag(TIF_32BIT) ? \
	322	VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
1da177e4 LT	323
1da177e4 LT	324	#endif /* __KERNEL__ */
fd4fd5aa SR	325
	326	#include <asm-generic/page.h>
	327
1da177e4	328	#endif /* _PPC64_PAGE_H */