[deliverable/linux.git] / include / asm-ppc64 / ptrace.h

#ifndef _PPC64_PTRACE_H
#define _PPC64_PTRACE_H

/*
 * Copyright (C) 2001 PPC64 Team, IBM Corp
 *
 * This struct defines the way the registers are stored on the
 * kernel stack during a system call or other kernel entry.
 *
 * this should only contain volatile regs
 * since we can keep non-volatile in the thread_struct
 * should set this up when only volatiles are saved
 * by intr code.
 *
 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
 * that the overall structure is a multiple of 16 bytes in length.
 *
 * Note that the offsets of the fields in this struct correspond with
 * the PT_* values below.  This simplifies arch/ppc64/kernel/ptrace.c.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef __ASSEMBLY__
#define PPC_REG unsigned long
struct pt_regs {
	PPC_REG gpr[32];
	PPC_REG nip;
	PPC_REG msr;
	PPC_REG orig_gpr3;	/* Used for restarting system calls */
	PPC_REG ctr;
	PPC_REG link;
	PPC_REG xer;
	PPC_REG ccr;
	PPC_REG softe;		/* Soft enabled/disabled */
	PPC_REG trap;		/* Reason for being here */
	PPC_REG dar;		/* Fault registers */
	PPC_REG dsisr;
	PPC_REG result; 	/* Result of a system call */
};

#define PPC_REG_32 unsigned int
struct pt_regs32 {
	PPC_REG_32 gpr[32];
	PPC_REG_32 nip;
	PPC_REG_32 msr;
	PPC_REG_32 orig_gpr3;	/* Used for restarting system calls */
	PPC_REG_32 ctr;
	PPC_REG_32 link;
	PPC_REG_32 xer;
	PPC_REG_32 ccr;
	PPC_REG_32 mq;		/* 601 only (not used at present) */
				/* Used on APUS to hold IPL value. */
	PPC_REG_32 trap;		/* Reason for being here */
	PPC_REG_32 dar;		/* Fault registers */
	PPC_REG_32 dsisr;
	PPC_REG_32 result; 	/* Result of a system call */
};

#define instruction_pointer(regs) ((regs)->nip)
#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
#else
#define profile_pc(regs) instruction_pointer(regs)
#endif

#endif /* __ASSEMBLY__ */

#define STACK_FRAME_OVERHEAD	112	/* size of minimum stack frame */

/* Size of dummy stack frame allocated when calling signal handler. */
#define __SIGNAL_FRAMESIZE	128
#define __SIGNAL_FRAMESIZE32	64

#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)

#define force_successful_syscall_return()   \
		(current_thread_info()->syscall_noerror = 1)

/*
 * We use the least-significant bit of the trap field to indicate
 * whether we have saved the full set of registers, or only a
 * partial set.  A 1 there means the partial set.
 */
#define FULL_REGS(regs)		(((regs)->trap & 1) == 0)
#define TRAP(regs)		((regs)->trap & ~0xF)
#define CHECK_FULL_REGS(regs)	BUG_ON(regs->trap & 1)

/*
 * Offsets used by 'ptrace' system call interface.
 */
#define PT_R0	0
#define PT_R1	1
#define PT_R2	2
#define PT_R3	3
#define PT_R4	4
#define PT_R5	5
#define PT_R6	6
#define PT_R7	7
#define PT_R8	8
#define PT_R9	9
#define PT_R10	10
#define PT_R11	11
#define PT_R12	12
#define PT_R13	13
#define PT_R14	14
#define PT_R15	15
#define PT_R16	16
#define PT_R17	17
#define PT_R18	18
#define PT_R19	19
#define PT_R20	20
#define PT_R21	21
#define PT_R22	22
#define PT_R23	23
#define PT_R24	24
#define PT_R25	25
#define PT_R26	26
#define PT_R27	27
#define PT_R28	28
#define PT_R29	29
#define PT_R30	30
#define PT_R31	31

#define PT_NIP	32
#define PT_MSR	33
#ifdef __KERNEL__
#define PT_ORIG_R3 34
#endif
#define PT_CTR	35
#define PT_LNK	36
#define PT_XER	37
#define PT_CCR	38
#define PT_SOFTE 39
#define PT_RESULT 43

#define PT_FPR0	48

/* Kernel and userspace will both use this PT_FPSCR value.  32-bit apps will have
 * visibility to the asm-ppc/ptrace.h header instead of this one.
 */
#define PT_FPSCR (PT_FPR0 + 32)	  /* each FP reg occupies 1 slot in 64-bit space */

#ifdef __KERNEL__
#define PT_FPSCR32 (PT_FPR0 + 2*32 + 1)	  /* each FP reg occupies 2 32-bit userspace slots */
#endif

#define PT_VR0 82	/* each Vector reg occupies 2 slots in 64-bit */
#define PT_VSCR (PT_VR0 + 32*2 + 1)
#define PT_VRSAVE (PT_VR0 + 33*2)

#ifdef __KERNEL__
#define PT_VR0_32 164	/* each Vector reg occupies 4 slots in 32-bit */
#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
#define PT_VRSAVE_32 (PT_VR0 + 33*4)
#endif

/*
 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 
 * The transfer totals 34 quadword.  Quadwords 0-31 contain the 
 * corresponding vector registers.  Quadword 32 contains the vscr as the 
 * last word (offset 12) within that quadword.  Quadword 33 contains the 
 * vrsave as the first word (offset 0) within the quadword.
 *
 * This definition of the VMX state is compatible with the current PPC32 
 * ptrace interface.  This allows signal handling and ptrace to use the same 
 * structures.  This also simplifies the implementation of a bi-arch 
 * (combined (32- and 64-bit) gdb.
 */
#define PTRACE_GETVRREGS	18
#define PTRACE_SETVRREGS	19

/* Additional PTRACE requests implemented on PowerPC. */
#define PPC_PTRACE_GETREGS	      0x99  /* Get GPRs 0 - 31 */
#define PPC_PTRACE_SETREGS	      0x98  /* Set GPRs 0 - 31 */
#define PPC_PTRACE_GETFPREGS	    0x97  /* Get FPRs 0 - 31 */
#define PPC_PTRACE_SETFPREGS	    0x96  /* Set FPRs 0 - 31 */
#define PPC_PTRACE_PEEKTEXT_3264  0x95  /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
#define PPC_PTRACE_PEEKDATA_3264  0x94  /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
#define PPC_PTRACE_POKETEXT_3264  0x93  /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
#define PPC_PTRACE_POKEDATA_3264  0x92  /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
#define PPC_PTRACE_PEEKUSR_3264   0x91  /* Read a register (specified by ADDR) out of the "user area" on a 64-bit process from a 32-bit process. */
#define PPC_PTRACE_POKEUSR_3264   0x90  /* Write DATA into location ADDR within the "user area" on a 64-bit process from a 32-bit process. */


#endif /* _PPC64_PTRACE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _PPC64_PTRACE_H
	2	#define _PPC64_PTRACE_H
	3
	4	/*
	5	* Copyright (C) 2001 PPC64 Team, IBM Corp
	6	*
	7	* This struct defines the way the registers are stored on the
	8	* kernel stack during a system call or other kernel entry.
	9	*
	10	* this should only contain volatile regs
	11	* since we can keep non-volatile in the thread_struct
	12	* should set this up when only volatiles are saved
	13	* by intr code.
	14	*
	15	* Since this is going on the stack, CARE MUST BE TAKEN to insure
	16	* that the overall structure is a multiple of 16 bytes in length.
	17	*
	18	* Note that the offsets of the fields in this struct correspond with
	19	* the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c.
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*/
	26
	27	#ifndef __ASSEMBLY__
	28	#define PPC_REG unsigned long
	29	struct pt_regs {
	30	PPC_REG gpr[32];
	31	PPC_REG nip;
	32	PPC_REG msr;
	33	PPC_REG orig_gpr3; /* Used for restarting system calls */
	34	PPC_REG ctr;
	35	PPC_REG link;
	36	PPC_REG xer;
	37	PPC_REG ccr;
	38	PPC_REG softe; /* Soft enabled/disabled */
	39	PPC_REG trap; /* Reason for being here */
	40	PPC_REG dar; /* Fault registers */
	41	PPC_REG dsisr;
	42	PPC_REG result; /* Result of a system call */
	43	};
	44
	45	#define PPC_REG_32 unsigned int
	46	struct pt_regs32 {
	47	PPC_REG_32 gpr[32];
	48	PPC_REG_32 nip;
	49	PPC_REG_32 msr;
	50	PPC_REG_32 orig_gpr3; /* Used for restarting system calls */
	51	PPC_REG_32 ctr;
	52	PPC_REG_32 link;
	53	PPC_REG_32 xer;
	54	PPC_REG_32 ccr;
	55	PPC_REG_32 mq; /* 601 only (not used at present) */
	56	/* Used on APUS to hold IPL value. */
	57	PPC_REG_32 trap; /* Reason for being here */
	58	PPC_REG_32 dar; /* Fault registers */
	59	PPC_REG_32 dsisr;
	60	PPC_REG_32 result; /* Result of a system call */
	61	};
	62
	63	#define instruction_pointer(regs) ((regs)->nip)
	64	#ifdef CONFIG_SMP
65	extern unsigned long profile_pc(struct pt_regs *regs);
66	#else
67	#define profile_pc(regs) instruction_pointer(regs)
68	#endif
69
70	#endif /* __ASSEMBLY__ */
71
72	#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
73
74	/* Size of dummy stack frame allocated when calling signal handler. */
75	#define __SIGNAL_FRAMESIZE 128
76	#define __SIGNAL_FRAMESIZE32 64
77
78	#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
79
80	#define force_successful_syscall_return() \
81	(current_thread_info()->syscall_noerror = 1)
82
83	/*
84	* We use the least-significant bit of the trap field to indicate
85	* whether we have saved the full set of registers, or only a
86	* partial set. A 1 there means the partial set.
87	*/
88	#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
89	#define TRAP(regs) ((regs)->trap & ~0xF)
90	#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
91
92	/*
93	* Offsets used by 'ptrace' system call interface.
94	*/
95	#define PT_R0 0
96	#define PT_R1 1
97	#define PT_R2 2
98	#define PT_R3 3
99	#define PT_R4 4
100	#define PT_R5 5
101	#define PT_R6 6
102	#define PT_R7 7
103	#define PT_R8 8
104	#define PT_R9 9
105	#define PT_R10 10
106	#define PT_R11 11
107	#define PT_R12 12
108	#define PT_R13 13
109	#define PT_R14 14
110	#define PT_R15 15
111	#define PT_R16 16
112	#define PT_R17 17
113	#define PT_R18 18
114	#define PT_R19 19
115	#define PT_R20 20
116	#define PT_R21 21
117	#define PT_R22 22
118	#define PT_R23 23
119	#define PT_R24 24
120	#define PT_R25 25
121	#define PT_R26 26
122	#define PT_R27 27
123	#define PT_R28 28
124	#define PT_R29 29
125	#define PT_R30 30
126	#define PT_R31 31
127
128	#define PT_NIP 32
129	#define PT_MSR 33
130	#ifdef __KERNEL__
131	#define PT_ORIG_R3 34
132	#endif
133	#define PT_CTR 35
134	#define PT_LNK 36
135	#define PT_XER 37
136	#define PT_CCR 38
137	#define PT_SOFTE 39
138	#define PT_RESULT 43
139
140	#define PT_FPR0 48
141
142	/* Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will have
143	* visibility to the asm-ppc/ptrace.h header instead of this one.
144	*/
145	#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
146
147	#ifdef __KERNEL__
148	#define PT_FPSCR32 (PT_FPR0 + 232 + 1) / each FP reg occupies 2 32-bit userspace slots */
149	#endif
150
151	#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
152	#define PT_VSCR (PT_VR0 + 32*2 + 1)
153	#define PT_VRSAVE (PT_VR0 + 33*2)
154
155	#ifdef __KERNEL__
156	#define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
157	#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
158	#define PT_VRSAVE_32 (PT_VR0 + 33*4)
159	#endif
160
161	/*
162	* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
163	* The transfer totals 34 quadword. Quadwords 0-31 contain the
164	* corresponding vector registers. Quadword 32 contains the vscr as the
165	* last word (offset 12) within that quadword. Quadword 33 contains the
166	* vrsave as the first word (offset 0) within the quadword.
167	*
168	* This definition of the VMX state is compatible with the current PPC32
169	* ptrace interface. This allows signal handling and ptrace to use the same
170	* structures. This also simplifies the implementation of a bi-arch
171	* (combined (32- and 64-bit) gdb.
172	*/
173	#define PTRACE_GETVRREGS 18
174	#define PTRACE_SETVRREGS 19
175
176	/* Additional PTRACE requests implemented on PowerPC. */
177	#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
178	#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
179	#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
180	#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
181	#define PPC_PTRACE_PEEKTEXT_3264 0x95 /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
182	#define PPC_PTRACE_PEEKDATA_3264 0x94 /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
183	#define PPC_PTRACE_POKETEXT_3264 0x93 /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
184	#define PPC_PTRACE_POKEDATA_3264 0x92 /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
185	#define PPC_PTRACE_PEEKUSR_3264 0x91 /* Read a register (specified by ADDR) out of the "user area" on a 64-bit process from a 32-bit process. */
186	#define PPC_PTRACE_POKEUSR_3264 0x90 /* Write DATA into location ADDR within the "user area" on a 64-bit process from a 32-bit process. */
187
188
189	#endif /* _PPC64_PTRACE_H */