[deliverable/linux.git] / include / asm-ppc64 / tlbflush.h

#ifndef _PPC64_TLBFLUSH_H
#define _PPC64_TLBFLUSH_H

/*
 * TLB flushing:
 *
 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
 *  - flush_tlb_page(vma, vmaddr) flushes one page
 *  - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
 *  - flush_tlb_range(vma, start, end) flushes a range of pages
 *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
 *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
 */

#include <linux/percpu.h>
#include <asm/page.h>

#define PPC64_TLB_BATCH_NR 192

struct mm_struct;
struct ppc64_tlb_batch {
	unsigned long index;
	unsigned long context;
	struct mm_struct *mm;
	pte_t pte[PPC64_TLB_BATCH_NR];
	unsigned long addr[PPC64_TLB_BATCH_NR];
	unsigned long vaddr[PPC64_TLB_BATCH_NR];
	unsigned int large;
};
DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);

extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);

static inline void flush_tlb_pending(void)
{
	struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);

	if (batch->index)
		__flush_tlb_pending(batch);
	put_cpu_var(ppc64_tlb_batch);
}

#define flush_tlb_mm(mm)			flush_tlb_pending()
#define flush_tlb_page(vma, addr)		flush_tlb_pending()
#define flush_tlb_page_nohash(vma, addr)       	do { } while (0)
#define flush_tlb_range(vma, start, end) \
		do { (void)(start); flush_tlb_pending(); } while (0)
#define flush_tlb_kernel_range(start, end)	flush_tlb_pending()
#define flush_tlb_pgtables(mm, start, end)	do { } while (0)

extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
			    int local);
void flush_hash_range(unsigned long context, unsigned long number, int local);

#endif /* _PPC64_TLBFLUSH_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _PPC64_TLBFLUSH_H
	2	#define _PPC64_TLBFLUSH_H
	3
	4	/*
	5	* TLB flushing:
	6	*
	7	* - flush_tlb_mm(mm) flushes the specified mm context TLB's
	8	* - flush_tlb_page(vma, vmaddr) flushes one page
	9	* - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
	10	* - flush_tlb_range(vma, start, end) flushes a range of pages
	11	* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
	12	* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
	13	*/
	14
	15	#include <linux/percpu.h>
	16	#include <asm/page.h>
	17
	18	#define PPC64_TLB_BATCH_NR 192
	19
	20	struct mm_struct;
	21	struct ppc64_tlb_batch {
	22	unsigned long index;
	23	unsigned long context;
	24	struct mm_struct *mm;
	25	pte_t pte[PPC64_TLB_BATCH_NR];
	26	unsigned long addr[PPC64_TLB_BATCH_NR];
	27	unsigned long vaddr[PPC64_TLB_BATCH_NR];
0f9578b7	28	unsigned int large;
1da177e4 LT	29	};
	30	DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
	31
	32	extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
	33
	34	static inline void flush_tlb_pending(void)
	35	{
	36	struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
	37
	38	if (batch->index)
	39	__flush_tlb_pending(batch);
	40	put_cpu_var(ppc64_tlb_batch);
	41	}
	42
	43	#define flush_tlb_mm(mm) flush_tlb_pending()
	44	#define flush_tlb_page(vma, addr) flush_tlb_pending()
	45	#define flush_tlb_page_nohash(vma, addr) do { } while (0)
	46	#define flush_tlb_range(vma, start, end) \
	47	do { (void)(start); flush_tlb_pending(); } while (0)
	48	#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
	49	#define flush_tlb_pgtables(mm, start, end) do { } while (0)
	50
	51	extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
	52	int local);
	53	void flush_hash_range(unsigned long context, unsigned long number, int local);
	54
	55	#endif /* _PPC64_TLBFLUSH_H */