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[S390] Update documentation for dynamic subchannel mapping.
[deliverable/linux.git] / include / asm-s390 / pgtable.h
CommitLineData
1da177e4
LT		 1/*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13#ifndef _ASM_S390_PGTABLE_H
14#define _ASM_S390_PGTABLE_H
15
16#include <asm-generic/4level-fixup.h>
17
18/*
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
24 * used).
25 *
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * into the pgd entry)
29 *
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
32 */
33#ifndef __ASSEMBLY__
2dcea57a 34#include <linux/mm_types.h>
1da177e4
LT		 35#include <asm/bug.h>
36#include <asm/processor.h>
1da177e4
LT		 37
38struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
8c65b4a6 39struct mm_struct;
1da177e4
LT		 40
41extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42extern void paging_init(void);
43
44/*
45 * The S390 doesn't have any external MMU info: the kernel page
46 * tables contain all the necessary information.
47 */
48#define update_mmu_cache(vma, address, pte) do { } while (0)
49
50/*
51 * ZERO_PAGE is a global shared page that is always zero: used
52 * for zero-mapped memory areas etc..
53 */
54extern char empty_zero_page[PAGE_SIZE];
55#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
56#endif /* !__ASSEMBLY__ */
57
58/*
59 * PMD_SHIFT determines the size of the area a second-level page
60 * table can map
61 * PGDIR_SHIFT determines what a third-level page table entry can map
62 */
63#ifndef __s390x__
64# define PMD_SHIFT 22
65# define PGDIR_SHIFT 22
66#else /* __s390x__ */
67# define PMD_SHIFT 21
68# define PGDIR_SHIFT 31
69#endif /* __s390x__ */
70
71#define PMD_SIZE (1UL << PMD_SHIFT)
72#define PMD_MASK (~(PMD_SIZE-1))
73#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
74#define PGDIR_MASK (~(PGDIR_SIZE-1))
75
76/*
77 * entries per page directory level: the S390 is two-level, so
78 * we don't really have any PMD directory physically.
79 * for S390 segment-table entries are combined to one PGD
80 * that leads to 1024 pte per pgd
81 */
82#ifndef __s390x__
83# define PTRS_PER_PTE 1024
84# define PTRS_PER_PMD 1
85# define PTRS_PER_PGD 512
86#else /* __s390x__ */
87# define PTRS_PER_PTE 512
88# define PTRS_PER_PMD 1024
89# define PTRS_PER_PGD 2048
90#endif /* __s390x__ */
91
d455a369
HD		 92#define FIRST_USER_ADDRESS 0
93
1da177e4
LT		 94#define pte_ERROR(e) \
95 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
96#define pmd_ERROR(e) \
97 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
98#define pgd_ERROR(e) \
99 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
100
101#ifndef __ASSEMBLY__
102/*
103 * Just any arbitrary offset to the start of the vmalloc VM area: the
104 * current 8MB value just means that there will be a 8MB "hole" after the
105 * physical memory until the kernel virtual memory starts. That means that
106 * any out-of-bounds memory accesses will hopefully be caught.
107 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
108 * area for the same reason. ;)
109 */
110#define VMALLOC_OFFSET (8*1024*1024)
111#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
112 & ~(VMALLOC_OFFSET-1))
8b62bc96
HC		 113
114/*
115 * We need some free virtual space to be able to do vmalloc.
116 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
117 * area. On a machine with 2GB memory we make sure that we
118 * have at least 128MB free space for vmalloc. On a machine
119 * with 4TB we make sure we have at least 1GB.
120 */
1da177e4 121#ifndef __s390x__
8b62bc96
HC		 122#define VMALLOC_MIN_SIZE 0x8000000UL
123#define VMALLOC_END 0x80000000UL
1da177e4 124#else /* __s390x__ */
8b62bc96
HC		 125#define VMALLOC_MIN_SIZE 0x40000000UL
126#define VMALLOC_END 0x40000000000UL
1da177e4
LT		 127#endif /* __s390x__ */
128
1da177e4
LT		 129/*
130 * A 31 bit pagetable entry of S390 has following format:
131 * | PFRA | | OS |
132 * 0 0IP0
133 * 00000000001111111111222222222233
134 * 01234567890123456789012345678901
135 *
136 * I Page-Invalid Bit: Page is not available for address-translation
137 * P Page-Protection Bit: Store access not possible for page
138 *
139 * A 31 bit segmenttable entry of S390 has following format:
140 * | P-table origin | |PTL
141 * 0 IC
142 * 00000000001111111111222222222233
143 * 01234567890123456789012345678901
144 *
145 * I Segment-Invalid Bit: Segment is not available for address-translation
146 * C Common-Segment Bit: Segment is not private (PoP 3-30)
147 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
148 *
149 * The 31 bit segmenttable origin of S390 has following format:
150 *
151 * |S-table origin | | STL |
152 * X **GPS
153 * 00000000001111111111222222222233
154 * 01234567890123456789012345678901
155 *
156 * X Space-Switch event:
157 * G Segment-Invalid Bit: *
158 * P Private-Space Bit: Segment is not private (PoP 3-30)
159 * S Storage-Alteration:
160 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
161 *
162 * A 64 bit pagetable entry of S390 has following format:
163 * | PFRA |0IP0| OS |
164 * 0000000000111111111122222222223333333333444444444455555555556666
165 * 0123456789012345678901234567890123456789012345678901234567890123
166 *
167 * I Page-Invalid Bit: Page is not available for address-translation
168 * P Page-Protection Bit: Store access not possible for page
169 *
170 * A 64 bit segmenttable entry of S390 has following format:
171 * | P-table origin | TT
172 * 0000000000111111111122222222223333333333444444444455555555556666
173 * 0123456789012345678901234567890123456789012345678901234567890123
174 *
175 * I Segment-Invalid Bit: Segment is not available for address-translation
176 * C Common-Segment Bit: Segment is not private (PoP 3-30)
177 * P Page-Protection Bit: Store access not possible for page
178 * TT Type 00
179 *
180 * A 64 bit region table entry of S390 has following format:
181 * | S-table origin | TF TTTL
182 * 0000000000111111111122222222223333333333444444444455555555556666
183 * 0123456789012345678901234567890123456789012345678901234567890123
184 *
185 * I Segment-Invalid Bit: Segment is not available for address-translation
186 * TT Type 01
187 * TF
188 * TL Table lenght
189 *
190 * The 64 bit regiontable origin of S390 has following format:
191 * | region table origon | DTTL
192 * 0000000000111111111122222222223333333333444444444455555555556666
193 * 0123456789012345678901234567890123456789012345678901234567890123
194 *
195 * X Space-Switch event:
196 * G Segment-Invalid Bit:
197 * P Private-Space Bit:
198 * S Storage-Alteration:
199 * R Real space
200 * TL Table-Length:
201 *
202 * A storage key has the following format:
203 * | ACC |F|R|C|0|
204 * 0 3 4 5 6 7
205 * ACC: access key
206 * F : fetch protection bit
207 * R : referenced bit
208 * C : changed bit
209 */
210
211/* Hardware bits in the page table entry */
83377484
MS		 212#define _PAGE_RO 0x200 /* HW read-only bit */
213#define _PAGE_INVALID 0x400 /* HW invalid bit */
214#define _PAGE_SWT 0x001 /* SW pte type bit t */
215#define _PAGE_SWX 0x002 /* SW pte type bit x */
1da177e4 216
83377484 217/* Six different types of pages. */
9282ed92
GS		 218#define _PAGE_TYPE_EMPTY 0x400
219#define _PAGE_TYPE_NONE 0x401
83377484
MS		 220#define _PAGE_TYPE_SWAP 0x403
221#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
9282ed92
GS		 222#define _PAGE_TYPE_RO 0x200
223#define _PAGE_TYPE_RW 0x000
1da177e4 224
83377484
MS		 225/*
226 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
227 * pte_none and pte_file to find out the pte type WITHOUT holding the page
228 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
229 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
230 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
231 * This change is done while holding the lock, but the intermediate step
232 * of a previously valid pte with the hw invalid bit set can be observed by
233 * handle_pte_fault. That makes it necessary that all valid pte types with
234 * the hw invalid bit set must be distinguishable from the four pte types
235 * empty, none, swap and file.
236 *
237 * irxt ipte irxt
238 * _PAGE_TYPE_EMPTY 1000 -> 1000
239 * _PAGE_TYPE_NONE 1001 -> 1001
240 * _PAGE_TYPE_SWAP 1011 -> 1011
241 * _PAGE_TYPE_FILE 11?1 -> 11?1
242 * _PAGE_TYPE_RO 0100 -> 1100
243 * _PAGE_TYPE_RW 0000 -> 1000
244 *
245 * pte_none is true for bits combinations 1000, 1100
246 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
247 * pte_file is true for bits combinations 1101, 1111
248 * swap pte is 1011 and 0001, 0011, 0101, 0111, 1010 and 1110 are invalid.
249 */
250
1da177e4
LT		 251#ifndef __s390x__
252
253/* Bits in the segment table entry */
254#define _PAGE_TABLE_LEN 0xf /* only full page-tables */
255#define _PAGE_TABLE_COM 0x10 /* common page-table */
256#define _PAGE_TABLE_INV 0x20 /* invalid page-table */
257#define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
258
259/* Bits int the storage key */
260#define _PAGE_CHANGED 0x02 /* HW changed bit */
261#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
262
263#define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
264#define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
265
266/*
267 * User and Kernel pagetables are identical
268 */
269#define _PAGE_TABLE _PAGE_TABLE_LEN
270#define _KERNPG_TABLE _PAGE_TABLE_LEN
271
272/*
273 * The Kernel segment-tables includes the User segment-table
274 */
275
276#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
277#define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
278
279#define USER_STD_MASK 0x00000080UL
280
281#else /* __s390x__ */
282
283/* Bits in the segment table entry */
284#define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
285#define _PMD_ENTRY 0x00
286
287/* Bits in the region third table entry */
288#define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
289#define _PGD_ENTRY 0x07
290
291/*
292 * User and kernel page directory
293 */
294#define _REGION_THIRD 0x4
295#define _REGION_THIRD_LEN 0x3
296#define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
297#define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
298
299#define USER_STD_MASK 0x0000000000000080UL
300
301/* Bits in the storage key */
302#define _PAGE_CHANGED 0x02 /* HW changed bit */
303#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
304
305#endif /* __s390x__ */
306
307/*
9282ed92 308 * Page protection definitions.
1da177e4 309 */
9282ed92
GS		 310#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
311#define PAGE_RO __pgprot(_PAGE_TYPE_RO)
312#define PAGE_RW __pgprot(_PAGE_TYPE_RW)
313
314#define PAGE_KERNEL PAGE_RW
315#define PAGE_COPY PAGE_RO
1da177e4
LT		 316
317/*
318 * The S390 can't do page protection for execute, and considers that the
319 * same are read. Also, write permissions imply read permissions. This is
320 * the closest we can get..
321 */
322 /*xwr*/
9282ed92
GS		 323#define __P000 PAGE_NONE
324#define __P001 PAGE_RO
325#define __P010 PAGE_RO
326#define __P011 PAGE_RO
327#define __P100 PAGE_RO
328#define __P101 PAGE_RO
329#define __P110 PAGE_RO
330#define __P111 PAGE_RO
331
332#define __S000 PAGE_NONE
333#define __S001 PAGE_RO
334#define __S010 PAGE_RW
335#define __S011 PAGE_RW
336#define __S100 PAGE_RO
337#define __S101 PAGE_RO
338#define __S110 PAGE_RW
339#define __S111 PAGE_RW
1da177e4
LT		 340
341/*
342 * Certain architectures need to do special things when PTEs
343 * within a page table are directly modified. Thus, the following
344 * hook is made available.
345 */
4448aaf0 346static inline void set_pte(pte_t *pteptr, pte_t pteval)
1da177e4
LT		 347{
348 *pteptr = pteval;
349}
350#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
351
352/*
353 * pgd/pmd/pte query functions
354 */
355#ifndef __s390x__
356
4448aaf0
AB		 357static inline int pgd_present(pgd_t pgd) { return 1; }
358static inline int pgd_none(pgd_t pgd) { return 0; }
359static inline int pgd_bad(pgd_t pgd) { return 0; }
1da177e4 360
4448aaf0
AB		 361static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
362static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
363static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 364{
365 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
366}
367
368#else /* __s390x__ */
369
4448aaf0 370static inline int pgd_present(pgd_t pgd)
1da177e4
LT		 371{
372 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
373}
374
4448aaf0 375static inline int pgd_none(pgd_t pgd)
1da177e4
LT		 376{
377 return pgd_val(pgd) & _PGD_ENTRY_INV;
378}
379
4448aaf0 380static inline int pgd_bad(pgd_t pgd)
1da177e4
LT		 381{
382 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
383}
384
4448aaf0 385static inline int pmd_present(pmd_t pmd)
1da177e4
LT		 386{
387 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
388}
389
4448aaf0 390static inline int pmd_none(pmd_t pmd)
1da177e4
LT		 391{
392 return pmd_val(pmd) & _PMD_ENTRY_INV;
393}
394
4448aaf0 395static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 396{
397 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
398}
399
400#endif /* __s390x__ */
401
4448aaf0 402static inline int pte_none(pte_t pte)
1da177e4 403{
83377484 404 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
1da177e4
LT		 405}
406
4448aaf0 407static inline int pte_present(pte_t pte)
1da177e4 408{
83377484
MS		 409 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
410 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
411 (!(pte_val(pte) & _PAGE_INVALID) &&
412 !(pte_val(pte) & _PAGE_SWT));
1da177e4
LT		 413}
414
4448aaf0 415static inline int pte_file(pte_t pte)
1da177e4 416{
83377484
MS		 417 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
418 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
1da177e4
LT		 419}
420
421#define pte_same(a,b) (pte_val(a) == pte_val(b))
422
423/*
424 * query functions pte_write/pte_dirty/pte_young only work if
425 * pte_present() is true. Undefined behaviour if not..
426 */
4448aaf0 427static inline int pte_write(pte_t pte)
1da177e4
LT		 428{
429 return (pte_val(pte) & _PAGE_RO) == 0;
430}
431
4448aaf0 432static inline int pte_dirty(pte_t pte)
1da177e4
LT		 433{
434 /* A pte is neither clean nor dirty on s/390. The dirty bit
435 * is in the storage key. See page_test_and_clear_dirty for
436 * details.
437 */
438 return 0;
439}
440
4448aaf0 441static inline int pte_young(pte_t pte)
1da177e4
LT		 442{
443 /* A pte is neither young nor old on s/390. The young bit
444 * is in the storage key. See page_test_and_clear_young for
445 * details.
446 */
447 return 0;
448}
449
4448aaf0 450static inline int pte_read(pte_t pte)
1da177e4
LT		 451{
452 /* All pages are readable since we don't use the fetch
453 * protection bit in the storage key.
454 */
455 return 1;
456}
457
458/*
459 * pgd/pmd/pte modification functions
460 */
461
462#ifndef __s390x__
463
4448aaf0 464static inline void pgd_clear(pgd_t * pgdp) { }
1da177e4 465
4448aaf0 466static inline void pmd_clear(pmd_t * pmdp)
1da177e4
LT		 467{
468 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
469 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
470 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
471 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
472}
473
474#else /* __s390x__ */
475
4448aaf0 476static inline void pgd_clear(pgd_t * pgdp)
1da177e4
LT		 477{
478 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
479}
480
4448aaf0 481static inline void pmd_clear(pmd_t * pmdp)
1da177e4
LT		 482{
483 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
484 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
485}
486
487#endif /* __s390x__ */
488
4448aaf0 489static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
1da177e4 490{
9282ed92 491 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1da177e4
LT		 492}
493
494/*
495 * The following pte modification functions only work if
496 * pte_present() is true. Undefined behaviour if not..
497 */
4448aaf0 498static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4
LT		 499{
500 pte_val(pte) &= PAGE_MASK;
501 pte_val(pte) |= pgprot_val(newprot);
502 return pte;
503}
504
4448aaf0 505static inline pte_t pte_wrprotect(pte_t pte)
1da177e4 506{
9282ed92 507 /* Do not clobber _PAGE_TYPE_NONE pages! */
1da177e4
LT		 508 if (!(pte_val(pte) & _PAGE_INVALID))
509 pte_val(pte) |= _PAGE_RO;
510 return pte;
511}
512
4448aaf0 513static inline pte_t pte_mkwrite(pte_t pte)
1da177e4
LT		 514{
515 pte_val(pte) &= ~_PAGE_RO;
516 return pte;
517}
518
4448aaf0 519static inline pte_t pte_mkclean(pte_t pte)
1da177e4
LT		 520{
521 /* The only user of pte_mkclean is the fork() code.
522 We must *not* clear the *physical* page dirty bit
523 just because fork() wants to clear the dirty bit in
524 *one* of the page's mappings. So we just do nothing. */
525 return pte;
526}
527
4448aaf0 528static inline pte_t pte_mkdirty(pte_t pte)
1da177e4
LT		 529{
530 /* We do not explicitly set the dirty bit because the
531 * sske instruction is slow. It is faster to let the
532 * next instruction set the dirty bit.
533 */
534 return pte;
535}
536
4448aaf0 537static inline pte_t pte_mkold(pte_t pte)
1da177e4
LT		 538{
539 /* S/390 doesn't keep its dirty/referenced bit in the pte.
540 * There is no point in clearing the real referenced bit.
541 */
542 return pte;
543}
544
4448aaf0 545static inline pte_t pte_mkyoung(pte_t pte)
1da177e4
LT		 546{
547 /* S/390 doesn't keep its dirty/referenced bit in the pte.
548 * There is no point in setting the real referenced bit.
549 */
550 return pte;
551}
552
553static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
554{
555 return 0;
556}
557
558static inline int
559ptep_clear_flush_young(struct vm_area_struct *vma,
560 unsigned long address, pte_t *ptep)
561{
562 /* No need to flush TLB; bits are in storage key */
563 return ptep_test_and_clear_young(vma, address, ptep);
564}
565
566static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
567{
568 return 0;
569}
570
571static inline int
572ptep_clear_flush_dirty(struct vm_area_struct *vma,
573 unsigned long address, pte_t *ptep)
574{
575 /* No need to flush TLB; bits are in storage key */
576 return ptep_test_and_clear_dirty(vma, address, ptep);
577}
578
579static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
580{
581 pte_t pte = *ptep;
582 pte_clear(mm, addr, ptep);
583 return pte;
584}
585
9282ed92 586static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1da177e4 587{
9282ed92 588 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
1da177e4 589#ifndef __s390x__
1da177e4
LT		 590 /* S390 has 1mb segments, we are emulating 4MB segments */
591 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
9282ed92
GS		 592#else
593 /* ipte in zarch mode can do the math */
594 pte_t *pto = ptep;
595#endif
94c12cc7
MS		 596 asm volatile(
597 " ipte %2,%3"
598 : "=m" (*ptep) : "m" (*ptep),
599 "a" (pto), "a" (address));
1da177e4 600 }
9282ed92
GS		 601 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
602}
603
604static inline pte_t
605ptep_clear_flush(struct vm_area_struct *vma,
606 unsigned long address, pte_t *ptep)
607{
608 pte_t pte = *ptep;
609
610 __ptep_ipte(address, ptep);
1da177e4
LT		 611 return pte;
612}
613
614static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
615{
616 pte_t old_pte = *ptep;
617 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
618}
619
620static inline void
621ptep_establish(struct vm_area_struct *vma,
622 unsigned long address, pte_t *ptep,
623 pte_t entry)
624{
625 ptep_clear_flush(vma, address, ptep);
626 set_pte(ptep, entry);
627}
628
629#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
630 ptep_establish(__vma, __address, __ptep, __entry)
631
632/*
633 * Test and clear dirty bit in storage key.
634 * We can't clear the changed bit atomically. This is a potential
635 * race against modification of the referenced bit. This function
636 * should therefore only be called if it is not mapped in any
637 * address space.
638 */
2dcea57a
HC		 639static inline int page_test_and_clear_dirty(struct page *page)
640{
0b2b6e1d 641 unsigned long physpage = page_to_phys(page);
2dcea57a
HC		 642 int skey = page_get_storage_key(physpage);
643
644 if (skey & _PAGE_CHANGED)
645 page_set_storage_key(physpage, skey & ~_PAGE_CHANGED);
646 return skey & _PAGE_CHANGED;
647}
1da177e4
LT		 648
649/*
650 * Test and clear referenced bit in storage key.
651 */
2dcea57a
HC		 652static inline int page_test_and_clear_young(struct page *page)
653{
0b2b6e1d 654 unsigned long physpage = page_to_phys(page);
2dcea57a
HC		 655 int ccode;
656
0b2b6e1d
HC		 657 asm volatile(
658 " rrbe 0,%1\n"
659 " ipm %0\n"
660 " srl %0,28\n"
2dcea57a
HC		 661 : "=d" (ccode) : "a" (physpage) : "cc" );
662 return ccode & 2;
663}
1da177e4
LT		 664
665/*
666 * Conversion functions: convert a page and protection to a page entry,
667 * and a page entry and page directory to the page they refer to.
668 */
669static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
670{
671 pte_t __pte;
672 pte_val(__pte) = physpage + pgprot_val(pgprot);
673 return __pte;
674}
675
2dcea57a
HC		 676static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
677{
0b2b6e1d 678 unsigned long physpage = page_to_phys(page);
1da177e4 679
2dcea57a
HC		 680 return mk_pte_phys(physpage, pgprot);
681}
682
683static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
684{
685 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
686
687 return mk_pte_phys(physpage, pgprot);
688}
1da177e4 689
1da177e4
LT		 690#ifdef __s390x__
691
2dcea57a
HC		 692static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
693{
694 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
695
696 return __pmd(physpage + pgprot_val(pgprot));
697}
1da177e4
LT		 698
699#endif /* __s390x__ */
700
701#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
702#define pte_page(x) pfn_to_page(pte_pfn(x))
703
46a82b2d 704#define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
1da177e4 705
0b2b6e1d 706#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1da177e4 707
46a82b2d
DM		 708#define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
709
0b2b6e1d 710#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
1da177e4
LT		 711
712/* to find an entry in a page-table-directory */
713#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
714#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
715
716/* to find an entry in a kernel page-table-directory */
717#define pgd_offset_k(address) pgd_offset(&init_mm, address)
718
719#ifndef __s390x__
720
721/* Find an entry in the second-level page table.. */
4448aaf0 722static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
1da177e4
LT		 723{
724 return (pmd_t *) dir;
725}
726
727#else /* __s390x__ */
728
729/* Find an entry in the second-level page table.. */
730#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
731#define pmd_offset(dir,addr) \
46a82b2d 732 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
1da177e4
LT		 733
734#endif /* __s390x__ */
735
736/* Find an entry in the third-level page table.. */
737#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
738#define pte_offset_kernel(pmd, address) \
46a82b2d 739 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
1da177e4
LT		 740#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
741#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
742#define pte_unmap(pte) do { } while (0)
743#define pte_unmap_nested(pte) do { } while (0)
744
745/*
746 * 31 bit swap entry format:
747 * A page-table entry has some bits we have to treat in a special way.
748 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
749 * exception will occur instead of a page translation exception. The
750 * specifiation exception has the bad habit not to store necessary
751 * information in the lowcore.
752 * Bit 21 and bit 22 are the page invalid bit and the page protection
753 * bit. We set both to indicate a swapped page.
754 * Bit 30 and 31 are used to distinguish the different page types. For
755 * a swapped page these bits need to be zero.
756 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
757 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
758 * plus 24 for the offset.
759 * 0| offset |0110|o|type |00|
760 * 0 0000000001111111111 2222 2 22222 33
761 * 0 1234567890123456789 0123 4 56789 01
762 *
763 * 64 bit swap entry format:
764 * A page-table entry has some bits we have to treat in a special way.
765 * Bits 52 and bit 55 have to be zero, otherwise an specification
766 * exception will occur instead of a page translation exception. The
767 * specifiation exception has the bad habit not to store necessary
768 * information in the lowcore.
769 * Bit 53 and bit 54 are the page invalid bit and the page protection
770 * bit. We set both to indicate a swapped page.
771 * Bit 62 and 63 are used to distinguish the different page types. For
772 * a swapped page these bits need to be zero.
773 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
774 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
775 * plus 56 for the offset.
776 * | offset |0110|o|type |00|
777 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
778 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
779 */
780#ifndef __s390x__
781#define __SWP_OFFSET_MASK (~0UL >> 12)
782#else
783#define __SWP_OFFSET_MASK (~0UL >> 11)
784#endif
4448aaf0 785static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1da177e4
LT		 786{
787 pte_t pte;
788 offset &= __SWP_OFFSET_MASK;
9282ed92 789 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1da177e4
LT		 790 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
791 return pte;
792}
793
794#define __swp_type(entry) (((entry).val >> 2) & 0x1f)
795#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
796#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
797
798#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
799#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
800
801#ifndef __s390x__
802# define PTE_FILE_MAX_BITS 26
803#else /* __s390x__ */
804# define PTE_FILE_MAX_BITS 59
805#endif /* __s390x__ */
806
807#define pte_to_pgoff(__pte) \
808 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
809
810#define pgoff_to_pte(__off) \
811 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
9282ed92 812 | _PAGE_TYPE_FILE })
1da177e4
LT		 813
814#endif /* !__ASSEMBLY__ */
815
816#define kern_addr_valid(addr) (1)
817
818/*
819 * No page table caches to initialise
820 */
821#define pgtable_cache_init() do { } while (0)
822
823#define __HAVE_ARCH_PTEP_ESTABLISH
824#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
825#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
826#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
827#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
828#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
829#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
830#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
831#define __HAVE_ARCH_PTEP_SET_WRPROTECT
832#define __HAVE_ARCH_PTE_SAME
833#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
834#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
835#include <asm-generic/pgtable.h>
836
837#endif /* _S390_PAGE_H */
838
Linux kernel - Deliverables
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