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[S390] move crypto options and some cleanup.
[deliverable/linux.git] / include / asm-s390 / pgtable.h
CommitLineData
1da177e4
LT		 1/*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13#ifndef _ASM_S390_PGTABLE_H
14#define _ASM_S390_PGTABLE_H
15
16#include <asm-generic/4level-fixup.h>
17
18/*
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
24 * used).
25 *
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * into the pgd entry)
29 *
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
32 */
33#ifndef __ASSEMBLY__
2dcea57a 34#include <linux/mm_types.h>
1da177e4
LT		 35#include <asm/bug.h>
36#include <asm/processor.h>
1da177e4
LT		 37
38struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
8c65b4a6 39struct mm_struct;
1da177e4
LT		 40
41extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42extern void paging_init(void);
2b67fc46 43extern void vmem_map_init(void);
1da177e4
LT		 44
45/*
46 * The S390 doesn't have any external MMU info: the kernel page
47 * tables contain all the necessary information.
48 */
49#define update_mmu_cache(vma, address, pte) do { } while (0)
50
51/*
52 * ZERO_PAGE is a global shared page that is always zero: used
53 * for zero-mapped memory areas etc..
54 */
55extern char empty_zero_page[PAGE_SIZE];
56#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
57#endif /* !__ASSEMBLY__ */
58
59/*
60 * PMD_SHIFT determines the size of the area a second-level page
61 * table can map
62 * PGDIR_SHIFT determines what a third-level page table entry can map
63 */
64#ifndef __s390x__
65# define PMD_SHIFT 22
66# define PGDIR_SHIFT 22
67#else /* __s390x__ */
68# define PMD_SHIFT 21
69# define PGDIR_SHIFT 31
70#endif /* __s390x__ */
71
72#define PMD_SIZE (1UL << PMD_SHIFT)
73#define PMD_MASK (~(PMD_SIZE-1))
74#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
75#define PGDIR_MASK (~(PGDIR_SIZE-1))
76
77/*
78 * entries per page directory level: the S390 is two-level, so
79 * we don't really have any PMD directory physically.
80 * for S390 segment-table entries are combined to one PGD
81 * that leads to 1024 pte per pgd
82 */
83#ifndef __s390x__
84# define PTRS_PER_PTE 1024
85# define PTRS_PER_PMD 1
86# define PTRS_PER_PGD 512
87#else /* __s390x__ */
88# define PTRS_PER_PTE 512
89# define PTRS_PER_PMD 1024
90# define PTRS_PER_PGD 2048
91#endif /* __s390x__ */
92
d455a369
HD		 93#define FIRST_USER_ADDRESS 0
94
1da177e4
LT		 95#define pte_ERROR(e) \
96 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
97#define pmd_ERROR(e) \
98 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
99#define pgd_ERROR(e) \
100 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
101
102#ifndef __ASSEMBLY__
103/*
104 * Just any arbitrary offset to the start of the vmalloc VM area: the
105 * current 8MB value just means that there will be a 8MB "hole" after the
106 * physical memory until the kernel virtual memory starts. That means that
107 * any out-of-bounds memory accesses will hopefully be caught.
108 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
109 * area for the same reason. ;)
110 */
f4eb07c1 111extern unsigned long vmalloc_end;
1da177e4
LT		 112#define VMALLOC_OFFSET (8*1024*1024)
113#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
114 & ~(VMALLOC_OFFSET-1))
f4eb07c1 115#define VMALLOC_END vmalloc_end
8b62bc96
HC		 116
117/*
118 * We need some free virtual space to be able to do vmalloc.
119 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
120 * area. On a machine with 2GB memory we make sure that we
121 * have at least 128MB free space for vmalloc. On a machine
f4eb07c1 122 * with 4TB we make sure we have at least 128GB.
8b62bc96 123 */
1da177e4 124#ifndef __s390x__
8b62bc96 125#define VMALLOC_MIN_SIZE 0x8000000UL
f4eb07c1 126#define VMALLOC_END_INIT 0x80000000UL
1da177e4 127#else /* __s390x__ */
f4eb07c1
HC		 128#define VMALLOC_MIN_SIZE 0x2000000000UL
129#define VMALLOC_END_INIT 0x40000000000UL
1da177e4
LT		 130#endif /* __s390x__ */
131
1da177e4
LT		 132/*
133 * A 31 bit pagetable entry of S390 has following format:
134 * | PFRA | | OS |
135 * 0 0IP0
136 * 00000000001111111111222222222233
137 * 01234567890123456789012345678901
138 *
139 * I Page-Invalid Bit: Page is not available for address-translation
140 * P Page-Protection Bit: Store access not possible for page
141 *
142 * A 31 bit segmenttable entry of S390 has following format:
143 * | P-table origin | |PTL
144 * 0 IC
145 * 00000000001111111111222222222233
146 * 01234567890123456789012345678901
147 *
148 * I Segment-Invalid Bit: Segment is not available for address-translation
149 * C Common-Segment Bit: Segment is not private (PoP 3-30)
150 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
151 *
152 * The 31 bit segmenttable origin of S390 has following format:
153 *
154 * |S-table origin | | STL |
155 * X **GPS
156 * 00000000001111111111222222222233
157 * 01234567890123456789012345678901
158 *
159 * X Space-Switch event:
160 * G Segment-Invalid Bit: *
161 * P Private-Space Bit: Segment is not private (PoP 3-30)
162 * S Storage-Alteration:
163 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
164 *
165 * A 64 bit pagetable entry of S390 has following format:
166 * | PFRA |0IP0| OS |
167 * 0000000000111111111122222222223333333333444444444455555555556666
168 * 0123456789012345678901234567890123456789012345678901234567890123
169 *
170 * I Page-Invalid Bit: Page is not available for address-translation
171 * P Page-Protection Bit: Store access not possible for page
172 *
173 * A 64 bit segmenttable entry of S390 has following format:
174 * | P-table origin | TT
175 * 0000000000111111111122222222223333333333444444444455555555556666
176 * 0123456789012345678901234567890123456789012345678901234567890123
177 *
178 * I Segment-Invalid Bit: Segment is not available for address-translation
179 * C Common-Segment Bit: Segment is not private (PoP 3-30)
180 * P Page-Protection Bit: Store access not possible for page
181 * TT Type 00
182 *
183 * A 64 bit region table entry of S390 has following format:
184 * | S-table origin | TF TTTL
185 * 0000000000111111111122222222223333333333444444444455555555556666
186 * 0123456789012345678901234567890123456789012345678901234567890123
187 *
188 * I Segment-Invalid Bit: Segment is not available for address-translation
189 * TT Type 01
190 * TF
191 * TL Table lenght
192 *
193 * The 64 bit regiontable origin of S390 has following format:
194 * | region table origon | DTTL
195 * 0000000000111111111122222222223333333333444444444455555555556666
196 * 0123456789012345678901234567890123456789012345678901234567890123
197 *
198 * X Space-Switch event:
199 * G Segment-Invalid Bit:
200 * P Private-Space Bit:
201 * S Storage-Alteration:
202 * R Real space
203 * TL Table-Length:
204 *
205 * A storage key has the following format:
206 * | ACC |F|R|C|0|
207 * 0 3 4 5 6 7
208 * ACC: access key
209 * F : fetch protection bit
210 * R : referenced bit
211 * C : changed bit
212 */
213
214/* Hardware bits in the page table entry */
83377484
MS		 215#define _PAGE_RO 0x200 /* HW read-only bit */
216#define _PAGE_INVALID 0x400 /* HW invalid bit */
217#define _PAGE_SWT 0x001 /* SW pte type bit t */
218#define _PAGE_SWX 0x002 /* SW pte type bit x */
1da177e4 219
83377484 220/* Six different types of pages. */
9282ed92
GS		 221#define _PAGE_TYPE_EMPTY 0x400
222#define _PAGE_TYPE_NONE 0x401
83377484
MS		 223#define _PAGE_TYPE_SWAP 0x403
224#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
9282ed92
GS		 225#define _PAGE_TYPE_RO 0x200
226#define _PAGE_TYPE_RW 0x000
1da177e4 227
83377484
MS		 228/*
229 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
230 * pte_none and pte_file to find out the pte type WITHOUT holding the page
231 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
232 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
233 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
234 * This change is done while holding the lock, but the intermediate step
235 * of a previously valid pte with the hw invalid bit set can be observed by
236 * handle_pte_fault. That makes it necessary that all valid pte types with
237 * the hw invalid bit set must be distinguishable from the four pte types
238 * empty, none, swap and file.
239 *
240 * irxt ipte irxt
241 * _PAGE_TYPE_EMPTY 1000 -> 1000
242 * _PAGE_TYPE_NONE 1001 -> 1001
243 * _PAGE_TYPE_SWAP 1011 -> 1011
244 * _PAGE_TYPE_FILE 11?1 -> 11?1
245 * _PAGE_TYPE_RO 0100 -> 1100
246 * _PAGE_TYPE_RW 0000 -> 1000
247 *
248 * pte_none is true for bits combinations 1000, 1100
249 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
250 * pte_file is true for bits combinations 1101, 1111
251 * swap pte is 1011 and 0001, 0011, 0101, 0111, 1010 and 1110 are invalid.
252 */
253
1da177e4
LT		 254#ifndef __s390x__
255
256/* Bits in the segment table entry */
257#define _PAGE_TABLE_LEN 0xf /* only full page-tables */
258#define _PAGE_TABLE_COM 0x10 /* common page-table */
259#define _PAGE_TABLE_INV 0x20 /* invalid page-table */
260#define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
261
262/* Bits int the storage key */
263#define _PAGE_CHANGED 0x02 /* HW changed bit */
264#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
265
266#define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
267#define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
268
269/*
270 * User and Kernel pagetables are identical
271 */
272#define _PAGE_TABLE _PAGE_TABLE_LEN
273#define _KERNPG_TABLE _PAGE_TABLE_LEN
274
275/*
276 * The Kernel segment-tables includes the User segment-table
277 */
278
279#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
280#define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
281
282#define USER_STD_MASK 0x00000080UL
283
284#else /* __s390x__ */
285
286/* Bits in the segment table entry */
287#define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
288#define _PMD_ENTRY 0x00
289
290/* Bits in the region third table entry */
291#define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
292#define _PGD_ENTRY 0x07
293
294/*
295 * User and kernel page directory
296 */
297#define _REGION_THIRD 0x4
298#define _REGION_THIRD_LEN 0x3
299#define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
300#define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
301
302#define USER_STD_MASK 0x0000000000000080UL
303
304/* Bits in the storage key */
305#define _PAGE_CHANGED 0x02 /* HW changed bit */
306#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
307
308#endif /* __s390x__ */
309
310/*
9282ed92 311 * Page protection definitions.
1da177e4 312 */
9282ed92
GS		 313#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
314#define PAGE_RO __pgprot(_PAGE_TYPE_RO)
315#define PAGE_RW __pgprot(_PAGE_TYPE_RW)
316
317#define PAGE_KERNEL PAGE_RW
318#define PAGE_COPY PAGE_RO
1da177e4
LT		 319
320/*
321 * The S390 can't do page protection for execute, and considers that the
322 * same are read. Also, write permissions imply read permissions. This is
323 * the closest we can get..
324 */
325 /*xwr*/
9282ed92
GS		 326#define __P000 PAGE_NONE
327#define __P001 PAGE_RO
328#define __P010 PAGE_RO
329#define __P011 PAGE_RO
330#define __P100 PAGE_RO
331#define __P101 PAGE_RO
332#define __P110 PAGE_RO
333#define __P111 PAGE_RO
334
335#define __S000 PAGE_NONE
336#define __S001 PAGE_RO
337#define __S010 PAGE_RW
338#define __S011 PAGE_RW
339#define __S100 PAGE_RO
340#define __S101 PAGE_RO
341#define __S110 PAGE_RW
342#define __S111 PAGE_RW
1da177e4
LT		 343
344/*
345 * Certain architectures need to do special things when PTEs
346 * within a page table are directly modified. Thus, the following
347 * hook is made available.
348 */
4448aaf0 349static inline void set_pte(pte_t *pteptr, pte_t pteval)
1da177e4
LT		 350{
351 *pteptr = pteval;
352}
353#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
354
355/*
356 * pgd/pmd/pte query functions
357 */
358#ifndef __s390x__
359
4448aaf0
AB		 360static inline int pgd_present(pgd_t pgd) { return 1; }
361static inline int pgd_none(pgd_t pgd) { return 0; }
362static inline int pgd_bad(pgd_t pgd) { return 0; }
1da177e4 363
4448aaf0
AB		 364static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
365static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
366static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 367{
368 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
369}
370
371#else /* __s390x__ */
372
4448aaf0 373static inline int pgd_present(pgd_t pgd)
1da177e4
LT		 374{
375 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
376}
377
4448aaf0 378static inline int pgd_none(pgd_t pgd)
1da177e4
LT		 379{
380 return pgd_val(pgd) & _PGD_ENTRY_INV;
381}
382
4448aaf0 383static inline int pgd_bad(pgd_t pgd)
1da177e4
LT		 384{
385 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
386}
387
4448aaf0 388static inline int pmd_present(pmd_t pmd)
1da177e4
LT		 389{
390 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
391}
392
4448aaf0 393static inline int pmd_none(pmd_t pmd)
1da177e4
LT		 394{
395 return pmd_val(pmd) & _PMD_ENTRY_INV;
396}
397
4448aaf0 398static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 399{
400 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
401}
402
403#endif /* __s390x__ */
404
4448aaf0 405static inline int pte_none(pte_t pte)
1da177e4 406{
83377484 407 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
1da177e4
LT		 408}
409
4448aaf0 410static inline int pte_present(pte_t pte)
1da177e4 411{
83377484
MS		 412 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
413 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
414 (!(pte_val(pte) & _PAGE_INVALID) &&
415 !(pte_val(pte) & _PAGE_SWT));
1da177e4
LT		 416}
417
4448aaf0 418static inline int pte_file(pte_t pte)
1da177e4 419{
83377484
MS		 420 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
421 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
1da177e4
LT		 422}
423
424#define pte_same(a,b) (pte_val(a) == pte_val(b))
425
426/*
427 * query functions pte_write/pte_dirty/pte_young only work if
428 * pte_present() is true. Undefined behaviour if not..
429 */
4448aaf0 430static inline int pte_write(pte_t pte)
1da177e4
LT		 431{
432 return (pte_val(pte) & _PAGE_RO) == 0;
433}
434
4448aaf0 435static inline int pte_dirty(pte_t pte)
1da177e4
LT		 436{
437 /* A pte is neither clean nor dirty on s/390. The dirty bit
438 * is in the storage key. See page_test_and_clear_dirty for
439 * details.
440 */
441 return 0;
442}
443
4448aaf0 444static inline int pte_young(pte_t pte)
1da177e4
LT		 445{
446 /* A pte is neither young nor old on s/390. The young bit
447 * is in the storage key. See page_test_and_clear_young for
448 * details.
449 */
450 return 0;
451}
452
4448aaf0 453static inline int pte_read(pte_t pte)
1da177e4
LT		 454{
455 /* All pages are readable since we don't use the fetch
456 * protection bit in the storage key.
457 */
458 return 1;
459}
460
461/*
462 * pgd/pmd/pte modification functions
463 */
464
465#ifndef __s390x__
466
4448aaf0 467static inline void pgd_clear(pgd_t * pgdp) { }
1da177e4 468
4448aaf0 469static inline void pmd_clear(pmd_t * pmdp)
1da177e4
LT		 470{
471 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
472 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
473 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
474 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
475}
476
477#else /* __s390x__ */
478
4448aaf0 479static inline void pgd_clear(pgd_t * pgdp)
1da177e4
LT		 480{
481 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
482}
483
4448aaf0 484static inline void pmd_clear(pmd_t * pmdp)
1da177e4
LT		 485{
486 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
487 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
488}
489
490#endif /* __s390x__ */
491
4448aaf0 492static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
1da177e4 493{
9282ed92 494 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1da177e4
LT		 495}
496
497/*
498 * The following pte modification functions only work if
499 * pte_present() is true. Undefined behaviour if not..
500 */
4448aaf0 501static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4
LT		 502{
503 pte_val(pte) &= PAGE_MASK;
504 pte_val(pte) |= pgprot_val(newprot);
505 return pte;
506}
507
4448aaf0 508static inline pte_t pte_wrprotect(pte_t pte)
1da177e4 509{
9282ed92 510 /* Do not clobber _PAGE_TYPE_NONE pages! */
1da177e4
LT		 511 if (!(pte_val(pte) & _PAGE_INVALID))
512 pte_val(pte) |= _PAGE_RO;
513 return pte;
514}
515
4448aaf0 516static inline pte_t pte_mkwrite(pte_t pte)
1da177e4
LT		 517{
518 pte_val(pte) &= ~_PAGE_RO;
519 return pte;
520}
521
4448aaf0 522static inline pte_t pte_mkclean(pte_t pte)
1da177e4
LT		 523{
524 /* The only user of pte_mkclean is the fork() code.
525 We must *not* clear the *physical* page dirty bit
526 just because fork() wants to clear the dirty bit in
527 *one* of the page's mappings. So we just do nothing. */
528 return pte;
529}
530
4448aaf0 531static inline pte_t pte_mkdirty(pte_t pte)
1da177e4
LT		 532{
533 /* We do not explicitly set the dirty bit because the
534 * sske instruction is slow. It is faster to let the
535 * next instruction set the dirty bit.
536 */
537 return pte;
538}
539
4448aaf0 540static inline pte_t pte_mkold(pte_t pte)
1da177e4
LT		 541{
542 /* S/390 doesn't keep its dirty/referenced bit in the pte.
543 * There is no point in clearing the real referenced bit.
544 */
545 return pte;
546}
547
4448aaf0 548static inline pte_t pte_mkyoung(pte_t pte)
1da177e4
LT		 549{
550 /* S/390 doesn't keep its dirty/referenced bit in the pte.
551 * There is no point in setting the real referenced bit.
552 */
553 return pte;
554}
555
556static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
557{
558 return 0;
559}
560
561static inline int
562ptep_clear_flush_young(struct vm_area_struct *vma,
563 unsigned long address, pte_t *ptep)
564{
565 /* No need to flush TLB; bits are in storage key */
566 return ptep_test_and_clear_young(vma, address, ptep);
567}
568
569static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
570{
571 return 0;
572}
573
574static inline int
575ptep_clear_flush_dirty(struct vm_area_struct *vma,
576 unsigned long address, pte_t *ptep)
577{
578 /* No need to flush TLB; bits are in storage key */
579 return ptep_test_and_clear_dirty(vma, address, ptep);
580}
581
582static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
583{
584 pte_t pte = *ptep;
585 pte_clear(mm, addr, ptep);
586 return pte;
587}
588
9282ed92 589static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1da177e4 590{
9282ed92 591 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
1da177e4 592#ifndef __s390x__
1da177e4
LT		 593 /* S390 has 1mb segments, we are emulating 4MB segments */
594 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
9282ed92
GS		 595#else
596 /* ipte in zarch mode can do the math */
597 pte_t *pto = ptep;
598#endif
94c12cc7
MS		 599 asm volatile(
600 " ipte %2,%3"
601 : "=m" (*ptep) : "m" (*ptep),
602 "a" (pto), "a" (address));
1da177e4 603 }
9282ed92
GS		 604 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
605}
606
607static inline pte_t
608ptep_clear_flush(struct vm_area_struct *vma,
609 unsigned long address, pte_t *ptep)
610{
611 pte_t pte = *ptep;
612
613 __ptep_ipte(address, ptep);
1da177e4
LT		 614 return pte;
615}
616
617static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
618{
619 pte_t old_pte = *ptep;
620 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
621}
622
623static inline void
624ptep_establish(struct vm_area_struct *vma,
625 unsigned long address, pte_t *ptep,
626 pte_t entry)
627{
628 ptep_clear_flush(vma, address, ptep);
629 set_pte(ptep, entry);
630}
631
632#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
633 ptep_establish(__vma, __address, __ptep, __entry)
634
635/*
636 * Test and clear dirty bit in storage key.
637 * We can't clear the changed bit atomically. This is a potential
638 * race against modification of the referenced bit. This function
639 * should therefore only be called if it is not mapped in any
640 * address space.
641 */
2dcea57a
HC		 642static inline int page_test_and_clear_dirty(struct page *page)
643{
0b2b6e1d 644 unsigned long physpage = page_to_phys(page);
2dcea57a
HC		 645 int skey = page_get_storage_key(physpage);
646
647 if (skey & _PAGE_CHANGED)
648 page_set_storage_key(physpage, skey & ~_PAGE_CHANGED);
649 return skey & _PAGE_CHANGED;
650}
1da177e4
LT		 651
652/*
653 * Test and clear referenced bit in storage key.
654 */
2dcea57a
HC		 655static inline int page_test_and_clear_young(struct page *page)
656{
0b2b6e1d 657 unsigned long physpage = page_to_phys(page);
2dcea57a
HC		 658 int ccode;
659
0b2b6e1d
HC		 660 asm volatile(
661 " rrbe 0,%1\n"
662 " ipm %0\n"
663 " srl %0,28\n"
2dcea57a
HC		 664 : "=d" (ccode) : "a" (physpage) : "cc" );
665 return ccode & 2;
666}
1da177e4
LT		 667
668/*
669 * Conversion functions: convert a page and protection to a page entry,
670 * and a page entry and page directory to the page they refer to.
671 */
672static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
673{
674 pte_t __pte;
675 pte_val(__pte) = physpage + pgprot_val(pgprot);
676 return __pte;
677}
678
2dcea57a
HC		 679static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
680{
0b2b6e1d 681 unsigned long physpage = page_to_phys(page);
1da177e4 682
2dcea57a
HC		 683 return mk_pte_phys(physpage, pgprot);
684}
685
686static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
687{
688 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
689
690 return mk_pte_phys(physpage, pgprot);
691}
1da177e4 692
1da177e4
LT		 693#ifdef __s390x__
694
2dcea57a
HC		 695static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
696{
697 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
698
699 return __pmd(physpage + pgprot_val(pgprot));
700}
1da177e4
LT		 701
702#endif /* __s390x__ */
703
704#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
705#define pte_page(x) pfn_to_page(pte_pfn(x))
706
46a82b2d 707#define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
1da177e4 708
0b2b6e1d 709#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1da177e4 710
46a82b2d
DM		 711#define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
712
0b2b6e1d 713#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
1da177e4
LT		 714
715/* to find an entry in a page-table-directory */
716#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
717#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
718
719/* to find an entry in a kernel page-table-directory */
720#define pgd_offset_k(address) pgd_offset(&init_mm, address)
721
722#ifndef __s390x__
723
724/* Find an entry in the second-level page table.. */
4448aaf0 725static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
1da177e4
LT		 726{
727 return (pmd_t *) dir;
728}
729
730#else /* __s390x__ */
731
732/* Find an entry in the second-level page table.. */
733#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
734#define pmd_offset(dir,addr) \
46a82b2d 735 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
1da177e4
LT		 736
737#endif /* __s390x__ */
738
739/* Find an entry in the third-level page table.. */
740#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
741#define pte_offset_kernel(pmd, address) \
46a82b2d 742 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
1da177e4
LT		 743#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
744#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
745#define pte_unmap(pte) do { } while (0)
746#define pte_unmap_nested(pte) do { } while (0)
747
748/*
749 * 31 bit swap entry format:
750 * A page-table entry has some bits we have to treat in a special way.
751 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
752 * exception will occur instead of a page translation exception. The
753 * specifiation exception has the bad habit not to store necessary
754 * information in the lowcore.
755 * Bit 21 and bit 22 are the page invalid bit and the page protection
756 * bit. We set both to indicate a swapped page.
757 * Bit 30 and 31 are used to distinguish the different page types. For
758 * a swapped page these bits need to be zero.
759 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
760 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
761 * plus 24 for the offset.
762 * 0| offset |0110|o|type |00|
763 * 0 0000000001111111111 2222 2 22222 33
764 * 0 1234567890123456789 0123 4 56789 01
765 *
766 * 64 bit swap entry format:
767 * A page-table entry has some bits we have to treat in a special way.
768 * Bits 52 and bit 55 have to be zero, otherwise an specification
769 * exception will occur instead of a page translation exception. The
770 * specifiation exception has the bad habit not to store necessary
771 * information in the lowcore.
772 * Bit 53 and bit 54 are the page invalid bit and the page protection
773 * bit. We set both to indicate a swapped page.
774 * Bit 62 and 63 are used to distinguish the different page types. For
775 * a swapped page these bits need to be zero.
776 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
777 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
778 * plus 56 for the offset.
779 * | offset |0110|o|type |00|
780 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
781 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
782 */
783#ifndef __s390x__
784#define __SWP_OFFSET_MASK (~0UL >> 12)
785#else
786#define __SWP_OFFSET_MASK (~0UL >> 11)
787#endif
4448aaf0 788static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1da177e4
LT		 789{
790 pte_t pte;
791 offset &= __SWP_OFFSET_MASK;
9282ed92 792 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1da177e4
LT		 793 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
794 return pte;
795}
796
797#define __swp_type(entry) (((entry).val >> 2) & 0x1f)
798#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
799#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
800
801#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
802#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
803
804#ifndef __s390x__
805# define PTE_FILE_MAX_BITS 26
806#else /* __s390x__ */
807# define PTE_FILE_MAX_BITS 59
808#endif /* __s390x__ */
809
810#define pte_to_pgoff(__pte) \
811 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
812
813#define pgoff_to_pte(__off) \
814 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
9282ed92 815 | _PAGE_TYPE_FILE })
1da177e4
LT		 816
817#endif /* !__ASSEMBLY__ */
818
819#define kern_addr_valid(addr) (1)
820
f4eb07c1
HC		 821extern int add_shared_memory(unsigned long start, unsigned long size);
822extern int remove_shared_memory(unsigned long start, unsigned long size);
823
1da177e4
LT		 824/*
825 * No page table caches to initialise
826 */
827#define pgtable_cache_init() do { } while (0)
828
f4eb07c1
HC		 829#define __HAVE_ARCH_MEMMAP_INIT
830extern void memmap_init(unsigned long, int, unsigned long, unsigned long);
831
1da177e4
LT		 832#define __HAVE_ARCH_PTEP_ESTABLISH
833#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
834#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
835#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
836#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
837#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
838#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
839#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
840#define __HAVE_ARCH_PTEP_SET_WRPROTECT
841#define __HAVE_ARCH_PTE_SAME
842#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
843#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
844#include <asm-generic/pgtable.h>
845
846#endif /* _S390_PAGE_H */
847
Linux kernel - Deliverables
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