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1da177e4 LT |
1 | #ifndef __ASM_SH_ATOMIC_H |
2 | #define __ASM_SH_ATOMIC_H | |
3 | ||
4 | /* | |
5 | * Atomic operations that C can't guarantee us. Useful for | |
6 | * resource counting etc.. | |
7 | * | |
8 | */ | |
9 | ||
10 | typedef struct { volatile int counter; } atomic_t; | |
11 | ||
12 | #define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) | |
13 | ||
14 | #define atomic_read(v) ((v)->counter) | |
15 | #define atomic_set(v,i) ((v)->counter = (i)) | |
16 | ||
e4c2cfee | 17 | #include <linux/compiler.h> |
1da177e4 LT |
18 | #include <asm/system.h> |
19 | ||
1efe4ce3 SM |
20 | #if defined(CONFIG_GUSA_RB) |
21 | #include <asm/atomic-grb.h> | |
22 | #elif defined(CONFIG_CPU_SH4A) | |
ec723fbe | 23 | #include <asm/atomic-llsc.h> |
781125ca | 24 | #else |
ec723fbe | 25 | #include <asm/atomic-irq.h> |
781125ca | 26 | #endif |
1da177e4 LT |
27 | |
28 | #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) | |
29 | ||
1da177e4 LT |
30 | #define atomic_dec_return(v) atomic_sub_return(1,(v)) |
31 | #define atomic_inc_return(v) atomic_add_return(1,(v)) | |
32 | ||
33 | /* | |
34 | * atomic_inc_and_test - increment and test | |
35 | * @v: pointer of type atomic_t | |
36 | * | |
37 | * Atomically increments @v by 1 | |
38 | * and returns true if the result is zero, or false for all | |
39 | * other cases. | |
40 | */ | |
41 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | |
42 | ||
43 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | |
44 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | |
45 | ||
46 | #define atomic_inc(v) atomic_add(1,(v)) | |
47 | #define atomic_dec(v) atomic_sub(1,(v)) | |
48 | ||
1efe4ce3 | 49 | #ifndef CONFIG_GUSA_RB |
4a6dae6d NP |
50 | static inline int atomic_cmpxchg(atomic_t *v, int old, int new) |
51 | { | |
52 | int ret; | |
53 | unsigned long flags; | |
54 | ||
55 | local_irq_save(flags); | |
56 | ret = v->counter; | |
57 | if (likely(ret == old)) | |
58 | v->counter = new; | |
59 | local_irq_restore(flags); | |
60 | ||
61 | return ret; | |
62 | } | |
63 | ||
8426e1f6 NP |
64 | static inline int atomic_add_unless(atomic_t *v, int a, int u) |
65 | { | |
66 | int ret; | |
67 | unsigned long flags; | |
68 | ||
69 | local_irq_save(flags); | |
70 | ret = v->counter; | |
71 | if (ret != u) | |
72 | v->counter += a; | |
73 | local_irq_restore(flags); | |
74 | ||
75 | return ret != u; | |
76 | } | |
1efe4ce3 SM |
77 | #endif |
78 | ||
79 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | |
8426e1f6 NP |
80 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) |
81 | ||
1da177e4 LT |
82 | /* Atomic operations are already serializing on SH */ |
83 | #define smp_mb__before_atomic_dec() barrier() | |
84 | #define smp_mb__after_atomic_dec() barrier() | |
85 | #define smp_mb__before_atomic_inc() barrier() | |
86 | #define smp_mb__after_atomic_inc() barrier() | |
87 | ||
d3cb4871 | 88 | #include <asm-generic/atomic.h> |
1da177e4 | 89 | #endif /* __ASM_SH_ATOMIC_H */ |