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af3c7dfe PM |
1 | /* |
2 | * include/asm-sh/processor.h | |
3 | * | |
4 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
5 | * Copyright (C) 2002, 2003 Paul Mundt | |
6 | */ | |
7 | ||
8 | #ifndef __ASM_SH_PROCESSOR_32_H | |
9 | #define __ASM_SH_PROCESSOR_32_H | |
10 | #ifdef __KERNEL__ | |
11 | ||
12 | #include <linux/compiler.h> | |
13 | #include <asm/page.h> | |
14 | #include <asm/types.h> | |
15 | #include <asm/cache.h> | |
16 | #include <asm/ptrace.h> | |
af3c7dfe PM |
17 | |
18 | /* | |
19 | * Default implementation of macro that returns current | |
20 | * instruction pointer ("program counter"). | |
21 | */ | |
22 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) | |
23 | ||
24 | /* Core Processor Version Register */ | |
25 | #define CCN_PVR 0xff000030 | |
26 | #define CCN_CVR 0xff000040 | |
27 | #define CCN_PRR 0xff000044 | |
28 | ||
29 | struct sh_cpuinfo { | |
30 | unsigned int type; | |
31 | unsigned long loops_per_jiffy; | |
32 | unsigned long asid_cache; | |
33 | ||
34 | struct cache_info icache; /* Primary I-cache */ | |
35 | struct cache_info dcache; /* Primary D-cache */ | |
36 | struct cache_info scache; /* Secondary cache */ | |
37 | ||
38 | unsigned long flags; | |
39 | } __attribute__ ((aligned(L1_CACHE_BYTES))); | |
40 | ||
41 | extern struct sh_cpuinfo cpu_data[]; | |
42 | #define boot_cpu_data cpu_data[0] | |
43 | #define current_cpu_data cpu_data[smp_processor_id()] | |
44 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | |
45 | ||
46 | /* | |
47 | * User space process size: 2GB. | |
48 | * | |
49 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff | |
50 | */ | |
51 | #define TASK_SIZE 0x7c000000UL | |
52 | ||
922a70d3 DH |
53 | #define STACK_TOP TASK_SIZE |
54 | #define STACK_TOP_MAX STACK_TOP | |
55 | ||
af3c7dfe PM |
56 | /* This decides where the kernel will search for a free chunk of vm |
57 | * space during mmap's. | |
58 | */ | |
59 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | |
60 | ||
61 | /* | |
62 | * Bit of SR register | |
63 | * | |
64 | * FD-bit: | |
65 | * When it's set, it means the processor doesn't have right to use FPU, | |
66 | * and it results exception when the floating operation is executed. | |
67 | * | |
68 | * IMASK-bit: | |
69 | * Interrupt level mask | |
70 | */ | |
af3c7dfe PM |
71 | #define SR_DSP 0x00001000 |
72 | #define SR_IMASK 0x000000f0 | |
9bbafce2 | 73 | #define SR_FD 0x00008000 |
af3c7dfe PM |
74 | |
75 | /* | |
76 | * FPU structure and data | |
77 | */ | |
78 | ||
79 | struct sh_fpu_hard_struct { | |
80 | unsigned long fp_regs[16]; | |
81 | unsigned long xfp_regs[16]; | |
82 | unsigned long fpscr; | |
83 | unsigned long fpul; | |
84 | ||
85 | long status; /* software status information */ | |
86 | }; | |
87 | ||
88 | /* Dummy fpu emulator */ | |
89 | struct sh_fpu_soft_struct { | |
90 | unsigned long fp_regs[16]; | |
91 | unsigned long xfp_regs[16]; | |
92 | unsigned long fpscr; | |
93 | unsigned long fpul; | |
94 | ||
95 | unsigned char lookahead; | |
96 | unsigned long entry_pc; | |
97 | }; | |
98 | ||
99 | union sh_fpu_union { | |
100 | struct sh_fpu_hard_struct hard; | |
101 | struct sh_fpu_soft_struct soft; | |
102 | }; | |
103 | ||
104 | struct thread_struct { | |
105 | /* Saved registers when thread is descheduled */ | |
106 | unsigned long sp; | |
107 | unsigned long pc; | |
108 | ||
109 | /* Hardware debugging registers */ | |
110 | unsigned long ubc_pc; | |
111 | ||
112 | /* floating point info */ | |
113 | union sh_fpu_union fpu; | |
114 | }; | |
115 | ||
116 | typedef struct { | |
117 | unsigned long seg; | |
118 | } mm_segment_t; | |
119 | ||
120 | /* Count of active tasks with UBC settings */ | |
121 | extern int ubc_usercnt; | |
122 | ||
123 | #define INIT_THREAD { \ | |
124 | .sp = sizeof(init_stack) + (long) &init_stack, \ | |
125 | } | |
126 | ||
127 | /* | |
128 | * Do necessary setup to start up a newly executed thread. | |
129 | */ | |
130 | #define start_thread(regs, new_pc, new_sp) \ | |
131 | set_fs(USER_DS); \ | |
132 | regs->pr = 0; \ | |
133 | regs->sr = SR_FD; /* User mode. */ \ | |
134 | regs->pc = new_pc; \ | |
135 | regs->regs[15] = new_sp | |
136 | ||
137 | /* Forward declaration, a strange C thing */ | |
138 | struct task_struct; | |
139 | struct mm_struct; | |
140 | ||
141 | /* Free all resources held by a thread. */ | |
142 | extern void release_thread(struct task_struct *); | |
143 | ||
144 | /* Prepare to copy thread state - unlazy all lazy status */ | |
145 | #define prepare_to_copy(tsk) do { } while (0) | |
146 | ||
147 | /* | |
148 | * create a kernel thread without removing it from tasklists | |
149 | */ | |
150 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | |
151 | ||
152 | /* Copy and release all segment info associated with a VM */ | |
153 | #define copy_segments(p, mm) do { } while(0) | |
154 | #define release_segments(mm) do { } while(0) | |
155 | ||
156 | /* | |
157 | * FPU lazy state save handling. | |
158 | */ | |
159 | ||
160 | static __inline__ void disable_fpu(void) | |
161 | { | |
162 | unsigned long __dummy; | |
163 | ||
164 | /* Set FD flag in SR */ | |
165 | __asm__ __volatile__("stc sr, %0\n\t" | |
166 | "or %1, %0\n\t" | |
167 | "ldc %0, sr" | |
168 | : "=&r" (__dummy) | |
169 | : "r" (SR_FD)); | |
170 | } | |
171 | ||
172 | static __inline__ void enable_fpu(void) | |
173 | { | |
174 | unsigned long __dummy; | |
175 | ||
176 | /* Clear out FD flag in SR */ | |
177 | __asm__ __volatile__("stc sr, %0\n\t" | |
178 | "and %1, %0\n\t" | |
179 | "ldc %0, sr" | |
180 | : "=&r" (__dummy) | |
181 | : "r" (~SR_FD)); | |
182 | } | |
183 | ||
af3c7dfe PM |
184 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ |
185 | #define FPSCR_INIT 0x00080000 | |
186 | ||
187 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ | |
188 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ | |
189 | ||
190 | /* | |
191 | * Return saved PC of a blocked thread. | |
192 | */ | |
193 | #define thread_saved_pc(tsk) (tsk->thread.pc) | |
194 | ||
195 | void show_trace(struct task_struct *tsk, unsigned long *sp, | |
196 | struct pt_regs *regs); | |
197 | extern unsigned long get_wchan(struct task_struct *p); | |
198 | ||
199 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | |
200 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | |
201 | ||
202 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | |
203 | #define cpu_relax() barrier() | |
204 | ||
205 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ | |
206 | defined(CONFIG_CPU_SH4) | |
207 | #define PREFETCH_STRIDE L1_CACHE_BYTES | |
208 | #define ARCH_HAS_PREFETCH | |
209 | #define ARCH_HAS_PREFETCHW | |
210 | static inline void prefetch(void *x) | |
211 | { | |
212 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | |
213 | } | |
214 | ||
215 | #define prefetchw(x) prefetch(x) | |
216 | #endif | |
217 | ||
af3c7dfe PM |
218 | #endif /* __KERNEL__ */ |
219 | #endif /* __ASM_SH_PROCESSOR_32_H */ |