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4cec1a37 NI |
1 | #ifndef __ASM_SH_SH7763RDP_H |
2 | #define __ASM_SH_SH7763RDP_H | |
3 | ||
4 | /* | |
5 | * linux/include/asm-sh/sh7763drp.h | |
6 | * | |
7 | * Copyright (C) 2008 Renesas Solutions | |
8 | * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
13 | * | |
14 | */ | |
15 | #include <asm/addrspace.h> | |
16 | ||
17 | /* clock control */ | |
18 | #define MSTPCR1 0xFFC80038 | |
19 | ||
20 | /* PORT */ | |
21 | #define PORT_PSEL0 0xFFEF0070 | |
22 | #define PORT_PSEL1 0xFFEF0072 | |
23 | #define PORT_PSEL2 0xFFEF0074 | |
24 | #define PORT_PSEL3 0xFFEF0076 | |
25 | #define PORT_PSEL4 0xFFEF0078 | |
26 | ||
27 | #define PORT_PACR 0xFFEF0000 | |
28 | #define PORT_PCCR 0xFFEF0004 | |
29 | #define PORT_PFCR 0xFFEF000A | |
30 | #define PORT_PGCR 0xFFEF000C | |
31 | #define PORT_PHCR 0xFFEF000E | |
32 | #define PORT_PICR 0xFFEF0010 | |
33 | #define PORT_PJCR 0xFFEF0012 | |
34 | #define PORT_PKCR 0xFFEF0014 | |
35 | #define PORT_PLCR 0xFFEF0016 | |
36 | #define PORT_PMCR 0xFFEF0018 | |
37 | #define PORT_PNCR 0xFFEF001A | |
38 | ||
39 | /* FPGA */ | |
40 | #define CPLD_BOARD_ID_ERV_REG 0xB1000000 | |
41 | #define CPLD_CPLD_CMD_REG 0xB1000006 | |
42 | ||
43 | /* | |
44 | * USB SH7763RDP board can use Host only. | |
45 | */ | |
46 | #define USB_USBHSC 0xFFEC80f0 | |
47 | ||
48 | /* arch/sh/boards/renesas/sh7763rdp/irq.c */ | |
49 | void init_sh7763rdp_IRQ(void); | |
50 | int sh7763rdp_irq_demux(int irq); | |
51 | #define __IO_PREFIX sh7763rdp | |
52 | #include <asm/io_generic.h> | |
53 | ||
54 | #endif /* __ASM_SH_SH7763RDP_H */ |