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6662327e BZ |
1 | /* ide.h: SPARC PCI specific IDE glue. |
2 | * | |
3 | * Copyright (C) 1997 David S. Miller (davem@davemloft.net) | |
4 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) | |
5 | * Adaptation from sparc64 version to sparc by Pete Zaitcev. | |
6 | */ | |
7 | ||
8 | #ifndef _SPARC_IDE_H | |
9 | #define _SPARC_IDE_H | |
10 | ||
11 | #ifdef __KERNEL__ | |
12 | ||
13 | #include <asm/io.h> | |
14 | #ifdef CONFIG_SPARC64 | |
15 | #include <asm/pgalloc.h> | |
16 | #include <asm/spitfire.h> | |
17 | #include <asm/cacheflush.h> | |
18 | #include <asm/page.h> | |
f5e706ad | 19 | #else |
6662327e BZ |
20 | #include <asm/pgtable.h> |
21 | #include <asm/psr.h> | |
f5e706ad | 22 | #endif |
6662327e | 23 | |
6662327e BZ |
24 | #define __ide_insl(data_reg, buffer, wcount) \ |
25 | __ide_insw(data_reg, buffer, (wcount)<<1) | |
26 | #define __ide_outsl(data_reg, buffer, wcount) \ | |
27 | __ide_outsw(data_reg, buffer, (wcount)<<1) | |
28 | ||
29 | /* On sparc, I/O ports and MMIO registers are accessed identically. */ | |
30 | #define __ide_mm_insw __ide_insw | |
31 | #define __ide_mm_insl __ide_insl | |
32 | #define __ide_mm_outsw __ide_outsw | |
33 | #define __ide_mm_outsl __ide_outsl | |
34 | ||
35 | static inline void __ide_insw(void __iomem *port, void *dst, u32 count) | |
36 | { | |
37 | #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) | |
38 | unsigned long end = (unsigned long)dst + (count << 1); | |
f5e706ad | 39 | #endif |
6662327e BZ |
40 | u16 *ps = dst; |
41 | u32 *pi; | |
42 | ||
43 | if(((unsigned long)ps) & 0x2) { | |
44 | *ps++ = __raw_readw(port); | |
45 | count--; | |
46 | } | |
47 | pi = (u32 *)ps; | |
48 | while(count >= 2) { | |
49 | u32 w; | |
50 | ||
51 | w = __raw_readw(port) << 16; | |
52 | w |= __raw_readw(port); | |
53 | *pi++ = w; | |
54 | count -= 2; | |
55 | } | |
56 | ps = (u16 *)pi; | |
57 | if(count) | |
58 | *ps++ = __raw_readw(port); | |
59 | ||
60 | #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) | |
61 | __flush_dcache_range((unsigned long)dst, end); | |
62 | #endif | |
63 | } | |
64 | ||
65 | static inline void __ide_outsw(void __iomem *port, const void *src, u32 count) | |
66 | { | |
67 | #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) | |
68 | unsigned long end = (unsigned long)src + (count << 1); | |
69 | #endif | |
70 | const u16 *ps = src; | |
71 | const u32 *pi; | |
72 | ||
73 | if(((unsigned long)src) & 0x2) { | |
74 | __raw_writew(*ps++, port); | |
75 | count--; | |
76 | } | |
77 | pi = (const u32 *)ps; | |
78 | while(count >= 2) { | |
79 | u32 w; | |
80 | ||
81 | w = *pi++; | |
82 | __raw_writew((w >> 16), port); | |
83 | __raw_writew(w, port); | |
84 | count -= 2; | |
85 | } | |
86 | ps = (const u16 *)pi; | |
87 | if(count) | |
88 | __raw_writew(*ps, port); | |
89 | ||
90 | #if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) | |
91 | __flush_dcache_range((unsigned long)src, end); | |
92 | #endif | |
93 | } | |
94 | ||
95 | #endif /* __KERNEL__ */ | |
96 | ||
97 | #endif /* _SPARC_IDE_H */ |