[deliverable/linux.git] / include / asm-sparc64 / irq.h

/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $
 * irq.h: IRQ registers on the 64-bit Sparc.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
 */

#ifndef _SPARC64_IRQ_H
#define _SPARC64_IRQ_H

#include <linux/linkage.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <asm/pil.h>
#include <asm/ptrace.h>

/* IMAP/ICLR register defines */
#define IMAP_VALID		0x80000000	/* IRQ Enabled		*/
#define IMAP_TID_UPA		0x7c000000	/* UPA TargetID		*/
#define IMAP_TID_JBUS		0x7c000000	/* JBUS TargetID	*/
#define IMAP_TID_SHIFT		26
#define IMAP_AID_SAFARI		0x7c000000	/* Safari AgentID	*/
#define IMAP_AID_SHIFT		26
#define IMAP_NID_SAFARI		0x03e00000	/* Safari NodeID	*/
#define IMAP_NID_SHIFT		21
#define IMAP_IGN		0x000007c0	/* IRQ Group Number	*/
#define IMAP_INO		0x0000003f	/* IRQ Number		*/
#define IMAP_INR		0x000007ff	/* Full interrupt number*/

#define ICLR_IDLE		0x00000000	/* Idle state		*/
#define ICLR_TRANSMIT		0x00000001	/* Transmit state	*/
#define ICLR_PENDING		0x00000003	/* Pending state	*/

/* The largest number of unique interrupt sources we support.
 * If this needs to ever be larger than 255, you need to change
 * the type of ino_bucket->virt_irq as appropriate.
 *
 * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
 */
#define NR_IRQS    255

extern void irq_install_pre_handler(int virt_irq,
				    void (*func)(unsigned int, void *, void *),
				    void *arg1, void *arg2);
#define irq_canonicalize(irq)	(irq)
extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
				    unsigned int msi_devino_start,
				    unsigned int msi_devino_end);
extern void sun4v_destroy_msi(unsigned int virt_irq);
extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);

extern void fixup_irqs(void);

static __inline__ void set_softint(unsigned long bits)
{
	__asm__ __volatile__("wr	%0, 0x0, %%set_softint"
			     : /* No outputs */
			     : "r" (bits));
}

static __inline__ void clear_softint(unsigned long bits)
{
	__asm__ __volatile__("wr	%0, 0x0, %%clear_softint"
			     : /* No outputs */
			     : "r" (bits));
}

static __inline__ unsigned long get_softint(void)
{
	unsigned long retval;

	__asm__ __volatile__("rd	%%softint, %0"
			     : "=r" (retval));
	return retval;
}

#endif
Commit	Line	Data
1da177e4 LT	1	/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $
	2	* irq.h: IRQ registers on the 64-bit Sparc.
	3	*
	4	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	5	* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
	6	*/
	7
	8	#ifndef _SPARC64_IRQ_H
	9	#define _SPARC64_IRQ_H
	10
1da177e4 LT	11	#include <linux/linkage.h>
	12	#include <linux/kernel.h>
	13	#include <linux/errno.h>
	14	#include <linux/interrupt.h>
	15	#include <asm/pil.h>
	16	#include <asm/ptrace.h>
	17
1da177e4 LT	18	/* IMAP/ICLR register defines */
	19	#define IMAP_VALID 0x80000000 /* IRQ Enabled */
	20	#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
	21	#define IMAP_TID_JBUS 0x7c000000 /* JBUS TargetID */
ebd8c56c	22	#define IMAP_TID_SHIFT 26
1da177e4	23	#define IMAP_AID_SAFARI 0x7c000000 /* Safari AgentID */
ebd8c56c	24	#define IMAP_AID_SHIFT 26
1da177e4	25	#define IMAP_NID_SAFARI 0x03e00000 /* Safari NodeID */
ebd8c56c	26	#define IMAP_NID_SHIFT 21
1da177e4 LT	27	#define IMAP_IGN 0x000007c0 /* IRQ Group Number */
	28	#define IMAP_INO 0x0000003f /* IRQ Number */
	29	#define IMAP_INR 0x000007ff /* Full interrupt number*/
	30
	31	#define ICLR_IDLE 0x00000000 /* Idle state */
	32	#define ICLR_TRANSMIT 0x00000001 /* Transmit state */
	33	#define ICLR_PENDING 0x00000003 /* Pending state */
	34
8047e247 DM	35	/* The largest number of unique interrupt sources we support.
	36	* If this needs to ever be larger than 255, you need to change
	37	* the type of ino_bucket->virt_irq as appropriate.
	38	*
	39	* ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
	40	*/
	41	#define NR_IRQS 255
1da177e4	42
8047e247	43	extern void irq_install_pre_handler(int virt_irq,
e18e2a00	44	void (func)(unsigned int, void , void *),
8047e247	45	void arg1, void arg2);
1da177e4	46	#define irq_canonicalize(irq) (irq)
e18e2a00 DM	47	extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
e18e2a00 DM	48	extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
4a907dec	49	extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
35a17eb6 DM	50	extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
	51	unsigned int msi_devino_start,
	52	unsigned int msi_devino_end);
	53	extern void sun4v_destroy_msi(unsigned int virt_irq);
1da177e4 LT	54	extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
1da177e4 LT	55
e0204409 DM	56	extern void fixup_irqs(void);
e0204409 DM	57
1da177e4 LT	58	static __inline__ void set_softint(unsigned long bits)
	59	{
	60	__asm__ __volatile__("wr %0, 0x0, %%set_softint"
	61	: /* No outputs */
	62	: "r" (bits));
	63	}
	64
	65	static __inline__ void clear_softint(unsigned long bits)
	66	{
	67	__asm__ __volatile__("wr %0, 0x0, %%clear_softint"
	68	: /* No outputs */
	69	: "r" (bits));
	70	}
	71
	72	static __inline__ unsigned long get_softint(void)
	73	{
	74	unsigned long retval;
	75
	76	__asm__ __volatile__("rd %%softint, %0"
	77	: "=r" (retval));
	78	return retval;
	79	}
	80
1da177e4	81	#endif