[deliverable/linux.git] / include / asm-x86 / dma-mapping.h

#ifndef _ASM_DMA_MAPPING_H_
#define _ASM_DMA_MAPPING_H_

/*
 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
 * documentation.
 */

#include <linux/scatterlist.h>
#include <asm/io.h>
#include <asm/swiotlb.h>
#include <asm-generic/dma-coherent.h>

extern dma_addr_t bad_dma_address;
extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow;

struct dma_mapping_ops {
	int             (*mapping_error)(struct device *dev,
					 dma_addr_t dma_addr);
	void*           (*alloc_coherent)(struct device *dev, size_t size,
				dma_addr_t *dma_handle, gfp_t gfp);
	void            (*free_coherent)(struct device *dev, size_t size,
				void *vaddr, dma_addr_t dma_handle);
	dma_addr_t      (*map_single)(struct device *hwdev, phys_addr_t ptr,
				size_t size, int direction);
	void            (*unmap_single)(struct device *dev, dma_addr_t addr,
				size_t size, int direction);
	void            (*sync_single_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_range_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_single_range_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_sg_for_cpu)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	void            (*sync_sg_for_device)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
				int nents, int direction);
	void            (*unmap_sg)(struct device *hwdev,
				struct scatterlist *sg, int nents,
				int direction);
	int             (*dma_supported)(struct device *hwdev, u64 mask);
	int		is_phys;
};

extern struct dma_mapping_ops *dma_ops;

static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
{
#ifdef CONFIG_X86_32
	return dma_ops;
#else
	if (unlikely(!dev) || !dev->archdata.dma_ops)
		return dma_ops;
	else
		return dev->archdata.dma_ops;
#endif
}

/* Make sure we keep the same behaviour */
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
#ifdef CONFIG_X86_32
	return 0;
#else
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	if (ops->mapping_error)
		return ops->mapping_error(dev, dma_addr);

	return (dma_addr == bad_dma_address);
#endif
}

#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#define dma_is_consistent(d, h)	(1)

extern int dma_supported(struct device *hwdev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 mask);

static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
	       int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
}

static inline void
dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
		 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_single)
		ops->unmap_single(dev, addr, size, direction);
}

static inline int
dma_map_sg(struct device *hwdev, struct scatterlist *sg,
	   int nents, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_sg(hwdev, sg, nents, direction);
}

static inline void
dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
	     int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_sg)
		ops->unmap_sg(hwdev, sg, nents, direction);
}

static inline void
dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_cpu)
		ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
			   size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_device)
		ops->sync_single_for_device(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			      unsigned long offset, size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_cpu)
		ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
					       size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
				 unsigned long offset, size_t size,
				 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_device)
		ops->sync_single_range_for_device(hwdev, dma_handle,
						  offset, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
		    int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_cpu)
		ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
		       int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_device)
		ops->sync_sg_for_device(hwdev, sg, nelems, direction);

	flush_write_buffers();
}

static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
				      size_t offset, size_t size,
				      int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_single(dev, page_to_phys(page) + offset,
			       size, direction);
}

static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
				  size_t size, int direction)
{
	dma_unmap_single(dev, addr, size, direction);
}

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

static inline int dma_get_cache_alignment(void)
{
	/* no easy way to get cache size on all x86, so return the
	 * maximum possible, to be safe */
	return boot_cpu_data.x86_clflush_size;
}

static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
						    gfp_t gfp)
{
	unsigned long dma_mask = 0;

	dma_mask = dev->coherent_dma_mask;
	if (!dma_mask)
		dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;

	return dma_mask;
}

static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
#ifdef CONFIG_X86_64
	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);

	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
		gfp |= GFP_DMA32;
#endif
       return gfp;
}

static inline void *
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	void *memory;

	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);

	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
		return memory;

	if (!dev) {
		dev = &x86_dma_fallback_dev;
		gfp |= GFP_DMA;
	}

	if (!is_device_dma_capable(dev))
		return NULL;

	if (!ops->alloc_coherent)
		return NULL;

	return ops->alloc_coherent(dev, size, dma_handle,
				   dma_alloc_coherent_gfp_flags(dev, gfp));
}

static inline void dma_free_coherent(struct device *dev, size_t size,
				     void *vaddr, dma_addr_t bus)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	WARN_ON(irqs_disabled());       /* for portability */

	if (dma_release_from_coherent(dev, get_order(size), vaddr))
		return;

	if (ops->free_coherent)
		ops->free_coherent(dev, size, vaddr, bus);
}

#endif
Commit	Line	Data
6f536635 GC	1	#ifndef _ASM_DMA_MAPPING_H_
	2	#define _ASM_DMA_MAPPING_H_
	3
	4	/*
	5	* IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
	6	* documentation.
	7	*/
	8
	9	#include <linux/scatterlist.h>
	10	#include <asm/io.h>
	11	#include <asm/swiotlb.h>
6c505ce3	12	#include <asm-generic/dma-coherent.h>
6f536635	13
7c183416	14	extern dma_addr_t bad_dma_address;
b7107a3d	15	extern int iommu_merge;
6c505ce3	16	extern struct device x86_dma_fallback_dev;
b7107a3d	17	extern int panic_on_overflow;
7c183416	18
6f536635	19	struct dma_mapping_ops {
8d8bb39b FT	20	int (mapping_error)(struct device dev,
8d8bb39b FT	21	dma_addr_t dma_addr);
6f536635 GC	22	void* (alloc_coherent)(struct device dev, size_t size,
	23	dma_addr_t *dma_handle, gfp_t gfp);
	24	void (free_coherent)(struct device dev, size_t size,
	25	void *vaddr, dma_addr_t dma_handle);
2be62149	26	dma_addr_t (map_single)(struct device hwdev, phys_addr_t ptr,
6f536635	27	size_t size, int direction);
6f536635 GC	28	void (unmap_single)(struct device dev, dma_addr_t addr,
	29	size_t size, int direction);
	30	void (sync_single_for_cpu)(struct device hwdev,
	31	dma_addr_t dma_handle, size_t size,
	32	int direction);
	33	void (sync_single_for_device)(struct device hwdev,
	34	dma_addr_t dma_handle, size_t size,
	35	int direction);
	36	void (sync_single_range_for_cpu)(struct device hwdev,
	37	dma_addr_t dma_handle, unsigned long offset,
	38	size_t size, int direction);
	39	void (sync_single_range_for_device)(struct device hwdev,
	40	dma_addr_t dma_handle, unsigned long offset,
	41	size_t size, int direction);
	42	void (sync_sg_for_cpu)(struct device hwdev,
	43	struct scatterlist *sg, int nelems,
	44	int direction);
	45	void (sync_sg_for_device)(struct device hwdev,
	46	struct scatterlist *sg, int nelems,
	47	int direction);
	48	int (map_sg)(struct device hwdev, struct scatterlist *sg,
	49	int nents, int direction);
	50	void (unmap_sg)(struct device hwdev,
	51	struct scatterlist *sg, int nents,
	52	int direction);
	53	int (dma_supported)(struct device hwdev, u64 mask);
	54	int is_phys;
	55	};
	56
8d8bb39b	57	extern struct dma_mapping_ops *dma_ops;
22456b97	58
8d8bb39b	59	static inline struct dma_mapping_ops get_dma_ops(struct device dev)
c786df08	60	{
8d8bb39b FT	61	#ifdef CONFIG_X86_32
	62	return dma_ops;
	63	#else
	64	if (unlikely(!dev) \|\| !dev->archdata.dma_ops)
	65	return dma_ops;
	66	else
	67	return dev->archdata.dma_ops;
	68	#endif
	69	}
	70
	71	/* Make sure we keep the same behaviour */
	72	static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
	73	{
	74	#ifdef CONFIG_X86_32
	75	return 0;
	76	#else
	77	struct dma_mapping_ops *ops = get_dma_ops(dev);
	78	if (ops->mapping_error)
	79	return ops->mapping_error(dev, dma_addr);
c786df08 GC	80
c786df08 GC	81	return (dma_addr == bad_dma_address);
8d8bb39b	82	#endif
c786df08 GC	83	}
c786df08 GC	84
8d396ded GC	85	#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
8d396ded GC	86	#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
6c505ce3	87	#define dma_is_consistent(d, h) (1)
8d396ded	88
802c1f66 GC	89	extern int dma_supported(struct device *hwdev, u64 mask);
	90	extern int dma_set_mask(struct device *dev, u64 mask);
	91
22456b97 GC	92	static inline dma_addr_t
	93	dma_map_single(struct device hwdev, void ptr, size_t size,
	94	int direction)
	95	{
8d8bb39b FT	96	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	97
22456b97	98	BUG_ON(!valid_dma_direction(direction));
8d8bb39b	99	return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
22456b97 GC	100	}
22456b97 GC	101
0cb0ae68 GC	102	static inline void
	103	dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
	104	int direction)
	105	{
8d8bb39b FT	106	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	107
0cb0ae68	108	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	109	if (ops->unmap_single)
8d8bb39b FT	110	ops->unmap_single(dev, addr, size, direction);
0cb0ae68 GC	111	}
0cb0ae68 GC	112
16a3ce9b GC	113	static inline int
	114	dma_map_sg(struct device hwdev, struct scatterlist sg,
	115	int nents, int direction)
	116	{
8d8bb39b FT	117	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	118
16a3ce9b	119	BUG_ON(!valid_dma_direction(direction));
8d8bb39b	120	return ops->map_sg(hwdev, sg, nents, direction);
16a3ce9b	121	}
72c784f8 GC	122
	123	static inline void
	124	dma_unmap_sg(struct device hwdev, struct scatterlist sg, int nents,
	125	int direction)
	126	{
8d8bb39b FT	127	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	128
72c784f8	129	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	130	if (ops->unmap_sg)
8d8bb39b FT	131	ops->unmap_sg(hwdev, sg, nents, direction);
72c784f8	132	}
c01dd8cf GC	133
	134	static inline void
	135	dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	136	size_t size, int direction)
	137	{
8d8bb39b FT	138	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	139
c01dd8cf	140	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	141	if (ops->sync_single_for_cpu)
8d8bb39b FT	142	ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
c01dd8cf GC	143	flush_write_buffers();
	144	}
	145
9231b269 GC	146	static inline void
	147	dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
	148	size_t size, int direction)
	149	{
8d8bb39b FT	150	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	151
9231b269	152	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	153	if (ops->sync_single_for_device)
8d8bb39b FT	154	ops->sync_single_for_device(hwdev, dma_handle, size, direction);
9231b269 GC	155	flush_write_buffers();
	156	}
	157
627610fc GC	158	static inline void
	159	dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	160	unsigned long offset, size_t size, int direction)
	161	{
8d8bb39b	162	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
627610fc	163
8d8bb39b FT	164	BUG_ON(!valid_dma_direction(direction));
	165	if (ops->sync_single_range_for_cpu)
	166	ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
	167	size, direction);
627610fc GC	168	flush_write_buffers();
627610fc GC	169	}
71362332 GC	170
	171	static inline void
	172	dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
	173	unsigned long offset, size_t size,
	174	int direction)
	175	{
8d8bb39b	176	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
71362332	177
8d8bb39b FT	178	BUG_ON(!valid_dma_direction(direction));
	179	if (ops->sync_single_range_for_device)
	180	ops->sync_single_range_for_device(hwdev, dma_handle,
	181	offset, size, direction);
71362332 GC	182	flush_write_buffers();
	183	}
	184
ed435dee GC	185	static inline void
	186	dma_sync_sg_for_cpu(struct device hwdev, struct scatterlist sg,
	187	int nelems, int direction)
	188	{
8d8bb39b FT	189	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	190
ed435dee	191	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	192	if (ops->sync_sg_for_cpu)
8d8bb39b FT	193	ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
ed435dee GC	194	flush_write_buffers();
ed435dee GC	195	}
e7f3a913 GC	196
	197	static inline void
	198	dma_sync_sg_for_device(struct device hwdev, struct scatterlist sg,
	199	int nelems, int direction)
	200	{
8d8bb39b FT	201	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	202
e7f3a913	203	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	204	if (ops->sync_sg_for_device)
8d8bb39b FT	205	ops->sync_sg_for_device(hwdev, sg, nelems, direction);
e7f3a913 GC	206
	207	flush_write_buffers();
	208	}
4d92fbf2 GC	209
	210	static inline dma_addr_t dma_map_page(struct device dev, struct page page,
	211	size_t offset, size_t size,
	212	int direction)
	213	{
8d8bb39b FT	214	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	215
2be62149	216	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	217	return ops->map_single(dev, page_to_phys(page) + offset,
8d8bb39b FT	218	size, direction);
4d92fbf2 GC	219	}
	220
	221	static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
	222	size_t size, int direction)
	223	{
	224	dma_unmap_single(dev, addr, size, direction);
	225	}
	226
3cb6a917 GC	227	static inline void
	228	dma_cache_sync(struct device dev, void vaddr, size_t size,
	229	enum dma_data_direction dir)
	230	{
	231	flush_write_buffers();
	232	}
ae17a63b	233
b7107a3d GC	234	static inline int dma_get_cache_alignment(void)
	235	{
	236	/* no easy way to get cache size on all x86, so return the
	237	* maximum possible, to be safe */
	238	return boot_cpu_data.x86_clflush_size;
	239	}
	240
823e7e8c FT	241	static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
	242	gfp_t gfp)
	243	{
	244	unsigned long dma_mask = 0;
	245
	246	dma_mask = dev->coherent_dma_mask;
	247	if (!dma_mask)
	248	dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
	249
	250	return dma_mask;
	251	}
	252
	253	static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
	254	{
9fcaff0e	255	#ifdef CONFIG_X86_64
823e7e8c FT	256	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
823e7e8c FT	257
823e7e8c FT	258	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
	259	gfp \|= GFP_DMA32;
	260	#endif
	261	return gfp;
	262	}
	263
6c505ce3 JR	264	static inline void *
	265	dma_alloc_coherent(struct device dev, size_t size, dma_addr_t dma_handle,
	266	gfp_t gfp)
	267	{
	268	struct dma_mapping_ops *ops = get_dma_ops(dev);
	269	void *memory;
	270
8a53ad67 FT	271	gfp &= ~(__GFP_DMA \| __GFP_HIGHMEM \| __GFP_DMA32);
8a53ad67 FT	272
6c505ce3 JR	273	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
	274	return memory;
	275
	276	if (!dev) {
	277	dev = &x86_dma_fallback_dev;
	278	gfp \|= GFP_DMA;
	279	}
	280
98216260	281	if (!is_device_dma_capable(dev))
de9f521f FT	282	return NULL;
de9f521f FT	283
823e7e8c FT	284	if (!ops->alloc_coherent)
	285	return NULL;
	286
	287	return ops->alloc_coherent(dev, size, dma_handle,
	288	dma_alloc_coherent_gfp_flags(dev, gfp));
6c505ce3 JR	289	}
	290
	291	static inline void dma_free_coherent(struct device *dev, size_t size,
	292	void *vaddr, dma_addr_t bus)
	293	{
	294	struct dma_mapping_ops *ops = get_dma_ops(dev);
	295
	296	WARN_ON(irqs_disabled()); /* for portability */
	297
	298	if (dma_release_from_coherent(dev, get_order(size), vaddr))
	299	return;
	300
	301	if (ops->free_coherent)
	302	ops->free_coherent(dev, size, vaddr, bus);
	303	}
b7107a3d	304
6f536635	305	#endif