[deliverable/linux.git] / include / asm-x86 / geode.h

/*
 * AMD Geode definitions
 * Copyright (C) 2006, Advanced Micro Devices, Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of version 2 of the GNU General Public License
 * as published by the Free Software Foundation.
 */

#ifndef _ASM_GEODE_H_
#define _ASM_GEODE_H_

#include <asm/processor.h>
#include <linux/io.h>

/* Generic southbridge functions */

#define GEODE_DEV_PMS 0
#define GEODE_DEV_ACPI 1
#define GEODE_DEV_GPIO 2
#define GEODE_DEV_MFGPT 3

extern int geode_get_dev_base(unsigned int dev);

/* Useful macros */
#define geode_pms_base()	geode_get_dev_base(GEODE_DEV_PMS)
#define geode_acpi_base()	geode_get_dev_base(GEODE_DEV_ACPI)
#define geode_gpio_base()	geode_get_dev_base(GEODE_DEV_GPIO)
#define geode_mfgpt_base()	geode_get_dev_base(GEODE_DEV_MFGPT)

/* MSRS */

#define MSR_LX_GLD_MSR_CONFIG	0x48002001
#define MSR_LX_MSR_PADSEL	0x48002011	/* NOT 0x48000011; the data
						 * sheet has the wrong value */
#define MSR_GLCP_SYS_RSTPLL	0x4C000014
#define MSR_GLCP_DOTPLL		0x4C000015

#define MSR_LBAR_SMB		0x5140000B
#define MSR_LBAR_GPIO		0x5140000C
#define MSR_LBAR_MFGPT		0x5140000D
#define MSR_LBAR_ACPI		0x5140000E
#define MSR_LBAR_PMS		0x5140000F

#define MSR_DIVIL_SOFT_RESET	0x51400017

#define MSR_PIC_YSEL_LOW	0x51400020
#define MSR_PIC_YSEL_HIGH	0x51400021
#define MSR_PIC_ZSEL_LOW	0x51400022
#define MSR_PIC_ZSEL_HIGH	0x51400023

#define MSR_MFGPT_IRQ		0x51400028
#define MSR_MFGPT_NR		0x51400029
#define MSR_MFGPT_SETUP		0x5140002B

#define MSR_LX_SPARE_MSR	0x80000011	/* DC-specific */

#define MSR_GX_GLD_MSR_CONFIG	0xC0002001
#define MSR_GX_MSR_PADSEL	0xC0002011

/* Resource Sizes */

#define LBAR_GPIO_SIZE		0xFF
#define LBAR_MFGPT_SIZE		0x40
#define LBAR_ACPI_SIZE		0x40
#define LBAR_PMS_SIZE		0x80

/* ACPI registers (PMS block) */

/*
 * PM1_EN is only valid when VSA is enabled for 16 bit reads.
 * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
 * with a 32 bit read at offset 0x0
 */

#define PM1_STS			0x00
#define PM1_EN			0x02
#define PM1_CNT			0x08
#define PM2_CNT			0x0C
#define PM_TMR			0x10
#define PM_GPE0_STS		0x18
#define PM_GPE0_EN		0x1C

/* PMC registers (PMS block) */

#define PM_SSD			0x00
#define PM_SCXA			0x04
#define PM_SCYA			0x08
#define PM_OUT_SLPCTL		0x0C
#define PM_SCLK			0x10
#define PM_SED			0x1
#define PM_SCXD			0x18
#define PM_SCYD			0x1C
#define PM_IN_SLPCTL		0x20
#define PM_WKD			0x30
#define PM_WKXD			0x34
#define PM_RD			0x38
#define PM_WKXA			0x3C
#define PM_FSD			0x40
#define PM_TSD			0x44
#define PM_PSD			0x48
#define PM_NWKD			0x4C
#define PM_AWKD			0x50
#define PM_SSC			0x54

/* GPIO */

#define GPIO_OUTPUT_VAL		0x00
#define GPIO_OUTPUT_ENABLE	0x04
#define GPIO_OUTPUT_OPEN_DRAIN	0x08
#define GPIO_OUTPUT_INVERT	0x0C
#define GPIO_OUTPUT_AUX1	0x10
#define GPIO_OUTPUT_AUX2	0x14
#define GPIO_PULL_UP		0x18
#define GPIO_PULL_DOWN		0x1C
#define GPIO_INPUT_ENABLE	0x20
#define GPIO_INPUT_INVERT	0x24
#define GPIO_INPUT_FILTER	0x28
#define GPIO_INPUT_EVENT_COUNT	0x2C
#define GPIO_READ_BACK		0x30
#define GPIO_INPUT_AUX1		0x34
#define GPIO_EVENTS_ENABLE	0x38
#define GPIO_LOCK_ENABLE	0x3C
#define GPIO_POSITIVE_EDGE_EN	0x40
#define GPIO_NEGATIVE_EDGE_EN	0x44
#define GPIO_POSITIVE_EDGE_STS	0x48
#define GPIO_NEGATIVE_EDGE_STS	0x4C

#define GPIO_MAP_X		0xE0
#define GPIO_MAP_Y		0xE4
#define GPIO_MAP_Z		0xE8
#define GPIO_MAP_W		0xEC

static inline u32 geode_gpio(unsigned int nr)
{
	BUG_ON(nr > 28);
	return 1 << nr;
}

extern void geode_gpio_set(u32, unsigned int);
extern void geode_gpio_clear(u32, unsigned int);
extern int geode_gpio_isset(u32, unsigned int);
extern void geode_gpio_setup_event(unsigned int, int, int);
extern void geode_gpio_set_irq(unsigned int, unsigned int);

static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
{
	geode_gpio_setup_event(gpio, pair, 0);
}

static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
{
	geode_gpio_setup_event(gpio, pair, 1);
}

/* Specific geode tests */

static inline int is_geode_gx(void)
{
	return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
		(boot_cpu_data.x86 == 5) &&
		(boot_cpu_data.x86_model == 5));
}

static inline int is_geode_lx(void)
{
	return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
		(boot_cpu_data.x86 == 5) &&
		(boot_cpu_data.x86_model == 10));
}

static inline int is_geode(void)
{
	return (is_geode_gx() || is_geode_lx());
}

/* MFGPTs */

#define MFGPT_MAX_TIMERS	8
#define MFGPT_TIMER_ANY		(-1)

#define MFGPT_DOMAIN_WORKING	1
#define MFGPT_DOMAIN_STANDBY	2
#define MFGPT_DOMAIN_ANY	(MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)

#define MFGPT_CMP1		0
#define MFGPT_CMP2		1

#define MFGPT_EVENT_IRQ		0
#define MFGPT_EVENT_NMI		1
#define MFGPT_EVENT_RESET	3

#define MFGPT_REG_CMP1		0
#define MFGPT_REG_CMP2		2
#define MFGPT_REG_COUNTER	4
#define MFGPT_REG_SETUP		6

#define MFGPT_SETUP_CNTEN	(1 << 15)
#define MFGPT_SETUP_CMP2	(1 << 14)
#define MFGPT_SETUP_CMP1	(1 << 13)
#define MFGPT_SETUP_SETUP	(1 << 12)
#define MFGPT_SETUP_STOPEN	(1 << 11)
#define MFGPT_SETUP_EXTEN	(1 << 10)
#define MFGPT_SETUP_REVEN	(1 << 5)
#define MFGPT_SETUP_CLKSEL	(1 << 4)

static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
{
	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
	outw(value, base + reg + (timer * 8));
}

static inline u16 geode_mfgpt_read(int timer, u16 reg)
{
	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
	return inw(base + reg + (timer * 8));
}

extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable);
extern int geode_mfgpt_alloc_timer(int timer, int domain);

#define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
#define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)

#ifdef CONFIG_GEODE_MFGPT_TIMER
extern int __init mfgpt_timer_setup(void);
#else
static inline int mfgpt_timer_setup(void) { return 0; }
#endif

#endif
Commit	Line	Data
f62e5184 AS	1	/*
	2	* AMD Geode definitions
	3	* Copyright (C) 2006, Advanced Micro Devices, Inc.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of version 2 of the GNU General Public License
	7	* as published by the Free Software Foundation.
	8	*/
	9
	10	#ifndef _ASM_GEODE_H_
	11	#define _ASM_GEODE_H_
	12
	13	#include <asm/processor.h>
	14	#include <linux/io.h>
	15
	16	/* Generic southbridge functions */
	17
	18	#define GEODE_DEV_PMS 0
	19	#define GEODE_DEV_ACPI 1
	20	#define GEODE_DEV_GPIO 2
	21	#define GEODE_DEV_MFGPT 3
	22
	23	extern int geode_get_dev_base(unsigned int dev);
	24
	25	/* Useful macros */
	26	#define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
	27	#define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
	28	#define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
	29	#define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
	30
	31	/* MSRS */
	32
32bf87e3 AS	33	#define MSR_LX_GLD_MSR_CONFIG 0x48002001
	34	#define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
	35	* sheet has the wrong value */
	36	#define MSR_GLCP_SYS_RSTPLL 0x4C000014
	37	#define MSR_GLCP_DOTPLL 0x4C000015
f62e5184 AS	38
	39	#define MSR_LBAR_SMB 0x5140000B
	40	#define MSR_LBAR_GPIO 0x5140000C
	41	#define MSR_LBAR_MFGPT 0x5140000D
	42	#define MSR_LBAR_ACPI 0x5140000E
	43	#define MSR_LBAR_PMS 0x5140000F
	44
0387f451 AS	45	#define MSR_DIVIL_SOFT_RESET 0x51400017
0387f451 AS	46
f62e5184 AS	47	#define MSR_PIC_YSEL_LOW 0x51400020
	48	#define MSR_PIC_YSEL_HIGH 0x51400021
	49	#define MSR_PIC_ZSEL_LOW 0x51400022
	50	#define MSR_PIC_ZSEL_HIGH 0x51400023
	51
32bf87e3 AS	52	#define MSR_MFGPT_IRQ 0x51400028
	53	#define MSR_MFGPT_NR 0x51400029
	54	#define MSR_MFGPT_SETUP 0x5140002B
	55
	56	#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
	57
	58	#define MSR_GX_GLD_MSR_CONFIG 0xC0002001
	59	#define MSR_GX_MSR_PADSEL 0xC0002011
f62e5184 AS	60
	61	/* Resource Sizes */
	62
	63	#define LBAR_GPIO_SIZE 0xFF
	64	#define LBAR_MFGPT_SIZE 0x40
	65	#define LBAR_ACPI_SIZE 0x40
	66	#define LBAR_PMS_SIZE 0x80
	67
	68	/* ACPI registers (PMS block) */
	69
	70	/*
	71	* PM1_EN is only valid when VSA is enabled for 16 bit reads.
	72	* When VSA is not enabled, always read both PM1_STS and PM1_EN
	73	* with a 32 bit read at offset 0x0
	74	*/
	75
	76	#define PM1_STS 0x00
	77	#define PM1_EN 0x02
	78	#define PM1_CNT 0x08
	79	#define PM2_CNT 0x0C
	80	#define PM_TMR 0x10
	81	#define PM_GPE0_STS 0x18
	82	#define PM_GPE0_EN 0x1C
	83
	84	/* PMC registers (PMS block) */
	85
	86	#define PM_SSD 0x00
	87	#define PM_SCXA 0x04
	88	#define PM_SCYA 0x08
	89	#define PM_OUT_SLPCTL 0x0C
	90	#define PM_SCLK 0x10
	91	#define PM_SED 0x1
	92	#define PM_SCXD 0x18
	93	#define PM_SCYD 0x1C
	94	#define PM_IN_SLPCTL 0x20
	95	#define PM_WKD 0x30
	96	#define PM_WKXD 0x34
	97	#define PM_RD 0x38
	98	#define PM_WKXA 0x3C
	99	#define PM_FSD 0x40
	100	#define PM_TSD 0x44
	101	#define PM_PSD 0x48
	102	#define PM_NWKD 0x4C
	103	#define PM_AWKD 0x50
	104	#define PM_SSC 0x54
	105
	106	/* GPIO */
	107
	108	#define GPIO_OUTPUT_VAL 0x00
	109	#define GPIO_OUTPUT_ENABLE 0x04
	110	#define GPIO_OUTPUT_OPEN_DRAIN 0x08
	111	#define GPIO_OUTPUT_INVERT 0x0C
	112	#define GPIO_OUTPUT_AUX1 0x10
	113	#define GPIO_OUTPUT_AUX2 0x14
	114	#define GPIO_PULL_UP 0x18
	115	#define GPIO_PULL_DOWN 0x1C
	116	#define GPIO_INPUT_ENABLE 0x20
	117	#define GPIO_INPUT_INVERT 0x24
	118	#define GPIO_INPUT_FILTER 0x28
	119	#define GPIO_INPUT_EVENT_COUNT 0x2C
	120	#define GPIO_READ_BACK 0x30
	121	#define GPIO_INPUT_AUX1 0x34
	122	#define GPIO_EVENTS_ENABLE 0x38
	123	#define GPIO_LOCK_ENABLE 0x3C
124	#define GPIO_POSITIVE_EDGE_EN 0x40
125	#define GPIO_NEGATIVE_EDGE_EN 0x44
126	#define GPIO_POSITIVE_EDGE_STS 0x48
127	#define GPIO_NEGATIVE_EDGE_STS 0x4C
128
129	#define GPIO_MAP_X 0xE0
130	#define GPIO_MAP_Y 0xE4
131	#define GPIO_MAP_Z 0xE8
132	#define GPIO_MAP_W 0xEC
133
ade76149 AS	134	static inline u32 geode_gpio(unsigned int nr)
	135	{
	136	BUG_ON(nr > 28);
	137	return 1 << nr;
	138	}
	139
	140	extern void geode_gpio_set(u32, unsigned int);
	141	extern void geode_gpio_clear(u32, unsigned int);
	142	extern int geode_gpio_isset(u32, unsigned int);
f62e5184 AS	143	extern void geode_gpio_setup_event(unsigned int, int, int);
	144	extern void geode_gpio_set_irq(unsigned int, unsigned int);
	145
	146	static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
	147	{
	148	geode_gpio_setup_event(gpio, pair, 0);
	149	}
	150
	151	static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
	152	{
	153	geode_gpio_setup_event(gpio, pair, 1);
	154	}
	155
	156	/* Specific geode tests */
	157
	158	static inline int is_geode_gx(void)
	159	{
	160	return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
	161	(boot_cpu_data.x86 == 5) &&
	162	(boot_cpu_data.x86_model == 5));
	163	}
	164
	165	static inline int is_geode_lx(void)
	166	{
	167	return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
	168	(boot_cpu_data.x86 == 5) &&
	169	(boot_cpu_data.x86_model == 10));
	170	}
	171
	172	static inline int is_geode(void)
	173	{
	174	return (is_geode_gx() \|\| is_geode_lx());
	175	}
	176
83d7384f AS	177	/* MFGPTs */
	178
	179	#define MFGPT_MAX_TIMERS 8
6394d982	180	#define MFGPT_TIMER_ANY (-1)
83d7384f AS	181
	182	#define MFGPT_DOMAIN_WORKING 1
	183	#define MFGPT_DOMAIN_STANDBY 2
	184	#define MFGPT_DOMAIN_ANY (MFGPT_DOMAIN_WORKING \| MFGPT_DOMAIN_STANDBY)
	185
	186	#define MFGPT_CMP1 0
	187	#define MFGPT_CMP2 1
	188
	189	#define MFGPT_EVENT_IRQ 0
	190	#define MFGPT_EVENT_NMI 1
	191	#define MFGPT_EVENT_RESET 3
	192
	193	#define MFGPT_REG_CMP1 0
	194	#define MFGPT_REG_CMP2 2
	195	#define MFGPT_REG_COUNTER 4
	196	#define MFGPT_REG_SETUP 6
	197
	198	#define MFGPT_SETUP_CNTEN (1 << 15)
	199	#define MFGPT_SETUP_CMP2 (1 << 14)
	200	#define MFGPT_SETUP_CMP1 (1 << 13)
	201	#define MFGPT_SETUP_SETUP (1 << 12)
	202	#define MFGPT_SETUP_STOPEN (1 << 11)
	203	#define MFGPT_SETUP_EXTEN (1 << 10)
	204	#define MFGPT_SETUP_REVEN (1 << 5)
	205	#define MFGPT_SETUP_CLKSEL (1 << 4)
	206
	207	static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
	208	{
	209	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
	210	outw(value, base + reg + (timer * 8));
	211	}
	212
	213	static inline u16 geode_mfgpt_read(int timer, u16 reg)
	214	{
	215	u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
	216	return inw(base + reg + (timer * 8));
	217	}
	218
83d7384f AS	219	extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
83d7384f AS	220	extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable);
fa28e067	221	extern int geode_mfgpt_alloc_timer(int timer, int domain);
83d7384f AS	222
	223	#define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
	224	#define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
	225
b0e6bf25 AS	226	#ifdef CONFIG_GEODE_MFGPT_TIMER
	227	extern int __init mfgpt_timer_setup(void);
	228	#else
	229	static inline int mfgpt_timer_setup(void) { return 0; }
	230	#endif
	231
f62e5184	232	#endif