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1da177e4 LT |
1 | #ifndef _ASM_IO_H |
2 | #define _ASM_IO_H | |
3 | ||
1da177e4 LT |
4 | |
5 | /* | |
6 | * This file contains the definitions for the x86 IO instructions | |
7 | * inb/inw/inl/outb/outw/outl and the "string versions" of the same | |
8 | * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" | |
9 | * versions of the single-IO instructions (inb_p/inw_p/..). | |
10 | * | |
11 | * This file is not meant to be obfuscating: it's just complicated | |
12 | * to (a) handle it all in a way that makes gcc able to optimize it | |
13 | * as well as possible and (b) trying to avoid writing the same thing | |
14 | * over and over again with slight variations and possibly making a | |
15 | * mistake somewhere. | |
16 | */ | |
17 | ||
18 | /* | |
19 | * Thanks to James van Artsdalen for a better timing-fix than | |
20 | * the two short jumps: using outb's to a nonexistent port seems | |
21 | * to guarantee better timings even on fast machines. | |
22 | * | |
23 | * On the other hand, I'd like to be sure of a non-existent port: | |
24 | * I feel a bit unsafe about using 0x80 (should be safe, though) | |
25 | * | |
26 | * Linus | |
27 | */ | |
28 | ||
29 | /* | |
30 | * Bit simplified and optimized by Jan Hubicka | |
31 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999. | |
32 | * | |
33 | * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added, | |
34 | * isa_read[wl] and isa_write[wl] fixed | |
35 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> | |
36 | */ | |
37 | ||
b02aae9c | 38 | extern void native_io_delay(void); |
1da177e4 | 39 | |
6e7c4025 IM |
40 | extern int io_delay_type; |
41 | extern void io_delay_init(void); | |
42 | ||
ba082427 GOC |
43 | #if defined(CONFIG_PARAVIRT) |
44 | #include <asm/paravirt.h> | |
45 | #else | |
46 | ||
b02aae9c RH |
47 | static inline void slow_down_io(void) |
48 | { | |
49 | native_io_delay(); | |
1da177e4 | 50 | #ifdef REALLY_SLOW_IO |
b02aae9c RH |
51 | native_io_delay(); |
52 | native_io_delay(); | |
53 | native_io_delay(); | |
1da177e4 | 54 | #endif |
b02aae9c | 55 | } |
ba082427 | 56 | #endif |
1da177e4 LT |
57 | |
58 | /* | |
59 | * Talk about misusing macros.. | |
60 | */ | |
126f5f35 | 61 | #define __OUT1(s, x) \ |
9c0aa0f9 | 62 | static inline void out##s(unsigned x value, unsigned short port) { |
1da177e4 | 63 | |
126f5f35 JP |
64 | #define __OUT2(s, s1, s2) \ |
65 | asm volatile ("out" #s " %" s1 "0,%" s2 "1" | |
ba082427 GOC |
66 | |
67 | #ifndef REALLY_SLOW_IO | |
68 | #define REALLY_SLOW_IO | |
69 | #define UNSET_REALLY_SLOW_IO | |
70 | #endif | |
1da177e4 | 71 | |
126f5f35 JP |
72 | #define __OUT(s, s1, x) \ |
73 | __OUT1(s, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \ | |
74 | } \ | |
75 | __OUT1(s##_p, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \ | |
76 | slow_down_io(); \ | |
77 | } | |
1da177e4 | 78 | |
126f5f35 JP |
79 | #define __IN1(s) \ |
80 | static inline RETURN_TYPE in##s(unsigned short port) \ | |
81 | { \ | |
82 | RETURN_TYPE _v; | |
1da177e4 | 83 | |
126f5f35 JP |
84 | #define __IN2(s, s1, s2) \ |
85 | asm volatile ("in" #s " %" s2 "1,%" s1 "0" | |
ba082427 | 86 | |
126f5f35 JP |
87 | #define __IN(s, s1, i...) \ |
88 | __IN1(s) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \ | |
89 | return _v; \ | |
90 | } \ | |
91 | __IN1(s##_p) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \ | |
92 | slow_down_io(); \ | |
93 | return _v; } | |
1da177e4 | 94 | |
ba082427 GOC |
95 | #ifdef UNSET_REALLY_SLOW_IO |
96 | #undef REALLY_SLOW_IO | |
97 | #endif | |
1da177e4 | 98 | |
126f5f35 JP |
99 | #define __INS(s) \ |
100 | static inline void ins##s(unsigned short port, void *addr, \ | |
101 | unsigned long count) \ | |
102 | { \ | |
103 | asm volatile ("rep ; ins" #s \ | |
104 | : "=D" (addr), "=c" (count) \ | |
105 | : "d" (port), "0" (addr), "1" (count)); \ | |
106 | } | |
1da177e4 | 107 | |
126f5f35 JP |
108 | #define __OUTS(s) \ |
109 | static inline void outs##s(unsigned short port, const void *addr, \ | |
110 | unsigned long count) \ | |
111 | { \ | |
112 | asm volatile ("rep ; outs" #s \ | |
113 | : "=S" (addr), "=c" (count) \ | |
114 | : "d" (port), "0" (addr), "1" (count)); \ | |
115 | } | |
1da177e4 LT |
116 | |
117 | #define RETURN_TYPE unsigned char | |
126f5f35 | 118 | __IN(b, "") |
1da177e4 LT |
119 | #undef RETURN_TYPE |
120 | #define RETURN_TYPE unsigned short | |
126f5f35 | 121 | __IN(w, "") |
1da177e4 LT |
122 | #undef RETURN_TYPE |
123 | #define RETURN_TYPE unsigned int | |
126f5f35 | 124 | __IN(l, "") |
1da177e4 LT |
125 | #undef RETURN_TYPE |
126 | ||
126f5f35 JP |
127 | __OUT(b, "b", char) |
128 | __OUT(w, "w", short) | |
129 | __OUT(l, , int) | |
1da177e4 LT |
130 | |
131 | __INS(b) | |
132 | __INS(w) | |
133 | __INS(l) | |
134 | ||
135 | __OUTS(b) | |
136 | __OUTS(w) | |
137 | __OUTS(l) | |
138 | ||
139 | #define IO_SPACE_LIMIT 0xffff | |
140 | ||
b0957f1a | 141 | #if defined(__KERNEL__) && defined(__x86_64__) |
1da177e4 LT |
142 | |
143 | #include <linux/vmalloc.h> | |
144 | ||
145 | #ifndef __i386__ | |
146 | /* | |
147 | * Change virtual addresses to physical addresses and vv. | |
148 | * These are pretty trivial | |
149 | */ | |
126f5f35 | 150 | static inline unsigned long virt_to_phys(volatile void *address) |
1da177e4 LT |
151 | { |
152 | return __pa(address); | |
153 | } | |
154 | ||
126f5f35 | 155 | static inline void *phys_to_virt(unsigned long address) |
1da177e4 LT |
156 | { |
157 | return __va(address); | |
158 | } | |
159 | #endif | |
160 | ||
161 | /* | |
162 | * Change "struct page" to physical address. | |
163 | */ | |
1da177e4 | 164 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) |
1da177e4 LT |
165 | |
166 | #include <asm-generic/iomap.h> | |
167 | ||
f2d3efed AK |
168 | extern void *early_ioremap(unsigned long addr, unsigned long size); |
169 | extern void early_iounmap(void *addr, unsigned long size); | |
170 | ||
1da177e4 LT |
171 | /* |
172 | * This one maps high address device memory and turns off caching for that area. | |
173 | * it's useful if some control registers are in such an area and write combining | |
174 | * or read caching is not desirable: | |
175 | */ | |
b9e76a00 LT |
176 | extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); |
177 | extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); | |
28b2ee20 RR |
178 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, |
179 | unsigned long prot_val); | |
6371b495 IM |
180 | |
181 | /* | |
182 | * The default ioremap() behavior is non-cached: | |
183 | */ | |
b9e76a00 | 184 | static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) |
6371b495 | 185 | { |
9af993a9 | 186 | return ioremap_nocache(offset, size); |
6371b495 IM |
187 | } |
188 | ||
1da177e4 | 189 | extern void iounmap(volatile void __iomem *addr); |
6371b495 | 190 | |
18a8bd94 | 191 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); |
1da177e4 LT |
192 | |
193 | /* | |
194 | * ISA I/O bus memory addresses are 1:1 with the physical address. | |
195 | */ | |
196 | #define isa_virt_to_bus virt_to_phys | |
197 | #define isa_page_to_bus page_to_phys | |
198 | #define isa_bus_to_virt phys_to_virt | |
199 | ||
200 | /* | |
201 | * However PCI ones are not necessarily 1:1 and therefore these interfaces | |
202 | * are forbidden in portable PCI drivers. | |
203 | * | |
204 | * Allow them on x86 for legacy drivers, though. | |
205 | */ | |
206 | #define virt_to_bus virt_to_phys | |
207 | #define bus_to_virt phys_to_virt | |
208 | ||
126f5f35 JP |
209 | void __memcpy_fromio(void *, unsigned long, unsigned); |
210 | void __memcpy_toio(unsigned long, const void *, unsigned); | |
1da177e4 | 211 | |
126f5f35 JP |
212 | static inline void memcpy_fromio(void *to, const volatile void __iomem *from, |
213 | unsigned len) | |
1da177e4 | 214 | { |
126f5f35 | 215 | __memcpy_fromio(to, (unsigned long)from, len); |
1da177e4 | 216 | } |
126f5f35 JP |
217 | |
218 | static inline void memcpy_toio(volatile void __iomem *to, const void *from, | |
219 | unsigned len) | |
1da177e4 | 220 | { |
126f5f35 | 221 | __memcpy_toio((unsigned long)to, from, len); |
1da177e4 LT |
222 | } |
223 | ||
224 | void memset_io(volatile void __iomem *a, int b, size_t c); | |
225 | ||
226 | /* | |
227 | * ISA space is 'always mapped' on a typical x86 system, no need to | |
228 | * explicitly ioremap() it. The fact that the ISA IO space is mapped | |
229 | * to PAGE_OFFSET is pure coincidence - it does not mean ISA values | |
230 | * are physical addresses. The following constant pointer can be | |
231 | * used as the IO-area pointer (it can be iounmapped as well, so the | |
232 | * analogy with PCI is quite large): | |
233 | */ | |
234 | #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET)) | |
235 | ||
126f5f35 | 236 | #define flush_write_buffers() |
1da177e4 LT |
237 | |
238 | extern int iommu_bio_merge; | |
239 | #define BIO_VMERGE_BOUNDARY iommu_bio_merge | |
240 | ||
1da177e4 LT |
241 | /* |
242 | * Convert a virtual cached pointer to an uncached pointer | |
243 | */ | |
244 | #define xlate_dev_kmem_ptr(p) p | |
245 | ||
246 | #endif /* __KERNEL__ */ | |
247 | ||
248 | #endif |