cfq-iosched: fix rcu freeing of cfq io contexts
[deliverable/linux.git] / include / asm-x86 / kexec.h
CommitLineData
3c233d13
HH
1#ifndef _KEXEC_H
2#define _KEXEC_H
3
96a388de 4#ifdef CONFIG_X86_32
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HH
5# define PA_CONTROL_PAGE 0
6# define VA_CONTROL_PAGE 1
7# define PA_PGD 2
8# define VA_PGD 3
9# define PA_PTE_0 4
10# define VA_PTE_0 5
11# define PA_PTE_1 6
12# define VA_PTE_1 7
13# ifdef CONFIG_X86_PAE
14# define PA_PMD_0 8
15# define VA_PMD_0 9
16# define PA_PMD_1 10
17# define VA_PMD_1 11
18# define PAGES_NR 12
19# else
20# define PAGES_NR 8
21# endif
96a388de 22#else
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23# define PA_CONTROL_PAGE 0
24# define VA_CONTROL_PAGE 1
25# define PA_PGD 2
26# define VA_PGD 3
27# define PA_PUD_0 4
28# define VA_PUD_0 5
29# define PA_PMD_0 6
30# define VA_PMD_0 7
31# define PA_PTE_0 8
32# define VA_PTE_0 9
33# define PA_PUD_1 10
34# define VA_PUD_1 11
35# define PA_PMD_1 12
36# define VA_PMD_1 13
37# define PA_PTE_1 14
38# define VA_PTE_1 15
39# define PA_TABLE_PAGE 16
40# define PAGES_NR 17
96a388de 41#endif
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HH
42
43#ifndef __ASSEMBLY__
44
45#include <linux/string.h>
46
47#include <asm/page.h>
48#include <asm/ptrace.h>
49
50/*
51 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
52 * I.e. Maximum page that is mapped directly into kernel memory,
53 * and kmap is not required.
54 *
55 * So far x86_64 is limited to 40 physical address bits.
56 */
57#ifdef CONFIG_X86_32
58/* Maximum physical address we can use pages from */
59# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
60/* Maximum address we can reach in physical address mode */
61# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
62/* Maximum address we can use for the control code buffer */
63# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
64
65# define KEXEC_CONTROL_CODE_SIZE 4096
66
67/* The native architecture */
68# define KEXEC_ARCH KEXEC_ARCH_386
69
70/* We can also handle crash dumps from 64 bit kernel. */
71# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
72#else
73/* Maximum physical address we can use pages from */
74# define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
75/* Maximum address we can reach in physical address mode */
76# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
77/* Maximum address we can use for the control pages */
78# define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
79
80/* Allocate one page for the pdp and the second for the code */
81# define KEXEC_CONTROL_CODE_SIZE (4096UL + 4096UL)
82
83/* The native architecture */
84# define KEXEC_ARCH KEXEC_ARCH_X86_64
85#endif
86
87/*
88 * CPU does not save ss and sp on stack if execution is already
89 * running in kernel mode at the time of NMI occurrence. This code
90 * fixes it.
91 */
92static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
93 struct pt_regs *oldregs)
94{
95#ifdef CONFIG_X86_32
96 newregs->sp = (unsigned long)&(oldregs->sp);
97 __asm__ __volatile__(
98 "xorl %%eax, %%eax\n\t"
99 "movw %%ss, %%ax\n\t"
100 :"=a"(newregs->ss));
101#endif
102}
103
104/*
105 * This function is responsible for capturing register states if coming
106 * via panic otherwise just fix up the ss and sp if coming via kernel
107 * mode exception.
108 */
109static inline void crash_setup_regs(struct pt_regs *newregs,
110 struct pt_regs *oldregs)
111{
112 if (oldregs) {
113 memcpy(newregs, oldregs, sizeof(*newregs));
114 crash_fixup_ss_esp(newregs, oldregs);
115 } else {
116#ifdef CONFIG_X86_32
117 __asm__ __volatile__("movl %%ebx,%0" : "=m"(newregs->bx));
118 __asm__ __volatile__("movl %%ecx,%0" : "=m"(newregs->cx));
119 __asm__ __volatile__("movl %%edx,%0" : "=m"(newregs->dx));
120 __asm__ __volatile__("movl %%esi,%0" : "=m"(newregs->si));
121 __asm__ __volatile__("movl %%edi,%0" : "=m"(newregs->di));
122 __asm__ __volatile__("movl %%ebp,%0" : "=m"(newregs->bp));
123 __asm__ __volatile__("movl %%eax,%0" : "=m"(newregs->ax));
124 __asm__ __volatile__("movl %%esp,%0" : "=m"(newregs->sp));
125 __asm__ __volatile__("movl %%ss, %%eax;" :"=a"(newregs->ss));
126 __asm__ __volatile__("movl %%cs, %%eax;" :"=a"(newregs->cs));
127 __asm__ __volatile__("movl %%ds, %%eax;" :"=a"(newregs->ds));
128 __asm__ __volatile__("movl %%es, %%eax;" :"=a"(newregs->es));
129 __asm__ __volatile__("pushfl; popl %0" :"=m"(newregs->flags));
130#else
131 __asm__ __volatile__("movq %%rbx,%0" : "=m"(newregs->bx));
132 __asm__ __volatile__("movq %%rcx,%0" : "=m"(newregs->cx));
133 __asm__ __volatile__("movq %%rdx,%0" : "=m"(newregs->dx));
134 __asm__ __volatile__("movq %%rsi,%0" : "=m"(newregs->si));
135 __asm__ __volatile__("movq %%rdi,%0" : "=m"(newregs->di));
136 __asm__ __volatile__("movq %%rbp,%0" : "=m"(newregs->bp));
137 __asm__ __volatile__("movq %%rax,%0" : "=m"(newregs->ax));
138 __asm__ __volatile__("movq %%rsp,%0" : "=m"(newregs->sp));
139 __asm__ __volatile__("movq %%r8,%0" : "=m"(newregs->r8));
140 __asm__ __volatile__("movq %%r9,%0" : "=m"(newregs->r9));
141 __asm__ __volatile__("movq %%r10,%0" : "=m"(newregs->r10));
142 __asm__ __volatile__("movq %%r11,%0" : "=m"(newregs->r11));
143 __asm__ __volatile__("movq %%r12,%0" : "=m"(newregs->r12));
144 __asm__ __volatile__("movq %%r13,%0" : "=m"(newregs->r13));
145 __asm__ __volatile__("movq %%r14,%0" : "=m"(newregs->r14));
146 __asm__ __volatile__("movq %%r15,%0" : "=m"(newregs->r15));
147 __asm__ __volatile__("movl %%ss, %%eax;" :"=a"(newregs->ss));
148 __asm__ __volatile__("movl %%cs, %%eax;" :"=a"(newregs->cs));
149 __asm__ __volatile__("pushfq; popq %0" :"=m"(newregs->flags));
150#endif
151 newregs->ip = (unsigned long)current_text_addr();
152 }
153}
154
155#ifdef CONFIG_X86_32
156asmlinkage NORET_TYPE void
157relocate_kernel(unsigned long indirection_page,
158 unsigned long control_page,
159 unsigned long start_address,
160 unsigned int has_pae) ATTRIB_NORET;
161#else
162NORET_TYPE void
163relocate_kernel(unsigned long indirection_page,
164 unsigned long page_list,
165 unsigned long start_address) ATTRIB_NORET;
166#endif
167
168#endif /* __ASSEMBLY__ */
169
170#endif /* _KEXEC_H */
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