Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
77ef50a5 VN |
11 | #ifndef ASM_X86__KVM_HOST_H |
12 | #define ASM_X86__KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
34c16eec ZX |
17 | |
18 | #include <linux/kvm.h> | |
19 | #include <linux/kvm_para.h> | |
edf88417 | 20 | #include <linux/kvm_types.h> |
34c16eec | 21 | |
50d0a0f9 | 22 | #include <asm/pvclock-abi.h> |
e01a1b57 HB |
23 | #include <asm/desc.h> |
24 | ||
69a9f69b AK |
25 | #define KVM_MAX_VCPUS 16 |
26 | #define KVM_MEMORY_SLOTS 32 | |
27 | /* memory slots that does not exposed to userspace */ | |
28 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
29 | ||
30 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 31 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 32 | |
cd6e8f87 ZX |
33 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
34 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
35 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
36 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 37 | |
7d76b4d3 | 38 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
39 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
40 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 41 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
42 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
43 | | X86_CR0_MP) | |
7d76b4d3 | 44 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
45 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
46 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
47 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
48 | ||
49 | #define INVALID_PAGE (~(hpa_t)0) | |
50 | #define UNMAPPED_GVA (~(gpa_t)0) | |
51 | ||
05da4558 MT |
52 | /* shadow tables are PAE even on non-PAE hosts */ |
53 | #define KVM_HPAGE_SHIFT 21 | |
54 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
55 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
56 | ||
57 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
58 | ||
cd6e8f87 ZX |
59 | #define DE_VECTOR 0 |
60 | #define UD_VECTOR 6 | |
61 | #define NM_VECTOR 7 | |
62 | #define DF_VECTOR 8 | |
63 | #define TS_VECTOR 10 | |
64 | #define NP_VECTOR 11 | |
65 | #define SS_VECTOR 12 | |
66 | #define GP_VECTOR 13 | |
67 | #define PF_VECTOR 14 | |
53371b50 | 68 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
69 | |
70 | #define SELECTOR_TI_MASK (1 << 2) | |
71 | #define SELECTOR_RPL_MASK 0x03 | |
72 | ||
73 | #define IOPL_SHIFT 12 | |
74 | ||
d69fb81f ZX |
75 | #define KVM_ALIAS_SLOTS 4 |
76 | ||
d657a98e ZX |
77 | #define KVM_PERMILLE_MMU_PAGES 20 |
78 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
79 | #define KVM_MMU_HASH_SHIFT 10 |
80 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
81 | #define KVM_MIN_FREE_MMU_PAGES 5 |
82 | #define KVM_REFILL_PAGES 25 | |
83 | #define KVM_MAX_CPUID_ENTRIES 40 | |
9ba075a6 | 84 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 85 | |
e9b11c17 ZX |
86 | extern spinlock_t kvm_lock; |
87 | extern struct list_head vm_list; | |
88 | ||
d657a98e ZX |
89 | struct kvm_vcpu; |
90 | struct kvm; | |
91 | ||
5fdbf976 | 92 | enum kvm_reg { |
2b3ccfa0 ZX |
93 | VCPU_REGS_RAX = 0, |
94 | VCPU_REGS_RCX = 1, | |
95 | VCPU_REGS_RDX = 2, | |
96 | VCPU_REGS_RBX = 3, | |
97 | VCPU_REGS_RSP = 4, | |
98 | VCPU_REGS_RBP = 5, | |
99 | VCPU_REGS_RSI = 6, | |
100 | VCPU_REGS_RDI = 7, | |
101 | #ifdef CONFIG_X86_64 | |
102 | VCPU_REGS_R8 = 8, | |
103 | VCPU_REGS_R9 = 9, | |
104 | VCPU_REGS_R10 = 10, | |
105 | VCPU_REGS_R11 = 11, | |
106 | VCPU_REGS_R12 = 12, | |
107 | VCPU_REGS_R13 = 13, | |
108 | VCPU_REGS_R14 = 14, | |
109 | VCPU_REGS_R15 = 15, | |
110 | #endif | |
5fdbf976 | 111 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
112 | NR_VCPU_REGS |
113 | }; | |
114 | ||
115 | enum { | |
81609e3e | 116 | VCPU_SREG_ES, |
2b3ccfa0 | 117 | VCPU_SREG_CS, |
81609e3e | 118 | VCPU_SREG_SS, |
2b3ccfa0 | 119 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
120 | VCPU_SREG_FS, |
121 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
122 | VCPU_SREG_TR, |
123 | VCPU_SREG_LDTR, | |
124 | }; | |
125 | ||
edf88417 | 126 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 127 | |
d657a98e ZX |
128 | #define KVM_NR_MEM_OBJS 40 |
129 | ||
69a9f69b AK |
130 | struct kvm_guest_debug { |
131 | int enabled; | |
132 | unsigned long bp[4]; | |
133 | int singlestep; | |
134 | }; | |
135 | ||
d657a98e ZX |
136 | /* |
137 | * We don't want allocation failures within the mmu code, so we preallocate | |
138 | * enough memory for a single page fault in a cache. | |
139 | */ | |
140 | struct kvm_mmu_memory_cache { | |
141 | int nobjs; | |
142 | void *objects[KVM_NR_MEM_OBJS]; | |
143 | }; | |
144 | ||
145 | #define NR_PTE_CHAIN_ENTRIES 5 | |
146 | ||
147 | struct kvm_pte_chain { | |
148 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
149 | struct hlist_node link; | |
150 | }; | |
151 | ||
152 | /* | |
153 | * kvm_mmu_page_role, below, is defined as: | |
154 | * | |
155 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
156 | * bits 4:7 - page table level for this shadow (1-4) | |
157 | * bits 8:9 - page table quadrant for 2-level guests | |
158 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
159 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
160 | */ | |
161 | union kvm_mmu_page_role { | |
162 | unsigned word; | |
163 | struct { | |
7d76b4d3 JP |
164 | unsigned glevels:4; |
165 | unsigned level:4; | |
166 | unsigned quadrant:2; | |
167 | unsigned pad_for_nice_hex_output:6; | |
168 | unsigned metaphysical:1; | |
169 | unsigned access:3; | |
2e53d63a | 170 | unsigned invalid:1; |
d657a98e ZX |
171 | }; |
172 | }; | |
173 | ||
174 | struct kvm_mmu_page { | |
175 | struct list_head link; | |
176 | struct hlist_node hash_link; | |
177 | ||
178 | /* | |
179 | * The following two entries are used to key the shadow page in the | |
180 | * hash table. | |
181 | */ | |
182 | gfn_t gfn; | |
183 | union kvm_mmu_page_role role; | |
184 | ||
185 | u64 *spt; | |
186 | /* hold the gfn of each spte inside spt */ | |
187 | gfn_t *gfns; | |
188 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
189 | * in this shadow page. | |
190 | */ | |
191 | int multimapped; /* More than one parent_pte? */ | |
192 | int root_count; /* Currently serving as active root */ | |
193 | union { | |
194 | u64 *parent_pte; /* !multimapped */ | |
195 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
196 | }; | |
197 | }; | |
198 | ||
199 | /* | |
200 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
201 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
202 | * mode. | |
203 | */ | |
204 | struct kvm_mmu { | |
205 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
206 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
207 | void (*free)(struct kvm_vcpu *vcpu); | |
208 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
209 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
210 | struct kvm_mmu_page *page); | |
211 | hpa_t root_hpa; | |
212 | int root_level; | |
213 | int shadow_root_level; | |
214 | ||
215 | u64 *pae_root; | |
216 | }; | |
217 | ||
ad312c7c | 218 | struct kvm_vcpu_arch { |
34c16eec ZX |
219 | u64 host_tsc; |
220 | int interrupt_window_open; | |
221 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
222 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
5fdbf976 MT |
223 | /* |
224 | * rip and regs accesses must go through | |
225 | * kvm_{register,rip}_{read,write} functions. | |
226 | */ | |
227 | unsigned long regs[NR_VCPU_REGS]; | |
228 | u32 regs_avail; | |
229 | u32 regs_dirty; | |
34c16eec ZX |
230 | |
231 | unsigned long cr0; | |
232 | unsigned long cr2; | |
233 | unsigned long cr3; | |
234 | unsigned long cr4; | |
235 | unsigned long cr8; | |
236 | u64 pdptrs[4]; /* pae */ | |
237 | u64 shadow_efer; | |
238 | u64 apic_base; | |
239 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
34c16eec ZX |
240 | int mp_state; |
241 | int sipi_vector; | |
242 | u64 ia32_misc_enable_msr; | |
b209749f | 243 | bool tpr_access_reporting; |
34c16eec ZX |
244 | |
245 | struct kvm_mmu mmu; | |
246 | ||
247 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
248 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
249 | struct kvm_mmu_memory_cache mmu_page_cache; | |
250 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
251 | ||
252 | gfn_t last_pt_write_gfn; | |
253 | int last_pt_write_count; | |
254 | u64 *last_pte_updated; | |
1b7fcd32 | 255 | gfn_t last_pte_gfn; |
34c16eec | 256 | |
d7824fff | 257 | struct { |
35149e21 AL |
258 | gfn_t gfn; /* presumed gfn during guest pte update */ |
259 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 260 | int largepage; |
e930bffe | 261 | unsigned long mmu_seq; |
d7824fff AK |
262 | } update_pte; |
263 | ||
34c16eec ZX |
264 | struct i387_fxsave_struct host_fx_image; |
265 | struct i387_fxsave_struct guest_fx_image; | |
266 | ||
267 | gva_t mmio_fault_cr2; | |
268 | struct kvm_pio_request pio; | |
269 | void *pio_data; | |
270 | ||
298101da AK |
271 | struct kvm_queued_exception { |
272 | bool pending; | |
273 | bool has_error_code; | |
274 | u8 nr; | |
275 | u32 error_code; | |
276 | } exception; | |
277 | ||
34c16eec ZX |
278 | struct { |
279 | int active; | |
280 | u8 save_iopl; | |
281 | struct kvm_save_segment { | |
282 | u16 selector; | |
283 | unsigned long base; | |
284 | u32 limit; | |
285 | u32 ar; | |
286 | } tr, es, ds, fs, gs; | |
287 | } rmode; | |
288 | int halt_request; /* real mode on Intel only */ | |
289 | ||
290 | int cpuid_nent; | |
07716717 | 291 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
292 | /* emulate context */ |
293 | ||
294 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
295 | |
296 | gpa_t time; | |
50d0a0f9 GH |
297 | struct pvclock_vcpu_time_info hv_clock; |
298 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
299 | unsigned int time_offset; |
300 | struct page *time_page; | |
3419ffc8 SY |
301 | |
302 | bool nmi_pending; | |
9ba075a6 AK |
303 | |
304 | u64 mtrr[0x100]; | |
34c16eec ZX |
305 | }; |
306 | ||
d69fb81f ZX |
307 | struct kvm_mem_alias { |
308 | gfn_t base_gfn; | |
309 | unsigned long npages; | |
310 | gfn_t target_gfn; | |
311 | }; | |
312 | ||
313 | struct kvm_arch{ | |
314 | int naliases; | |
315 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
316 | |
317 | unsigned int n_free_mmu_pages; | |
318 | unsigned int n_requested_mmu_pages; | |
319 | unsigned int n_alloc_mmu_pages; | |
320 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
321 | /* | |
322 | * Hash table of struct kvm_mmu_page. | |
323 | */ | |
324 | struct list_head active_mmu_pages; | |
d7deeeb0 ZX |
325 | struct kvm_pic *vpic; |
326 | struct kvm_ioapic *vioapic; | |
7837699f | 327 | struct kvm_pit *vpit; |
bfc6d222 ZX |
328 | |
329 | int round_robin_prev_vcpu; | |
330 | unsigned int tss_addr; | |
331 | struct page *apic_access_page; | |
18068523 GOC |
332 | |
333 | gpa_t wall_clock; | |
b7ebfb05 SY |
334 | |
335 | struct page *ept_identity_pagetable; | |
336 | bool ept_identity_pagetable_done; | |
d69fb81f ZX |
337 | }; |
338 | ||
0711456c ZX |
339 | struct kvm_vm_stat { |
340 | u32 mmu_shadow_zapped; | |
341 | u32 mmu_pte_write; | |
342 | u32 mmu_pte_updated; | |
343 | u32 mmu_pde_zapped; | |
344 | u32 mmu_flooded; | |
345 | u32 mmu_recycled; | |
dfc5aa00 | 346 | u32 mmu_cache_miss; |
0711456c | 347 | u32 remote_tlb_flush; |
05da4558 | 348 | u32 lpages; |
0711456c ZX |
349 | }; |
350 | ||
77b4c255 ZX |
351 | struct kvm_vcpu_stat { |
352 | u32 pf_fixed; | |
353 | u32 pf_guest; | |
354 | u32 tlb_flush; | |
355 | u32 invlpg; | |
356 | ||
357 | u32 exits; | |
358 | u32 io_exits; | |
359 | u32 mmio_exits; | |
360 | u32 signal_exits; | |
361 | u32 irq_window_exits; | |
f08864b4 | 362 | u32 nmi_window_exits; |
77b4c255 ZX |
363 | u32 halt_exits; |
364 | u32 halt_wakeup; | |
365 | u32 request_irq_exits; | |
366 | u32 irq_exits; | |
367 | u32 host_state_reload; | |
368 | u32 efer_reload; | |
369 | u32 fpu_reload; | |
370 | u32 insn_emulation; | |
371 | u32 insn_emulation_fail; | |
f11c3a8d | 372 | u32 hypercalls; |
77b4c255 | 373 | }; |
ad312c7c | 374 | |
e01a1b57 HB |
375 | struct descriptor_table { |
376 | u16 limit; | |
377 | unsigned long base; | |
378 | } __attribute__((packed)); | |
379 | ||
ea4a5ff8 ZX |
380 | struct kvm_x86_ops { |
381 | int (*cpu_has_kvm_support)(void); /* __init */ | |
382 | int (*disabled_by_bios)(void); /* __init */ | |
383 | void (*hardware_enable)(void *dummy); /* __init */ | |
384 | void (*hardware_disable)(void *dummy); | |
385 | void (*check_processor_compatibility)(void *rtn); | |
386 | int (*hardware_setup)(void); /* __init */ | |
387 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 388 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
389 | |
390 | /* Create, but do not attach this VCPU */ | |
391 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
392 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
393 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
394 | ||
395 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
396 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
397 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
398 | |
399 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
400 | struct kvm_debug_guest *dbg); | |
401 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | |
402 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
403 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
404 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
405 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
406 | struct kvm_segment *var, int seg); | |
2e4d2653 | 407 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
408 | void (*set_segment)(struct kvm_vcpu *vcpu, |
409 | struct kvm_segment *var, int seg); | |
410 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
411 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
412 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
413 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
414 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
415 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
416 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
417 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
418 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
419 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
420 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
421 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
422 | int *exception); | |
5fdbf976 | 423 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
424 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
425 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
426 | ||
427 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 428 | |
ea4a5ff8 ZX |
429 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
430 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
431 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
432 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
433 | unsigned char *hypercall_addr); | |
434 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
435 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
436 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
437 | bool has_error_code, u32 error_code); | |
438 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
439 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
440 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
441 | struct kvm_run *run); | |
442 | ||
443 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
67253af5 | 444 | int (*get_tdp_level)(void); |
ea4a5ff8 ZX |
445 | }; |
446 | ||
97896d04 ZX |
447 | extern struct kvm_x86_ops *kvm_x86_ops; |
448 | ||
54f1585a ZX |
449 | int kvm_mmu_module_init(void); |
450 | void kvm_mmu_module_exit(void); | |
451 | ||
452 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
453 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
454 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
455 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
456 | void kvm_mmu_set_base_ptes(u64 base_pte); |
457 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
458 | u64 dirty_mask, u64 nx_mask, u64 x_mask); | |
54f1585a ZX |
459 | |
460 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
461 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
462 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 463 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
464 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
465 | ||
cc4b6871 JR |
466 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
467 | ||
3200f405 | 468 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 469 | const void *val, int bytes); |
2f333bcb MT |
470 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
471 | gpa_t addr, unsigned long *ret); | |
472 | ||
473 | extern bool tdp_enabled; | |
9f811285 | 474 | |
54f1585a ZX |
475 | enum emulation_result { |
476 | EMULATE_DONE, /* no further processing */ | |
477 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
478 | EMULATE_FAIL, /* can't emulate this instruction */ | |
479 | }; | |
480 | ||
571008da SY |
481 | #define EMULTYPE_NO_DECODE (1 << 0) |
482 | #define EMULTYPE_TRAP_UD (1 << 1) | |
54f1585a | 483 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 484 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
485 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
486 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
487 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
488 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
489 | unsigned long *rflags); | |
490 | ||
491 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
492 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
493 | unsigned long *rflags); | |
f2b4b7dd | 494 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
495 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
496 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
497 | ||
498 | struct x86_emulate_ctxt; | |
499 | ||
500 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
501 | int size, unsigned port); | |
502 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
503 | int size, unsigned long count, int down, | |
504 | gva_t address, int rep, unsigned port); | |
505 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
506 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
507 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
508 | int emulate_clts(struct kvm_vcpu *vcpu); | |
509 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
510 | unsigned long *dest); | |
511 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
512 | unsigned long value); | |
513 | ||
3e6e0aab GT |
514 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
515 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
516 | int type_bits, int seg); | |
517 | ||
37817f29 IE |
518 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
519 | ||
2d3ad1f4 | 520 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
521 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
522 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
523 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
524 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
525 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
526 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
527 | ||
528 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
529 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
530 | ||
298101da AK |
531 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
532 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
533 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
534 | u32 error_code); | |
298101da | 535 | |
3419ffc8 SY |
536 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
537 | ||
54f1585a ZX |
538 | void fx_init(struct kvm_vcpu *vcpu); |
539 | ||
540 | int emulator_read_std(unsigned long addr, | |
541 | void *val, | |
542 | unsigned int bytes, | |
543 | struct kvm_vcpu *vcpu); | |
544 | int emulator_write_emulated(unsigned long addr, | |
545 | const void *val, | |
546 | unsigned int bytes, | |
547 | struct kvm_vcpu *vcpu); | |
548 | ||
549 | unsigned long segment_base(u16 selector); | |
550 | ||
d835dfec | 551 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a ZX |
552 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
553 | const u8 *new, int bytes); | |
554 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
555 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
556 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
557 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
558 | ||
559 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
560 | ||
561 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
562 | ||
3067714c | 563 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
34c16eec | 564 | |
18552672 | 565 | void kvm_enable_tdp(void); |
5f4cb662 | 566 | void kvm_disable_tdp(void); |
18552672 | 567 | |
a03490ed | 568 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 569 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
570 | |
571 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
572 | { | |
573 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
574 | ||
575 | return (struct kvm_mmu_page *)page_private(page); | |
576 | } | |
577 | ||
d6e88aec | 578 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
579 | { |
580 | u16 seg; | |
581 | asm("mov %%fs, %0" : "=g"(seg)); | |
582 | return seg; | |
583 | } | |
584 | ||
d6e88aec | 585 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
586 | { |
587 | u16 seg; | |
588 | asm("mov %%gs, %0" : "=g"(seg)); | |
589 | return seg; | |
590 | } | |
591 | ||
d6e88aec | 592 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
593 | { |
594 | u16 ldt; | |
595 | asm("sldt %0" : "=g"(ldt)); | |
596 | return ldt; | |
597 | } | |
598 | ||
d6e88aec | 599 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
600 | { |
601 | asm("mov %0, %%fs" : : "rm"(sel)); | |
602 | } | |
603 | ||
d6e88aec | 604 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
605 | { |
606 | asm("mov %0, %%gs" : : "rm"(sel)); | |
607 | } | |
608 | ||
d6e88aec | 609 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
610 | { |
611 | asm("lldt %0" : : "rm"(sel)); | |
612 | } | |
ec6d273d | 613 | |
d6e88aec | 614 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
615 | { |
616 | asm("sidt %0" : "=m"(*table)); | |
617 | } | |
618 | ||
d6e88aec | 619 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
620 | { |
621 | asm("sgdt %0" : "=m"(*table)); | |
622 | } | |
623 | ||
d6e88aec | 624 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
625 | { |
626 | u16 tr; | |
627 | asm("str %0" : "=g"(tr)); | |
628 | return segment_base(tr); | |
629 | } | |
630 | ||
631 | #ifdef CONFIG_X86_64 | |
632 | static inline unsigned long read_msr(unsigned long msr) | |
633 | { | |
634 | u64 value; | |
635 | ||
636 | rdmsrl(msr, value); | |
637 | return value; | |
638 | } | |
639 | #endif | |
640 | ||
d6e88aec | 641 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
642 | { |
643 | asm("fxsave (%0)":: "r" (image)); | |
644 | } | |
645 | ||
d6e88aec | 646 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
647 | { |
648 | asm("fxrstor (%0)":: "r" (image)); | |
649 | } | |
650 | ||
d6e88aec | 651 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
652 | { |
653 | asm("finit"); | |
654 | } | |
655 | ||
656 | static inline u32 get_rdx_init_val(void) | |
657 | { | |
658 | return 0x600; /* P6 family */ | |
659 | } | |
660 | ||
c1a5d4f9 AK |
661 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
662 | { | |
663 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
664 | } | |
665 | ||
ec6d273d ZX |
666 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" |
667 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
668 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
669 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
670 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
671 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
672 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
673 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
674 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
1439442c | 675 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" |
2384d2b3 | 676 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" |
ec6d273d ZX |
677 | |
678 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
679 | ||
680 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
681 | #define TSS_BASE_SIZE 0x68 | |
682 | #define TSS_IOPB_SIZE (65536 / 8) | |
683 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
684 | #define RMODE_TSS_SIZE \ |
685 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 686 | |
37817f29 IE |
687 | enum { |
688 | TASK_SWITCH_CALL = 0, | |
689 | TASK_SWITCH_IRET = 1, | |
690 | TASK_SWITCH_JMP = 2, | |
691 | TASK_SWITCH_GATE = 3, | |
692 | }; | |
693 | ||
2714d1d3 | 694 | |
4ecac3fd | 695 | #ifdef CONFIG_64BIT |
33a37eb4 IM |
696 | # define KVM_EX_ENTRY ".quad" |
697 | # define KVM_EX_PUSH "pushq" | |
4ecac3fd | 698 | #else |
33a37eb4 IM |
699 | # define KVM_EX_ENTRY ".long" |
700 | # define KVM_EX_PUSH "pushl" | |
4ecac3fd AK |
701 | #endif |
702 | ||
703 | /* | |
704 | * Hardware virtualization extension instructions may fault if a | |
705 | * reboot turns off virtualization while processes are running. | |
706 | * Trap the fault and ignore the instruction if that happens. | |
707 | */ | |
708 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
709 | ||
710 | #define __kvm_handle_fault_on_reboot(insn) \ | |
711 | "666: " insn "\n\t" \ | |
18b13e54 | 712 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 713 | "667: \n\t" \ |
33a37eb4 | 714 | KVM_EX_PUSH " $666b \n\t" \ |
4ecac3fd AK |
715 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
716 | ".popsection \n\t" \ | |
717 | ".pushsection __ex_table, \"a\" \n\t" \ | |
718 | KVM_EX_ENTRY " 666b, 667b \n\t" \ | |
719 | ".popsection" | |
720 | ||
e930bffe AA |
721 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
722 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
723 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
724 | ||
77ef50a5 | 725 | #endif /* ASM_X86__KVM_HOST_H */ |