Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Written by: Patricia Gaughen, IBM Corporation | |
3 | * | |
4 | * Copyright (C) 2002, IBM Corp. | |
5 | * | |
5f4e4b72 | 6 | * All rights reserved. |
1da177e4 LT |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
16 | * NON INFRINGEMENT. See the GNU General Public License for more | |
17 | * details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | * Send feedback to <gone@us.ibm.com> | |
24 | */ | |
25 | ||
26 | #ifndef NUMAQ_H | |
27 | #define NUMAQ_H | |
28 | ||
29 | #ifdef CONFIG_X86_NUMAQ | |
30 | ||
ab530e1f | 31 | extern int found_numaq; |
1da177e4 LT |
32 | extern int get_memcfg_numaq(void); |
33 | ||
34 | /* | |
35 | * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the | |
36 | */ | |
5f4e4b72 JP |
37 | #define SYS_CFG_DATA_PRIV_ADDR 0x0009d000 /* place for scd in private |
38 | quad space */ | |
1da177e4 LT |
39 | |
40 | /* | |
41 | * Communication area for each processor on lynxer-processor tests. | |
42 | * | |
43 | * NOTE: If you change the size of this eachproc structure you need | |
44 | * to change the definition for EACH_QUAD_SIZE. | |
45 | */ | |
46 | struct eachquadmem { | |
47 | unsigned int priv_mem_start; /* Starting address of this */ | |
48 | /* quad's private memory. */ | |
49 | /* This is always 0. */ | |
50 | /* In MB. */ | |
51 | unsigned int priv_mem_size; /* Size of this quad's */ | |
52 | /* private memory. */ | |
53 | /* In MB. */ | |
54 | unsigned int low_shrd_mem_strp_start;/* Starting address of this */ | |
55 | /* quad's low shared block */ | |
56 | /* (untranslated). */ | |
57 | /* In MB. */ | |
58 | unsigned int low_shrd_mem_start; /* Starting address of this */ | |
59 | /* quad's low shared memory */ | |
60 | /* (untranslated). */ | |
61 | /* In MB. */ | |
62 | unsigned int low_shrd_mem_size; /* Size of this quad's low */ | |
63 | /* shared memory. */ | |
64 | /* In MB. */ | |
65 | unsigned int lmmio_copb_start; /* Starting address of this */ | |
66 | /* quad's local memory */ | |
67 | /* mapped I/O in the */ | |
68 | /* compatibility OPB. */ | |
69 | /* In MB. */ | |
70 | unsigned int lmmio_copb_size; /* Size of this quad's local */ | |
71 | /* memory mapped I/O in the */ | |
72 | /* compatibility OPB. */ | |
73 | /* In MB. */ | |
74 | unsigned int lmmio_nopb_start; /* Starting address of this */ | |
75 | /* quad's local memory */ | |
76 | /* mapped I/O in the */ | |
77 | /* non-compatibility OPB. */ | |
78 | /* In MB. */ | |
79 | unsigned int lmmio_nopb_size; /* Size of this quad's local */ | |
80 | /* memory mapped I/O in the */ | |
81 | /* non-compatibility OPB. */ | |
82 | /* In MB. */ | |
83 | unsigned int io_apic_0_start; /* Starting address of I/O */ | |
84 | /* APIC 0. */ | |
85 | unsigned int io_apic_0_sz; /* Size I/O APIC 0. */ | |
86 | unsigned int io_apic_1_start; /* Starting address of I/O */ | |
87 | /* APIC 1. */ | |
88 | unsigned int io_apic_1_sz; /* Size I/O APIC 1. */ | |
89 | unsigned int hi_shrd_mem_start; /* Starting address of this */ | |
90 | /* quad's high shared memory.*/ | |
91 | /* In MB. */ | |
92 | unsigned int hi_shrd_mem_size; /* Size of this quad's high */ | |
93 | /* shared memory. */ | |
94 | /* In MB. */ | |
95 | unsigned int mps_table_addr; /* Address of this quad's */ | |
96 | /* MPS tables from BIOS, */ | |
97 | /* in system space.*/ | |
98 | unsigned int lcl_MDC_pio_addr; /* Port-I/O address for */ | |
99 | /* local access of MDC. */ | |
100 | unsigned int rmt_MDC_mmpio_addr; /* MM-Port-I/O address for */ | |
101 | /* remote access of MDC. */ | |
102 | unsigned int mm_port_io_start; /* Starting address of this */ | |
103 | /* quad's memory mapped Port */ | |
104 | /* I/O space. */ | |
105 | unsigned int mm_port_io_size; /* Size of this quad's memory*/ | |
106 | /* mapped Port I/O space. */ | |
107 | unsigned int mm_rmt_io_apic_start; /* Starting address of this */ | |
108 | /* quad's memory mapped */ | |
109 | /* remote I/O APIC space. */ | |
110 | unsigned int mm_rmt_io_apic_size; /* Size of this quad's memory*/ | |
111 | /* mapped remote I/O APIC */ | |
112 | /* space. */ | |
113 | unsigned int mm_isa_start; /* Starting address of this */ | |
114 | /* quad's memory mapped ISA */ | |
115 | /* space (contains MDC */ | |
116 | /* memory space). */ | |
117 | unsigned int mm_isa_size; /* Size of this quad's memory*/ | |
118 | /* mapped ISA space (contains*/ | |
119 | /* MDC memory space). */ | |
120 | unsigned int rmt_qmi_addr; /* Remote addr to access QMI.*/ | |
121 | unsigned int lcl_qmi_addr; /* Local addr to access QMI. */ | |
122 | }; | |
123 | ||
124 | /* | |
125 | * Note: This structure must be NOT be changed unless the multiproc and | |
126 | * OS are changed to reflect the new structure. | |
127 | */ | |
128 | struct sys_cfg_data { | |
129 | unsigned int quad_id; | |
130 | unsigned int bsp_proc_id; /* Boot Strap Processor in this quad. */ | |
131 | unsigned int scd_version; /* Version number of this table. */ | |
132 | unsigned int first_quad_id; | |
133 | unsigned int quads_present31_0; /* 1 bit for each quad */ | |
134 | unsigned int quads_present63_32; /* 1 bit for each quad */ | |
135 | unsigned int config_flags; | |
136 | unsigned int boot_flags; | |
137 | unsigned int csr_start_addr; /* Absolute value (not in MB) */ | |
138 | unsigned int csr_size; /* Absolute value (not in MB) */ | |
139 | unsigned int lcl_apic_start_addr; /* Absolute value (not in MB) */ | |
140 | unsigned int lcl_apic_size; /* Absolute value (not in MB) */ | |
141 | unsigned int low_shrd_mem_base; /* 0 or 512MB or 1GB */ | |
142 | unsigned int low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */ | |
143 | /* may not be totally populated */ | |
5f4e4b72 | 144 | unsigned int split_mem_enbl; /* 0 for no low shared memory */ |
1da177e4 LT |
145 | unsigned int mmio_sz; /* Size of total system memory mapped I/O */ |
146 | /* (in MB). */ | |
147 | unsigned int quad_spin_lock; /* Spare location used for quad */ | |
148 | /* bringup. */ | |
149 | unsigned int nonzero55; /* For checksumming. */ | |
150 | unsigned int nonzeroaa; /* For checksumming. */ | |
151 | unsigned int scd_magic_number; | |
152 | unsigned int system_type; | |
153 | unsigned int checksum; | |
154 | /* | |
155 | * memory configuration area for each quad | |
156 | */ | |
5f4e4b72 | 157 | struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */ |
1da177e4 LT |
158 | }; |
159 | ||
3d88cca7 YL |
160 | void numaq_tsc_disable(void); |
161 | ||
d49c4288 YL |
162 | #else |
163 | static inline int get_memcfg_numaq(void) | |
1da177e4 | 164 | { |
d49c4288 | 165 | return 0; |
1da177e4 LT |
166 | } |
167 | #endif /* CONFIG_X86_NUMAQ */ | |
168 | #endif /* NUMAQ_H */ | |
169 |