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1da177e4 LT |
1 | #ifndef _X86_64_PGTABLE_H |
2 | #define _X86_64_PGTABLE_H | |
3 | ||
6df95fd7 | 4 | #include <linux/const.h> |
9d291e78 VG |
5 | #ifndef __ASSEMBLY__ |
6 | ||
1da177e4 LT |
7 | /* |
8 | * This file contains the functions and defines necessary to modify and use | |
9 | * the x86-64 page table tree. | |
10 | */ | |
11 | #include <asm/processor.h> | |
1977f032 | 12 | #include <linux/bitops.h> |
1da177e4 LT |
13 | #include <linux/threads.h> |
14 | #include <asm/pda.h> | |
15 | ||
16 | extern pud_t level3_kernel_pgt[512]; | |
1da177e4 LT |
17 | extern pud_t level3_ident_pgt[512]; |
18 | extern pmd_t level2_kernel_pgt[512]; | |
19 | extern pgd_t init_level4_pgt[]; | |
1da177e4 | 20 | |
e3ebadd9 | 21 | #define swapper_pg_dir init_level4_pgt |
1da177e4 | 22 | |
1da177e4 | 23 | extern void paging_init(void); |
1da177e4 | 24 | |
9d291e78 VG |
25 | #endif /* !__ASSEMBLY__ */ |
26 | ||
85958b46 | 27 | #define SHARED_KERNEL_PMD 0 |
e4b71dcf | 28 | |
1da177e4 LT |
29 | /* |
30 | * PGDIR_SHIFT determines what a top-level page table entry can map | |
31 | */ | |
32 | #define PGDIR_SHIFT 39 | |
33 | #define PTRS_PER_PGD 512 | |
34 | ||
35 | /* | |
36 | * 3rd level page | |
37 | */ | |
38 | #define PUD_SHIFT 30 | |
39 | #define PTRS_PER_PUD 512 | |
40 | ||
41 | /* | |
42 | * PMD_SHIFT determines the size of the area a middle-level | |
43 | * page table can map | |
44 | */ | |
45 | #define PMD_SHIFT 21 | |
46 | #define PTRS_PER_PMD 512 | |
47 | ||
48 | /* | |
49 | * entries per page directory level | |
50 | */ | |
51 | #define PTRS_PER_PTE 512 | |
52 | ||
9d291e78 VG |
53 | #ifndef __ASSEMBLY__ |
54 | ||
7f94401e JP |
55 | #define pte_ERROR(e) \ |
56 | printk("%s:%d: bad pte %p(%016lx).\n", \ | |
57 | __FILE__, __LINE__, &(e), pte_val(e)) | |
58 | #define pmd_ERROR(e) \ | |
59 | printk("%s:%d: bad pmd %p(%016lx).\n", \ | |
60 | __FILE__, __LINE__, &(e), pmd_val(e)) | |
61 | #define pud_ERROR(e) \ | |
62 | printk("%s:%d: bad pud %p(%016lx).\n", \ | |
63 | __FILE__, __LINE__, &(e), pud_val(e)) | |
64 | #define pgd_ERROR(e) \ | |
65 | printk("%s:%d: bad pgd %p(%016lx).\n", \ | |
66 | __FILE__, __LINE__, &(e), pgd_val(e)) | |
1da177e4 LT |
67 | |
68 | #define pgd_none(x) (!pgd_val(x)) | |
69 | #define pud_none(x) (!pud_val(x)) | |
70 | ||
4891645e JF |
71 | struct mm_struct; |
72 | ||
73 | static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, | |
74 | pte_t *ptep) | |
1da177e4 | 75 | { |
4891645e JF |
76 | *ptep = native_make_pte(0); |
77 | } | |
1da177e4 | 78 | |
4891645e | 79 | static inline void native_set_pte(pte_t *ptep, pte_t pte) |
1da177e4 | 80 | { |
4891645e JF |
81 | *ptep = pte; |
82 | } | |
1da177e4 | 83 | |
b65e6390 IM |
84 | static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) |
85 | { | |
86 | native_set_pte(ptep, pte); | |
87 | } | |
88 | ||
4891645e | 89 | static inline pte_t native_ptep_get_and_clear(pte_t *xp) |
1da177e4 | 90 | { |
4891645e JF |
91 | #ifdef CONFIG_SMP |
92 | return native_make_pte(xchg(&xp->pte, 0)); | |
93 | #else | |
7f94401e JP |
94 | /* native_local_ptep_get_and_clear, |
95 | but duplicated because of cyclic dependency */ | |
4891645e JF |
96 | pte_t ret = *xp; |
97 | native_pte_clear(NULL, 0, xp); | |
98 | return ret; | |
99 | #endif | |
1da177e4 LT |
100 | } |
101 | ||
4891645e | 102 | static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) |
1da177e4 | 103 | { |
4891645e | 104 | *pmdp = pmd; |
1da177e4 LT |
105 | } |
106 | ||
4891645e | 107 | static inline void native_pmd_clear(pmd_t *pmd) |
1da177e4 | 108 | { |
4891645e JF |
109 | native_set_pmd(pmd, native_make_pmd(0)); |
110 | } | |
1da177e4 | 111 | |
4891645e | 112 | static inline void native_set_pud(pud_t *pudp, pud_t pud) |
1da177e4 | 113 | { |
4891645e | 114 | *pudp = pud; |
1da177e4 LT |
115 | } |
116 | ||
4891645e JF |
117 | static inline void native_pud_clear(pud_t *pud) |
118 | { | |
119 | native_set_pud(pud, native_make_pud(0)); | |
120 | } | |
61e06037 | 121 | |
4891645e JF |
122 | static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd) |
123 | { | |
124 | *pgdp = pgd; | |
125 | } | |
8c65b4a6 | 126 | |
7f94401e | 127 | static inline void native_pgd_clear(pgd_t *pgd) |
61e06037 | 128 | { |
4891645e | 129 | native_set_pgd(pgd, native_make_pgd(0)); |
61e06037 ZA |
130 | } |
131 | ||
1da177e4 LT |
132 | #define pte_same(a, b) ((a).pte == (b).pte) |
133 | ||
9d291e78 VG |
134 | #endif /* !__ASSEMBLY__ */ |
135 | ||
7f94401e JP |
136 | #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) |
137 | #define PMD_MASK (~(PMD_SIZE - 1)) | |
138 | #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) | |
139 | #define PUD_MASK (~(PUD_SIZE - 1)) | |
140 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | |
141 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | |
1da177e4 | 142 | |
1da177e4 | 143 | |
7f94401e | 144 | #define MAXMEM _AC(0x00003fffffffffff, UL) |
63f6564d RD |
145 | #define VMALLOC_START _AC(0xffffc20000000000, UL) |
146 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) | |
0889eba5 | 147 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) |
85eb69a1 | 148 | #define MODULES_VADDR _AC(0xffffffffa0000000, UL) |
63f6564d | 149 | #define MODULES_END _AC(0xfffffffffff00000, UL) |
1da177e4 LT |
150 | #define MODULES_LEN (MODULES_END - MODULES_VADDR) |
151 | ||
9d291e78 VG |
152 | #ifndef __ASSEMBLY__ |
153 | ||
eab724e5 JB |
154 | static inline unsigned long pgd_bad(pgd_t pgd) |
155 | { | |
156 | return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); | |
157 | } | |
1da177e4 LT |
158 | |
159 | static inline unsigned long pud_bad(pud_t pud) | |
160 | { | |
40869cd0 IM |
161 | return pud_val(pud) & |
162 | ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER | _PAGE_PSE | _PAGE_NX); | |
eab724e5 JB |
163 | } |
164 | ||
165 | static inline unsigned long pmd_bad(pmd_t pmd) | |
166 | { | |
40869cd0 IM |
167 | return pmd_val(pmd) & |
168 | ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER | _PAGE_PSE | _PAGE_NX); | |
1da177e4 LT |
169 | } |
170 | ||
7f94401e JP |
171 | #define pte_none(x) (!pte_val((x))) |
172 | #define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE)) | |
1da177e4 | 173 | |
7f94401e JP |
174 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */ |
175 | #define pte_page(x) pfn_to_page(pte_pfn((x))) | |
176 | #define pte_pfn(x) ((pte_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT) | |
1da177e4 | 177 | |
1da177e4 LT |
178 | /* |
179 | * Macro to mark a page protection value as "uncacheable". | |
180 | */ | |
7f94401e JP |
181 | #define pgprot_noncached(prot) \ |
182 | (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT)) | |
1da177e4 LT |
183 | |
184 | /* | |
185 | * Conversion functions: convert a page and protection to a page entry, | |
186 | * and a page entry and page directory to the page they refer to. | |
187 | */ | |
188 | ||
1da177e4 LT |
189 | /* |
190 | * Level 4 access. | |
191 | */ | |
7f94401e JP |
192 | #define pgd_page_vaddr(pgd) \ |
193 | ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_MASK)) | |
194 | #define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT)) | |
195 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
196 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
197 | #define pgd_offset_k(address) (init_level4_pgt + pgd_index((address))) | |
1da177e4 | 198 | #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT) |
e00fc542 | 199 | static inline int pgd_large(pgd_t pgd) { return 0; } |
1da177e4 LT |
200 | #define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE }) |
201 | ||
202 | /* PUD - Level3 access */ | |
203 | /* to find an entry in a page-table-directory. */ | |
7f94401e JP |
204 | #define pud_page_vaddr(pud) \ |
205 | ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK)) | |
206 | #define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT)) | |
207 | #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) | |
208 | #define pud_offset(pgd, address) \ | |
209 | ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address))) | |
210 | #define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT) | |
1da177e4 | 211 | |
61e19a34 AK |
212 | static inline int pud_large(pud_t pte) |
213 | { | |
7f94401e JP |
214 | return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == |
215 | (_PAGE_PSE | _PAGE_PRESENT); | |
61e19a34 AK |
216 | } |
217 | ||
1da177e4 | 218 | /* PMD - Level 2 access */ |
7f94401e JP |
219 | #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_MASK)) |
220 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) | |
221 | ||
222 | #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | |
223 | #define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \ | |
224 | pmd_index(address)) | |
225 | #define pmd_none(x) (!pmd_val((x))) | |
226 | #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) | |
227 | #define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot)))) | |
228 | #define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT) | |
229 | ||
230 | #define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) | |
231 | #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \ | |
232 | _PAGE_FILE }) | |
1da177e4 LT |
233 | #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT |
234 | ||
235 | /* PTE - Level 1 access. */ | |
236 | ||
237 | /* page, protection -> pte */ | |
7f94401e JP |
238 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot)) |
239 | ||
240 | #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | |
46a82b2d | 241 | #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \ |
7f94401e | 242 | pte_index((address))) |
1da177e4 LT |
243 | |
244 | /* x86-64 always has all page tables mapped. */ | |
7f94401e JP |
245 | #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) |
246 | #define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address)) | |
1da177e4 | 247 | #define pte_unmap(pte) /* NOP */ |
7f94401e | 248 | #define pte_unmap_nested(pte) /* NOP */ |
1da177e4 | 249 | |
7f94401e | 250 | #define update_mmu_cache(vma, address, pte) do { } while (0) |
1da177e4 | 251 | |
00d1c5e0 IM |
252 | extern int direct_gbpages; |
253 | ||
1da177e4 LT |
254 | /* Encode and de-code a swap entry */ |
255 | #define __swp_type(x) (((x).val >> 1) & 0x3f) | |
256 | #define __swp_offset(x) ((x).val >> 8) | |
7f94401e JP |
257 | #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | \ |
258 | ((offset) << 8) }) | |
259 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) | |
c8e5393a | 260 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) |
1da177e4 | 261 | |
7f94401e | 262 | extern int kern_addr_valid(unsigned long addr); |
31eedd82 | 263 | extern void cleanup_highmap(void); |
1da177e4 | 264 | |
7f94401e JP |
265 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ |
266 | remap_pfn_range(vma, vaddr, pfn, size, prot) | |
1da177e4 | 267 | |
1da177e4 | 268 | #define HAVE_ARCH_UNMAPPED_AREA |
cc503c1b | 269 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN |
1da177e4 LT |
270 | |
271 | #define pgtable_cache_init() do { } while (0) | |
da8f153e | 272 | #define check_pgt_cache() do { } while (0) |
1da177e4 LT |
273 | |
274 | #define PAGE_AGP PAGE_KERNEL_NOCACHE | |
275 | #define HAVE_PAGE_AGP 1 | |
276 | ||
277 | /* fs/proc/kcore.c */ | |
278 | #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK) | |
7f94401e JP |
279 | #define kc_offset_to_vaddr(o) \ |
280 | (((o) & (1UL << (__VIRTUAL_MASK_SHIFT - 1))) \ | |
281 | ? ((o) | ~__VIRTUAL_MASK) \ | |
282 | : (o)) | |
1da177e4 | 283 | |
1da177e4 | 284 | #define __HAVE_ARCH_PTE_SAME |
9d291e78 | 285 | #endif /* !__ASSEMBLY__ */ |
1da177e4 LT |
286 | |
287 | #endif /* _X86_64_PGTABLE_H */ |