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1da177e4 LT |
1 | #ifndef __ASM_SMP_H |
2 | #define __ASM_SMP_H | |
3 | ||
ae9d983b TG |
4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/cpumask.h> | |
6 | #include <linux/init.h> | |
7 | ||
1da177e4 LT |
8 | /* |
9 | * We need the APIC definitions automatically as part of 'smp.h' | |
10 | */ | |
ae9d983b TG |
11 | #ifdef CONFIG_X86_LOCAL_APIC |
12 | # include <asm/mpspec.h> | |
13 | # include <asm/apic.h> | |
14 | # ifdef CONFIG_X86_IO_APIC | |
15 | # include <asm/io_apic.h> | |
16 | # endif | |
1da177e4 LT |
17 | #endif |
18 | ||
ae9d983b TG |
19 | extern cpumask_t cpu_callout_map; |
20 | extern cpumask_t cpu_callin_map; | |
1da177e4 | 21 | |
ae9d983b TG |
22 | extern int smp_num_siblings; |
23 | extern unsigned int num_processors; | |
1da177e4 | 24 | |
1da177e4 | 25 | extern void smp_alloc_memory(void); |
ae9d983b TG |
26 | extern void lock_ipi_call_lock(void); |
27 | extern void unlock_ipi_call_lock(void); | |
1da177e4 | 28 | |
1da177e4 LT |
29 | extern void (*mtrr_hook) (void); |
30 | extern void zap_low_mappings (void); | |
31 | ||
71fff5e6 | 32 | extern u8 __initdata x86_cpu_to_apicid_init[]; |
3b419089 | 33 | extern void *x86_cpu_to_apicid_early_ptr; |
b4033c17 | 34 | |
ae9d983b TG |
35 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
36 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); | |
37 | DECLARE_PER_CPU(u8, cpu_llc_id); | |
38 | DECLARE_PER_CPU(u8, x86_cpu_to_apicid); | |
c70df743 | 39 | |
e1367daf LS |
40 | #ifdef CONFIG_HOTPLUG_CPU |
41 | extern void cpu_exit_clear(void); | |
42 | extern void cpu_uninit(void); | |
c70df743 | 43 | extern void remove_siblinginfo(int cpu); |
e1367daf LS |
44 | #endif |
45 | ||
ae9d983b TG |
46 | /* Globals due to paravirt */ |
47 | extern void set_cpu_sibling_map(int cpu); | |
48 | ||
01a2f435 JF |
49 | struct smp_ops |
50 | { | |
51 | void (*smp_prepare_boot_cpu)(void); | |
52 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
53 | int (*cpu_up)(unsigned cpu); | |
54 | void (*smp_cpus_done)(unsigned max_cpus); | |
55 | ||
56 | void (*smp_send_stop)(void); | |
57 | void (*smp_send_reschedule)(int cpu); | |
58 | int (*smp_call_function_mask)(cpumask_t mask, | |
59 | void (*func)(void *info), void *info, | |
60 | int wait); | |
61 | }; | |
62 | ||
ae9d983b | 63 | #ifdef CONFIG_SMP |
01a2f435 JF |
64 | extern struct smp_ops smp_ops; |
65 | ||
66 | static inline void smp_prepare_boot_cpu(void) | |
67 | { | |
68 | smp_ops.smp_prepare_boot_cpu(); | |
69 | } | |
70 | static inline void smp_prepare_cpus(unsigned int max_cpus) | |
71 | { | |
72 | smp_ops.smp_prepare_cpus(max_cpus); | |
73 | } | |
74 | static inline int __cpu_up(unsigned int cpu) | |
75 | { | |
76 | return smp_ops.cpu_up(cpu); | |
77 | } | |
78 | static inline void smp_cpus_done(unsigned int max_cpus) | |
79 | { | |
80 | smp_ops.smp_cpus_done(max_cpus); | |
81 | } | |
82 | ||
83 | static inline void smp_send_stop(void) | |
84 | { | |
85 | smp_ops.smp_send_stop(); | |
86 | } | |
87 | static inline void smp_send_reschedule(int cpu) | |
88 | { | |
89 | smp_ops.smp_send_reschedule(cpu); | |
90 | } | |
ceff8d85 TG |
91 | static inline int smp_call_function_mask(cpumask_t mask, |
92 | void (*func) (void *info), void *info, | |
93 | int wait) | |
94 | { | |
95 | return smp_ops.smp_call_function_mask(mask, func, info, wait); | |
96 | } | |
01a2f435 JF |
97 | |
98 | void native_smp_prepare_boot_cpu(void); | |
99 | void native_smp_prepare_cpus(unsigned int max_cpus); | |
100 | int native_cpu_up(unsigned int cpunum); | |
101 | void native_smp_cpus_done(unsigned int max_cpus); | |
102 | ||
ae5da273 | 103 | #ifndef CONFIG_PARAVIRT |
ae9d983b | 104 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0) |
ae5da273 ZA |
105 | #endif |
106 | ||
ae9d983b TG |
107 | extern int __cpu_disable(void); |
108 | extern void __cpu_die(unsigned int cpu); | |
109 | ||
1da177e4 LT |
110 | /* |
111 | * This function is needed by all SMP systems. It must _always_ be valid | |
112 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
113 | * so this is correct in the x86 case. | |
114 | */ | |
7c3576d2 JF |
115 | DECLARE_PER_CPU(int, cpu_number); |
116 | #define raw_smp_processor_id() (x86_read_percpu(cpu_number)) | |
1da177e4 | 117 | |
ae9d983b TG |
118 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
119 | ||
120 | extern int safe_smp_processor_id(void); | |
121 | ||
122 | void __cpuinit smp_store_cpu_info(int id); | |
1da177e4 LT |
123 | |
124 | /* We don't mark CPUs online until __cpu_up(), so we need another measure */ | |
125 | static inline int num_booting_cpus(void) | |
126 | { | |
127 | return cpus_weight(cpu_callout_map); | |
128 | } | |
129 | ||
b4033c17 AR |
130 | #else /* CONFIG_SMP */ |
131 | ||
dc2bc768 | 132 | #define safe_smp_processor_id() 0 |
b4033c17 AR |
133 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid |
134 | ||
ae9d983b | 135 | #endif /* !CONFIG_SMP */ |
815a965b | 136 | |
a36166c6 FLVC |
137 | #ifdef CONFIG_X86_LOCAL_APIC |
138 | ||
ae9d983b TG |
139 | static __inline int logical_smp_processor_id(void) |
140 | { | |
141 | /* we don't want to mark this access volatile - bad code generation */ | |
142 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); | |
143 | } | |
144 | ||
145 | # ifdef APIC_DEFINITION | |
a36166c6 | 146 | extern int hard_smp_processor_id(void); |
ae9d983b TG |
147 | # else |
148 | # include <mach_apicdef.h> | |
a36166c6 FLVC |
149 | static inline int hard_smp_processor_id(void) |
150 | { | |
151 | /* we don't want to mark this access volatile - bad code generation */ | |
ae9d983b | 152 | return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID)); |
a36166c6 | 153 | } |
ae9d983b | 154 | # endif /* APIC_DEFINITION */ |
a36166c6 FLVC |
155 | |
156 | #else /* CONFIG_X86_LOCAL_APIC */ | |
157 | ||
ae9d983b TG |
158 | # ifndef CONFIG_SMP |
159 | # define hard_smp_processor_id() 0 | |
160 | # endif | |
a36166c6 FLVC |
161 | |
162 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
163 | ||
ae9d983b | 164 | #endif /* !ASSEMBLY */ |
1da177e4 | 165 | #endif |