[deliverable/linux.git] / include / asm-x86 / topology_64.h

#ifndef _ASM_X86_TOPOLOGY_H
#define _ASM_X86_TOPOLOGY_H

#ifdef CONFIG_NUMA
#include <linux/cpumask.h>
#include <asm/mpspec.h>

/* Mappings between logical cpu number and node number */
extern int cpu_to_node_map[];
extern cpumask_t node_to_cpumask_map[];

#ifdef CONFIG_ACPI_NUMA
extern int __node_distance(int, int);
#define node_distance(a,b) __node_distance(a,b)
#endif

/* Returns the number of the node containing CPU 'cpu' */
static inline int cpu_to_node(int cpu)
{
	return cpu_to_node_map[cpu];
}

/*
 * Returns the number of the node containing Node 'node'. This
 * architecture is flat, so it is a pretty simple function!
 */
#define parent_node(node) (node)

/* Returns a bitmask of CPUs on Node 'node'. */
static inline cpumask_t node_to_cpumask(int node)
{
	return node_to_cpumask_map[node];
}

/* Returns the number of the first CPU on Node 'node'. */
static inline int node_to_first_cpu(int node)
{
	cpumask_t mask = node_to_cpumask(node);

	return first_cpu(mask);
}

#define pcibus_to_node(bus) __pcibus_to_node(bus)
#define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus)

#define numa_node_id()			read_pda(nodenumber)

/* sched_domains SD_NODE_INIT for x86_64 machines */
#define SD_NODE_INIT (struct sched_domain) {		\
	.span			= CPU_MASK_NONE,	\
	.parent			= NULL,			\
	.child			= NULL,			\
	.groups			= NULL,			\
	.min_interval		= 8,			\
	.max_interval		= 32,			\
	.busy_factor		= 32,			\
	.imbalance_pct		= 125,			\
	.cache_nice_tries	= 2,			\
	.busy_idx		= 3,			\
	.idle_idx		= 2,			\
	.newidle_idx		= 0,			\
	.wake_idx		= 1,			\
	.forkexec_idx		= 1,			\
	.flags			= SD_LOAD_BALANCE	\
				| SD_BALANCE_EXEC	\
				| SD_BALANCE_FORK	\
				| SD_SERIALIZE		\
				| SD_WAKE_BALANCE,	\
	.last_balance		= jiffies,		\
	.balance_interval	= 1,			\
	.nr_balance_failed	= 0,			\
}

#else /* CONFIG_NUMA */

#include <asm-generic/topology.h>

#endif

extern cpumask_t cpu_coregroup_map(int cpu);

#ifdef CONFIG_SMP
#define topology_physical_package_id(cpu)	(cpu_data(cpu).phys_proc_id)
#define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
#define topology_core_siblings(cpu)		(per_cpu(cpu_core_map, cpu))
#define topology_thread_siblings(cpu)		(per_cpu(cpu_sibling_map, cpu))
#define mc_capable()			(boot_cpu_data.x86_max_cores > 1)
#define smt_capable()			(smp_num_siblings > 1)
#endif

#endif
Commit	Line	Data
b4ea9299 TG	1	#ifndef _ASM_X86_TOPOLOGY_H
b4ea9299 TG	2	#define _ASM_X86_TOPOLOGY_H
1da177e4	3
2b97690f	4	#ifdef CONFIG_NUMA
b4ea9299	5	#include <linux/cpumask.h>
1da177e4	6	#include <asm/mpspec.h>
1da177e4	7
b4ea9299	8	/* Mappings between logical cpu number and node number */
7462894a TG	9	extern int cpu_to_node_map[];
7462894a TG	10	extern cpumask_t node_to_cpumask_map[];
1da177e4 LT	11
	12	#ifdef CONFIG_ACPI_NUMA
	13	extern int __node_distance(int, int);
	14	#define node_distance(a,b) __node_distance(a,b)
1da177e4 LT	15	#endif
1da177e4 LT	16
b4ea9299 TG	17	/* Returns the number of the node containing CPU 'cpu' */
	18	static inline int cpu_to_node(int cpu)
	19	{
	20	return cpu_to_node_map[cpu];
	21	}
	22
	23	/*
	24	* Returns the number of the node containing Node 'node'. This
	25	* architecture is flat, so it is a pretty simple function!
	26	*/
	27	#define parent_node(node) (node)
	28
	29	/* Returns a bitmask of CPUs on Node 'node'. */
	30	static inline cpumask_t node_to_cpumask(int node)
	31	{
	32	return node_to_cpumask_map[node];
	33	}
	34
	35	/* Returns the number of the first CPU on Node 'node'. */
	36	static inline int node_to_first_cpu(int node)
	37	{
	38	cpumask_t mask = node_to_cpumask(node);
	39
	40	return first_cpu(mask);
	41	}
	42
	43	#define pcibus_to_node(bus) __pcibus_to_node(bus)
	44	#define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus)
1da177e4	45
69d81fcd AK	46	#define numa_node_id() read_pda(nodenumber)
69d81fcd AK	47
1da177e4 LT	48	/* sched_domains SD_NODE_INIT for x86_64 machines */
	49	#define SD_NODE_INIT (struct sched_domain) { \
	50	.span = CPU_MASK_NONE, \
	51	.parent = NULL, \
1a848870	52	.child = NULL, \
1da177e4 LT	53	.groups = NULL, \
	54	.min_interval = 8, \
	55	.max_interval = 32, \
	56	.busy_factor = 32, \
	57	.imbalance_pct = 125, \
7897986b NP	58	.cache_nice_tries = 2, \
	59	.busy_idx = 3, \
	60	.idle_idx = 2, \
b4ea9299	61	.newidle_idx = 0, \
7897986b	62	.wake_idx = 1, \
147cbb4b	63	.forkexec_idx = 1, \
1da177e4	64	.flags = SD_LOAD_BALANCE \
1da177e4	65	\| SD_BALANCE_EXEC \
b4ea9299	66	\| SD_BALANCE_FORK \
08c183f3	67	\| SD_SERIALIZE \
1da177e4 LT	68	\| SD_WAKE_BALANCE, \
	69	.last_balance = jiffies, \
	70	.balance_interval = 1, \
	71	.nr_balance_failed = 0, \
	72	}
1da177e4	73
b4ea9299 TG	74	#else /* CONFIG_NUMA */
	75
	76	#include <asm-generic/topology.h>
	77
1da177e4 LT	78	#endif
1da177e4 LT	79
b4ea9299 TG	80	extern cpumask_t cpu_coregroup_map(int cpu);
b4ea9299 TG	81
69dcc991	82	#ifdef CONFIG_SMP
92cb7612 MT	83	#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
92cb7612 MT	84	#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
08357611	85	#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu))
d5a7430d	86	#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
5c45bf27	87	#define mc_capable() (boot_cpu_data.x86_max_cores > 1)
b4ea9299	88	#define smt_capable() (smp_num_siblings > 1)
69dcc991 ZY	89	#endif
69dcc991 ZY	90
1da177e4	91	#endif