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9a8fd558 CZ |
1 | /* |
2 | * include/asm-xtensa/cacheflush.h | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
6656920b | 8 | * (C) 2001 - 2007 Tensilica Inc. |
9a8fd558 CZ |
9 | */ |
10 | ||
11 | #ifndef _XTENSA_CACHEFLUSH_H | |
12 | #define _XTENSA_CACHEFLUSH_H | |
13 | ||
14 | #ifdef __KERNEL__ | |
15 | ||
16 | #include <linux/mm.h> | |
17 | #include <asm/processor.h> | |
18 | #include <asm/page.h> | |
19 | ||
20 | /* | |
6656920b | 21 | * Lo-level routines for cache flushing. |
9a8fd558 CZ |
22 | * |
23 | * invalidate data or instruction cache: | |
24 | * | |
25 | * __invalidate_icache_all() | |
26 | * __invalidate_icache_page(adr) | |
27 | * __invalidate_dcache_page(adr) | |
28 | * __invalidate_icache_range(from,size) | |
29 | * __invalidate_dcache_range(from,size) | |
30 | * | |
31 | * flush data cache: | |
32 | * | |
33 | * __flush_dcache_page(adr) | |
34 | * | |
35 | * flush and invalidate data cache: | |
36 | * | |
37 | * __flush_invalidate_dcache_all() | |
38 | * __flush_invalidate_dcache_page(adr) | |
39 | * __flush_invalidate_dcache_range(from,size) | |
6656920b CZ |
40 | * |
41 | * specials for cache aliasing: | |
42 | * | |
43 | * __flush_invalidate_dcache_page_alias(vaddr,paddr) | |
44 | * __invalidate_icache_page_alias(vaddr,paddr) | |
9a8fd558 CZ |
45 | */ |
46 | ||
6656920b | 47 | extern void __invalidate_dcache_all(void); |
9a8fd558 | 48 | extern void __invalidate_icache_all(void); |
9a8fd558 CZ |
49 | extern void __invalidate_dcache_page(unsigned long); |
50 | extern void __invalidate_icache_page(unsigned long); | |
51 | extern void __invalidate_icache_range(unsigned long, unsigned long); | |
52 | extern void __invalidate_dcache_range(unsigned long, unsigned long); | |
53 | ||
6656920b | 54 | |
9a8fd558 | 55 | #if XCHAL_DCACHE_IS_WRITEBACK |
6656920b | 56 | extern void __flush_invalidate_dcache_all(void); |
9a8fd558 | 57 | extern void __flush_dcache_page(unsigned long); |
6656920b | 58 | extern void __flush_dcache_range(unsigned long, unsigned long); |
9a8fd558 CZ |
59 | extern void __flush_invalidate_dcache_page(unsigned long); |
60 | extern void __flush_invalidate_dcache_range(unsigned long, unsigned long); | |
61 | #else | |
6656920b CZ |
62 | # define __flush_dcache_range(p,s) do { } while(0) |
63 | # define __flush_dcache_page(p) do { } while(0) | |
64 | # define __flush_invalidate_dcache_page(p) __invalidate_dcache_page(p) | |
65 | # define __flush_invalidate_dcache_range(p,s) __invalidate_dcache_range(p,s) | |
66 | #endif | |
67 | ||
68 | #if (DCACHE_WAY_SIZE > PAGE_SIZE) | |
69 | extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); | |
70 | #endif | |
71 | #if (ICACHE_WAY_SIZE > PAGE_SIZE) | |
72 | extern void __invalidate_icache_page_alias(unsigned long, unsigned long); | |
9a8fd558 CZ |
73 | #endif |
74 | ||
75 | /* | |
76 | * We have physically tagged caches - nothing to do here - | |
77 | * unless we have cache aliasing. | |
78 | * | |
79 | * Pages can get remapped. Because this might change the 'color' of that page, | |
80 | * we have to flush the cache before the PTE is changed. | |
81 | * (see also Documentation/cachetlb.txt) | |
82 | */ | |
83 | ||
6656920b | 84 | #if (DCACHE_WAY_SIZE > PAGE_SIZE) |
9a8fd558 | 85 | |
6656920b CZ |
86 | #define flush_cache_all() \ |
87 | do { \ | |
88 | __flush_invalidate_dcache_all(); \ | |
89 | __invalidate_icache_all(); \ | |
90 | } while (0) | |
9a8fd558 | 91 | |
6656920b CZ |
92 | #define flush_cache_mm(mm) flush_cache_all() |
93 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | |
9a8fd558 | 94 | |
6656920b CZ |
95 | #define flush_cache_vmap(start,end) flush_cache_all() |
96 | #define flush_cache_vunmap(start,end) flush_cache_all() | |
9a8fd558 | 97 | |
6656920b | 98 | extern void flush_dcache_page(struct page*); |
9a8fd558 CZ |
99 | extern void flush_cache_range(struct vm_area_struct*, ulong, ulong); |
100 | extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned long); | |
101 | ||
102 | #else | |
103 | ||
104 | #define flush_cache_all() do { } while (0) | |
105 | #define flush_cache_mm(mm) do { } while (0) | |
ec8c0446 | 106 | #define flush_cache_dup_mm(mm) do { } while (0) |
9a8fd558 CZ |
107 | |
108 | #define flush_cache_vmap(start,end) do { } while (0) | |
109 | #define flush_cache_vunmap(start,end) do { } while (0) | |
110 | ||
111 | #define flush_dcache_page(page) do { } while (0) | |
112 | ||
113 | #define flush_cache_page(vma,addr,pfn) do { } while (0) | |
114 | #define flush_cache_range(vma,start,end) do { } while (0) | |
115 | ||
116 | #endif | |
117 | ||
6656920b | 118 | /* Ensure consistency between data and instruction cache. */ |
9a8fd558 | 119 | #define flush_icache_range(start,end) \ |
6656920b CZ |
120 | do { \ |
121 | __flush_dcache_range(start, (end) - (start)); \ | |
122 | __invalidate_icache_range(start,(end) - (start)); \ | |
123 | } while (0) | |
9a8fd558 CZ |
124 | |
125 | /* This is not required, see Documentation/cachetlb.txt */ | |
6656920b | 126 | #define flush_icache_page(vma,page) do { } while (0) |
9a8fd558 CZ |
127 | |
128 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
129 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
130 | ||
6656920b | 131 | #if (DCACHE_WAY_SIZE > PAGE_SIZE) |
9a8fd558 | 132 | |
6656920b CZ |
133 | extern void copy_to_user_page(struct vm_area_struct*, struct page*, |
134 | unsigned long, void*, const void*, unsigned long); | |
135 | extern void copy_from_user_page(struct vm_area_struct*, struct page*, | |
136 | unsigned long, void*, const void*, unsigned long); | |
137 | ||
138 | #else | |
139 | ||
140 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
141 | do { \ | |
142 | memcpy(dst, src, len); \ | |
143 | __flush_dcache_range((unsigned long) dst, len); \ | |
144 | __invalidate_icache_range((unsigned long) dst, len); \ | |
145 | } while (0) | |
9a8fd558 CZ |
146 | |
147 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
148 | memcpy(dst, src, len) | |
149 | ||
6656920b | 150 | #endif |
9a8fd558 | 151 | |
6656920b | 152 | #endif /* __KERNEL__ */ |
9a8fd558 | 153 | #endif /* _XTENSA_CACHEFLUSH_H */ |