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b21f4b65 AY |
1 | /* |
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #ifndef __DW_HDMI__ | |
11 | #define __DW_HDMI__ | |
12 | ||
13 | #include <drm/drmP.h> | |
14 | ||
15 | enum { | |
16 | DW_HDMI_RES_8, | |
17 | DW_HDMI_RES_10, | |
18 | DW_HDMI_RES_12, | |
19 | DW_HDMI_RES_MAX, | |
20 | }; | |
21 | ||
22 | enum dw_hdmi_devtype { | |
23 | IMX6Q_HDMI, | |
24 | IMX6DL_HDMI, | |
25 | }; | |
26 | ||
27 | struct dw_hdmi_mpll_config { | |
28 | unsigned long mpixelclock; | |
29 | struct { | |
30 | u16 cpce; | |
31 | u16 gmp; | |
32 | } res[DW_HDMI_RES_MAX]; | |
33 | }; | |
34 | ||
35 | struct dw_hdmi_curr_ctrl { | |
36 | unsigned long mpixelclock; | |
37 | u16 curr[DW_HDMI_RES_MAX]; | |
38 | }; | |
39 | ||
40 | struct dw_hdmi_sym_term { | |
41 | unsigned long mpixelclock; | |
42 | u16 sym_ctr; /*clock symbol and transmitter control*/ | |
43 | u16 term; /*transmission termination value*/ | |
44 | }; | |
45 | ||
46 | struct dw_hdmi_plat_data { | |
47 | enum dw_hdmi_devtype dev_type; | |
48 | const struct dw_hdmi_mpll_config *mpll_cfg; | |
49 | const struct dw_hdmi_curr_ctrl *cur_ctr; | |
50 | const struct dw_hdmi_sym_term *sym_term; | |
51 | enum drm_mode_status (*mode_valid)(struct drm_connector *connector, | |
52 | struct drm_display_mode *mode); | |
53 | }; | |
54 | ||
55 | void dw_hdmi_unbind(struct device *dev, struct device *master, void *data); | |
56 | int dw_hdmi_bind(struct device *dev, struct device *master, | |
57 | void *data, struct drm_encoder *encoder, | |
58 | struct resource *iores, int irq, | |
59 | const struct dw_hdmi_plat_data *plat_data); | |
60 | #endif /* __IMX_HDMI_H__ */ |