projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0ade6386 DV |
1 | /* Common header for intel-gtt.ko and i915.ko */ |
| 2 | ||
| 3 | #ifndef _DRM_INTEL_GTT_H | |
| 4 | #define _DRM_INTEL_GTT_H | |
| c64f7ba5 CW |
5 | |
| 6 | const struct intel_gtt { | |
| 7 | /* Size of memory reserved for graphics by the BIOS */ | |
| 8 | unsigned int stolen_size; | |
| 0ade6386 DV |
9 | /* Total number of gtt entries. */ |
| 10 | unsigned int gtt_total_entries; | |
| 11 | /* Part of the gtt that is mappable by the cpu, for those chips where | |
| 12 | * this is not the full gtt. */ | |
| 13 | unsigned int gtt_mappable_entries; | |
| 4080775b DV |
14 | /* Whether i915 needs to use the dmar apis or not. */ |
| 15 | unsigned int needs_dmar : 1; | |
| 5c042287 BW |
16 | /* Whether we idle the gpu before mapping/unmapping */ |
| 17 | unsigned int do_idle_maps : 1; | |
| 50a4c4a9 DV |
18 | /* Share the scratch page dma with ppgtts. */ |
| 19 | dma_addr_t scratch_page_dma; | |
| 428ccb21 DV |
20 | /* for ppgtt PDE access */ |
| 21 | u32 __iomem *gtt; | |
| dd2757f8 DV |
22 | /* needed for ioremap in drm/i915 */ |
| 23 | phys_addr_t gma_bus_addr; | |
| c64f7ba5 | 24 | } *intel_gtt_get(void); |
| 19966754 | 25 | |
| 14be93dd DV |
26 | int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, |
| 27 | struct agp_bridge_data *bridge); | |
| 28 | void intel_gmch_remove(void); | |
| 29 | ||
| 8ecd1a66 DV |
30 | bool intel_enable_gtt(void); |
| 31 | ||
| 40ce6575 | 32 | void intel_gtt_chipset_flush(void); |
| 9da3da66 | 33 | void intel_gtt_insert_sg_entries(struct sg_table *st, |
| 4080775b DV |
34 | unsigned int pg_start, |
| 35 | unsigned int flags); | |
| 9da3da66 | 36 | void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); |
| 23ed992a DV |
37 | |
| 38 | /* Special gtt memory types */ | |
| 39 | #define AGP_DCACHE_MEMORY 1 | |
| 40 | #define AGP_PHYS_MEMORY 2 | |
| 41 | ||
| 42 | /* New caching attributes for gen6/sandybridge */ | |
| 43 | #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) | |
| 44 | #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) | |
| 45 | ||
| 46 | /* flag for GFDT type */ | |
| 47 | #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) | |
| 48 | ||
| 650dc07e DV |
49 | #ifdef CONFIG_INTEL_IOMMU |
| 50 | extern int intel_iommu_gfx_mapped; | |
| 51 | #endif | |
| 52 | ||
| 0ade6386 | 53 | #endif |