[deliverable/linux.git] / include / dt-bindings / clock / marvell,pxa1928.h

#ifndef __DTS_MARVELL_PXA1928_CLOCK_H
#define __DTS_MARVELL_PXA1928_CLOCK_H

/*
 * Clock ID values here correspond to the control register offset/4.
 */

/* apb peripherals */
#define PXA1928_CLK_RTC			0x00
#define PXA1928_CLK_TWSI0		0x01
#define PXA1928_CLK_TWSI1		0x02
#define PXA1928_CLK_TWSI2		0x03
#define PXA1928_CLK_TWSI3		0x04
#define PXA1928_CLK_OWIRE		0x05
#define PXA1928_CLK_KPC			0x06
#define PXA1928_CLK_TB_ROTARY		0x07
#define PXA1928_CLK_SW_JTAG		0x08
#define PXA1928_CLK_TIMER1		0x09
#define PXA1928_CLK_UART0		0x0b
#define PXA1928_CLK_UART1		0x0c
#define PXA1928_CLK_UART2		0x0d
#define PXA1928_CLK_GPIO		0x0e
#define PXA1928_CLK_PWM0		0x0f
#define PXA1928_CLK_PWM1		0x10
#define PXA1928_CLK_PWM2		0x11
#define PXA1928_CLK_PWM3		0x12
#define PXA1928_CLK_SSP0		0x13
#define PXA1928_CLK_SSP1		0x14
#define PXA1928_CLK_SSP2		0x15

#define PXA1928_CLK_TWSI4		0x1f
#define PXA1928_CLK_TWSI5		0x20
#define PXA1928_CLK_UART3		0x22
#define PXA1928_CLK_THSENS_GLOB		0x24
#define PXA1928_CLK_THSENS_CPU		0x26
#define PXA1928_CLK_THSENS_VPU		0x27
#define PXA1928_CLK_THSENS_GC		0x28
#define PXA1928_APBC_NR_CLKS		0x30


/* axi peripherals */
#define PXA1928_CLK_SDH0		0x15
#define PXA1928_CLK_SDH1		0x16
#define PXA1928_CLK_USB			0x17
#define PXA1928_CLK_NAND		0x18
#define PXA1928_CLK_DMA			0x19

#define PXA1928_CLK_SDH2		0x3a
#define PXA1928_CLK_SDH3		0x3b
#define PXA1928_CLK_HSIC		0x3e
#define PXA1928_CLK_SDH4		0x57
#define PXA1928_CLK_GC3D		0x5d
#define PXA1928_CLK_GC2D		0x5f

#define PXA1928_APMU_NR_CLKS		0x60

#endif
Commit	Line	Data
8a3d9c16 RH	1	#ifndef __DTS_MARVELL_PXA1928_CLOCK_H
	2	#define __DTS_MARVELL_PXA1928_CLOCK_H
	3
	4	/*
	5	* Clock ID values here correspond to the control register offset/4.
	6	*/
	7
	8	/* apb peripherals */
	9	#define PXA1928_CLK_RTC 0x00
	10	#define PXA1928_CLK_TWSI0 0x01
	11	#define PXA1928_CLK_TWSI1 0x02
	12	#define PXA1928_CLK_TWSI2 0x03
	13	#define PXA1928_CLK_TWSI3 0x04
	14	#define PXA1928_CLK_OWIRE 0x05
	15	#define PXA1928_CLK_KPC 0x06
	16	#define PXA1928_CLK_TB_ROTARY 0x07
	17	#define PXA1928_CLK_SW_JTAG 0x08
	18	#define PXA1928_CLK_TIMER1 0x09
	19	#define PXA1928_CLK_UART0 0x0b
	20	#define PXA1928_CLK_UART1 0x0c
	21	#define PXA1928_CLK_UART2 0x0d
	22	#define PXA1928_CLK_GPIO 0x0e
	23	#define PXA1928_CLK_PWM0 0x0f
	24	#define PXA1928_CLK_PWM1 0x10
	25	#define PXA1928_CLK_PWM2 0x11
	26	#define PXA1928_CLK_PWM3 0x12
	27	#define PXA1928_CLK_SSP0 0x13
	28	#define PXA1928_CLK_SSP1 0x14
	29	#define PXA1928_CLK_SSP2 0x15
	30
	31	#define PXA1928_CLK_TWSI4 0x1f
	32	#define PXA1928_CLK_TWSI5 0x20
	33	#define PXA1928_CLK_UART3 0x22
	34	#define PXA1928_CLK_THSENS_GLOB 0x24
	35	#define PXA1928_CLK_THSENS_CPU 0x26
	36	#define PXA1928_CLK_THSENS_VPU 0x27
	37	#define PXA1928_CLK_THSENS_GC 0x28
	38	#define PXA1928_APBC_NR_CLKS 0x30
	39
	40
	41	/* axi peripherals */
	42	#define PXA1928_CLK_SDH0 0x15
	43	#define PXA1928_CLK_SDH1 0x16
	44	#define PXA1928_CLK_USB 0x17
	45	#define PXA1928_CLK_NAND 0x18
	46	#define PXA1928_CLK_DMA 0x19
	47
	48	#define PXA1928_CLK_SDH2 0x3a
	49	#define PXA1928_CLK_SDH3 0x3b
	50	#define PXA1928_CLK_HSIC 0x3e
	51	#define PXA1928_CLK_SDH4 0x57
	52	#define PXA1928_CLK_GC3D 0x5d
	53	#define PXA1928_CLK_GC2D 0x5f
	54
	55	#define PXA1928_APMU_NR_CLKS 0x60
	56
	57	#endif