projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0dce5454 UH |
1 | /* |
| 2 | * Copyright (C) 2014 Renesas Electronics Corporation | |
| 3 | * Copyright 2013 Ideas On Board SPRL | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License as published by | |
| 7 | * the Free Software Foundation; either version 2 of the License, or | |
| 8 | * (at your option) any later version. | |
| 9 | */ | |
| 10 | ||
| 11 | #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ | |
| 12 | #define __DT_BINDINGS_CLOCK_R8A7794_H__ | |
| 13 | ||
| 14 | /* CPG */ | |
| 15 | #define R8A7794_CLK_MAIN 0 | |
| 16 | #define R8A7794_CLK_PLL0 1 | |
| 17 | #define R8A7794_CLK_PLL1 2 | |
| 18 | #define R8A7794_CLK_PLL3 3 | |
| 19 | #define R8A7794_CLK_LB 4 | |
| 20 | #define R8A7794_CLK_QSPI 5 | |
| 21 | #define R8A7794_CLK_SDH 6 | |
| 22 | #define R8A7794_CLK_SD0 7 | |
| 23 | #define R8A7794_CLK_Z 8 | |
| e980f941 | 24 | #define R8A7794_CLK_RCAN 9 |
| 0dce5454 UH |
25 | |
| 26 | /* MSTP0 */ | |
| 27 | #define R8A7794_CLK_MSIOF0 0 | |
| 28 | ||
| 29 | /* MSTP1 */ | |
| dc3cf93d YH |
30 | #define R8A7794_CLK_VCP0 1 |
| 31 | #define R8A7794_CLK_VPC0 3 | |
| 0dce5454 | 32 | #define R8A7794_CLK_TMU1 11 |
| 3e58a542 | 33 | #define R8A7794_CLK_3DG 12 |
| dc3cf93d YH |
34 | #define R8A7794_CLK_2DDMAC 15 |
| 35 | #define R8A7794_CLK_FDP1_0 19 | |
| 0dce5454 UH |
36 | #define R8A7794_CLK_TMU3 21 |
| 37 | #define R8A7794_CLK_TMU2 22 | |
| 38 | #define R8A7794_CLK_CMT0 24 | |
| 39 | #define R8A7794_CLK_TMU0 25 | |
| dc3cf93d YH |
40 | #define R8A7794_CLK_VSP1_DU0 28 |
| 41 | #define R8A7794_CLK_VSP1_S 31 | |
| 0dce5454 UH |
42 | |
| 43 | /* MSTP2 */ | |
| 44 | #define R8A7794_CLK_SCIFA2 2 | |
| 45 | #define R8A7794_CLK_SCIFA1 3 | |
| 46 | #define R8A7794_CLK_SCIFA0 4 | |
| 47 | #define R8A7794_CLK_MSIOF2 5 | |
| 48 | #define R8A7794_CLK_SCIFB0 6 | |
| 49 | #define R8A7794_CLK_SCIFB1 7 | |
| 50 | #define R8A7794_CLK_MSIOF1 8 | |
| 51 | #define R8A7794_CLK_SCIFB2 16 | |
| be16cd38 HY |
52 | #define R8A7794_CLK_SYS_DMAC1 18 |
| 53 | #define R8A7794_CLK_SYS_DMAC0 19 | |
| 0dce5454 UH |
54 | |
| 55 | /* MSTP3 */ | |
| 8e181633 SU |
56 | #define R8A7794_CLK_SDHI2 11 |
| 57 | #define R8A7794_CLK_SDHI1 12 | |
| 58 | #define R8A7794_CLK_SDHI0 14 | |
| deac150c | 59 | #define R8A7794_CLK_MMCIF0 15 |
| a856b195 SH |
60 | #define R8A7794_CLK_IIC0 18 |
| 61 | #define R8A7794_CLK_IIC1 23 | |
| 0dce5454 | 62 | #define R8A7794_CLK_CMT1 29 |
| 22a9b44f KM |
63 | #define R8A7794_CLK_USBDMAC0 30 |
| 64 | #define R8A7794_CLK_USBDMAC1 31 | |
| 0dce5454 | 65 | |
| 1c5ca5db GU |
66 | /* MSTP4 */ |
| 67 | #define R8A7794_CLK_IRQC 7 | |
| 68 | ||
| 0dce5454 | 69 | /* MSTP5 */ |
| 0dce5454 UH |
70 | #define R8A7794_CLK_PWM 23 |
| 71 | ||
| 72 | /* MSTP7 */ | |
| c7bab9f9 SU |
73 | #define R8A7794_CLK_EHCI 3 |
| 74 | #define R8A7794_CLK_HSUSB 4 | |
| 0dce5454 UH |
75 | #define R8A7794_CLK_HSCIF2 13 |
| 76 | #define R8A7794_CLK_SCIF5 14 | |
| 77 | #define R8A7794_CLK_SCIF4 15 | |
| 78 | #define R8A7794_CLK_HSCIF1 16 | |
| 79 | #define R8A7794_CLK_HSCIF0 17 | |
| 80 | #define R8A7794_CLK_SCIF3 18 | |
| 81 | #define R8A7794_CLK_SCIF2 19 | |
| 82 | #define R8A7794_CLK_SCIF1 20 | |
| 83 | #define R8A7794_CLK_SCIF0 21 | |
| 9859cd3b | 84 | #define R8A7794_CLK_DU0 24 |
| 0dce5454 UH |
85 | |
| 86 | /* MSTP8 */ | |
| 148ebf47 KM |
87 | #define R8A7794_CLK_VIN1 10 |
| 88 | #define R8A7794_CLK_VIN0 11 | |
| 255a4042 | 89 | #define R8A7794_CLK_ETHERAVB 12 |
| 0dce5454 UH |
90 | #define R8A7794_CLK_ETHER 13 |
| 91 | ||
| 92 | /* MSTP9 */ | |
| 93 | #define R8A7794_CLK_GPIO6 5 | |
| 94 | #define R8A7794_CLK_GPIO5 7 | |
| 95 | #define R8A7794_CLK_GPIO4 8 | |
| 96 | #define R8A7794_CLK_GPIO3 9 | |
| 97 | #define R8A7794_CLK_GPIO2 10 | |
| 98 | #define R8A7794_CLK_GPIO1 11 | |
| 99 | #define R8A7794_CLK_GPIO0 12 | |
| e980f941 SH |
100 | #define R8A7794_CLK_RCAN1 15 |
| 101 | #define R8A7794_CLK_RCAN0 16 | |
| 3281480b | 102 | #define R8A7794_CLK_QSPI_MOD 17 |
| c5d82c99 KM |
103 | #define R8A7794_CLK_I2C5 25 |
| 104 | #define R8A7794_CLK_I2C4 27 | |
| 105 | #define R8A7794_CLK_I2C3 28 | |
| 106 | #define R8A7794_CLK_I2C2 29 | |
| 107 | #define R8A7794_CLK_I2C1 30 | |
| 108 | #define R8A7794_CLK_I2C0 31 | |
| 0dce5454 UH |
109 | |
| 110 | /* MSTP11 */ | |
| 111 | #define R8A7794_CLK_SCIFA3 6 | |
| 112 | #define R8A7794_CLK_SCIFA4 7 | |
| 113 | #define R8A7794_CLK_SCIFA5 8 | |
| 114 | ||
| 115 | #endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ |