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1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #ifndef __DT_BINDINGS_CLOCK_VF610_H | |
11 | #define __DT_BINDINGS_CLOCK_VF610_H | |
12 | ||
13 | #define VF610_CLK_DUMMY 0 | |
14 | #define VF610_CLK_SIRC_128K 1 | |
15 | #define VF610_CLK_SIRC_32K 2 | |
16 | #define VF610_CLK_FIRC 3 | |
17 | #define VF610_CLK_SXOSC 4 | |
18 | #define VF610_CLK_FXOSC 5 | |
19 | #define VF610_CLK_FXOSC_HALF 6 | |
20 | #define VF610_CLK_SLOW_CLK_SEL 7 | |
21 | #define VF610_CLK_FASK_CLK_SEL 8 | |
22 | #define VF610_CLK_AUDIO_EXT 9 | |
23 | #define VF610_CLK_ENET_EXT 10 | |
24 | #define VF610_CLK_PLL1_MAIN 11 | |
25 | #define VF610_CLK_PLL1_PFD1 12 | |
26 | #define VF610_CLK_PLL1_PFD2 13 | |
27 | #define VF610_CLK_PLL1_PFD3 14 | |
28 | #define VF610_CLK_PLL1_PFD4 15 | |
29 | #define VF610_CLK_PLL2_MAIN 16 | |
30 | #define VF610_CLK_PLL2_PFD1 17 | |
31 | #define VF610_CLK_PLL2_PFD2 18 | |
32 | #define VF610_CLK_PLL2_PFD3 19 | |
33 | #define VF610_CLK_PLL2_PFD4 20 | |
34 | #define VF610_CLK_PLL3_MAIN 21 | |
35 | #define VF610_CLK_PLL3_PFD1 22 | |
36 | #define VF610_CLK_PLL3_PFD2 23 | |
37 | #define VF610_CLK_PLL3_PFD3 24 | |
38 | #define VF610_CLK_PLL3_PFD4 25 | |
39 | #define VF610_CLK_PLL4_MAIN 26 | |
40 | #define VF610_CLK_PLL5_MAIN 27 | |
41 | #define VF610_CLK_PLL6_MAIN 28 | |
42 | #define VF610_CLK_PLL3_MAIN_DIV 29 | |
43 | #define VF610_CLK_PLL4_MAIN_DIV 30 | |
44 | #define VF610_CLK_PLL6_MAIN_DIV 31 | |
45 | #define VF610_CLK_PLL1_PFD_SEL 32 | |
46 | #define VF610_CLK_PLL2_PFD_SEL 33 | |
47 | #define VF610_CLK_SYS_SEL 34 | |
48 | #define VF610_CLK_DDR_SEL 35 | |
49 | #define VF610_CLK_SYS_BUS 36 | |
50 | #define VF610_CLK_PLATFORM_BUS 37 | |
51 | #define VF610_CLK_IPG_BUS 38 | |
52 | #define VF610_CLK_UART0 39 | |
53 | #define VF610_CLK_UART1 40 | |
54 | #define VF610_CLK_UART2 41 | |
55 | #define VF610_CLK_UART3 42 | |
56 | #define VF610_CLK_UART4 43 | |
57 | #define VF610_CLK_UART5 44 | |
58 | #define VF610_CLK_PIT 45 | |
59 | #define VF610_CLK_I2C0 46 | |
60 | #define VF610_CLK_I2C1 47 | |
61 | #define VF610_CLK_I2C2 48 | |
62 | #define VF610_CLK_I2C3 49 | |
63 | #define VF610_CLK_FTM0_EXT_SEL 50 | |
64 | #define VF610_CLK_FTM0_FIX_SEL 51 | |
65 | #define VF610_CLK_FTM0_EXT_FIX_EN 52 | |
66 | #define VF610_CLK_FTM1_EXT_SEL 53 | |
67 | #define VF610_CLK_FTM1_FIX_SEL 54 | |
68 | #define VF610_CLK_FTM1_EXT_FIX_EN 55 | |
69 | #define VF610_CLK_FTM2_EXT_SEL 56 | |
70 | #define VF610_CLK_FTM2_FIX_SEL 57 | |
71 | #define VF610_CLK_FTM2_EXT_FIX_EN 58 | |
72 | #define VF610_CLK_FTM3_EXT_SEL 59 | |
73 | #define VF610_CLK_FTM3_FIX_SEL 60 | |
74 | #define VF610_CLK_FTM3_EXT_FIX_EN 61 | |
75 | #define VF610_CLK_FTM0 62 | |
76 | #define VF610_CLK_FTM1 63 | |
77 | #define VF610_CLK_FTM2 64 | |
78 | #define VF610_CLK_FTM3 65 | |
79 | #define VF610_CLK_ENET_50M 66 | |
80 | #define VF610_CLK_ENET_25M 67 | |
81 | #define VF610_CLK_ENET_SEL 68 | |
82 | #define VF610_CLK_ENET 69 | |
83 | #define VF610_CLK_ENET_TS_SEL 70 | |
84 | #define VF610_CLK_ENET_TS 71 | |
85 | #define VF610_CLK_DSPI0 72 | |
86 | #define VF610_CLK_DSPI1 73 | |
87 | #define VF610_CLK_DSPI2 74 | |
88 | #define VF610_CLK_DSPI3 75 | |
89 | #define VF610_CLK_WDT 76 | |
90 | #define VF610_CLK_ESDHC0_SEL 77 | |
91 | #define VF610_CLK_ESDHC0_EN 78 | |
92 | #define VF610_CLK_ESDHC0_DIV 79 | |
93 | #define VF610_CLK_ESDHC0 80 | |
94 | #define VF610_CLK_ESDHC1_SEL 81 | |
95 | #define VF610_CLK_ESDHC1_EN 82 | |
96 | #define VF610_CLK_ESDHC1_DIV 83 | |
97 | #define VF610_CLK_ESDHC1 84 | |
98 | #define VF610_CLK_DCU0_SEL 85 | |
99 | #define VF610_CLK_DCU0_EN 86 | |
100 | #define VF610_CLK_DCU0_DIV 87 | |
101 | #define VF610_CLK_DCU0 88 | |
102 | #define VF610_CLK_DCU1_SEL 89 | |
103 | #define VF610_CLK_DCU1_EN 90 | |
104 | #define VF610_CLK_DCU1_DIV 91 | |
105 | #define VF610_CLK_DCU1 92 | |
106 | #define VF610_CLK_ESAI_SEL 93 | |
107 | #define VF610_CLK_ESAI_EN 94 | |
108 | #define VF610_CLK_ESAI_DIV 95 | |
109 | #define VF610_CLK_ESAI 96 | |
110 | #define VF610_CLK_SAI0_SEL 97 | |
111 | #define VF610_CLK_SAI0_EN 98 | |
112 | #define VF610_CLK_SAI0_DIV 99 | |
113 | #define VF610_CLK_SAI0 100 | |
114 | #define VF610_CLK_SAI1_SEL 101 | |
115 | #define VF610_CLK_SAI1_EN 102 | |
116 | #define VF610_CLK_SAI1_DIV 103 | |
117 | #define VF610_CLK_SAI1 104 | |
118 | #define VF610_CLK_SAI2_SEL 105 | |
119 | #define VF610_CLK_SAI2_EN 106 | |
120 | #define VF610_CLK_SAI2_DIV 107 | |
121 | #define VF610_CLK_SAI2 108 | |
122 | #define VF610_CLK_SAI3_SEL 109 | |
123 | #define VF610_CLK_SAI3_EN 110 | |
124 | #define VF610_CLK_SAI3_DIV 111 | |
125 | #define VF610_CLK_SAI3 112 | |
126 | #define VF610_CLK_USBC0 113 | |
127 | #define VF610_CLK_USBC1 114 | |
128 | #define VF610_CLK_QSPI0_SEL 115 | |
129 | #define VF610_CLK_QSPI0_EN 116 | |
130 | #define VF610_CLK_QSPI0_X4_DIV 117 | |
131 | #define VF610_CLK_QSPI0_X2_DIV 118 | |
132 | #define VF610_CLK_QSPI0_X1_DIV 119 | |
133 | #define VF610_CLK_QSPI1_SEL 120 | |
134 | #define VF610_CLK_QSPI1_EN 121 | |
135 | #define VF610_CLK_QSPI1_X4_DIV 122 | |
136 | #define VF610_CLK_QSPI1_X2_DIV 123 | |
137 | #define VF610_CLK_QSPI1_X1_DIV 124 | |
138 | #define VF610_CLK_QSPI0 125 | |
139 | #define VF610_CLK_QSPI1 126 | |
140 | #define VF610_CLK_NFC_SEL 127 | |
141 | #define VF610_CLK_NFC_EN 128 | |
142 | #define VF610_CLK_NFC_PRE_DIV 129 | |
143 | #define VF610_CLK_NFC_FRAC_DIV 130 | |
144 | #define VF610_CLK_NFC_INV 131 | |
145 | #define VF610_CLK_NFC 132 | |
146 | #define VF610_CLK_VADC_SEL 133 | |
147 | #define VF610_CLK_VADC_EN 134 | |
148 | #define VF610_CLK_VADC_DIV 135 | |
149 | #define VF610_CLK_VADC_DIV_HALF 136 | |
150 | #define VF610_CLK_VADC 137 | |
151 | #define VF610_CLK_ADC0 138 | |
152 | #define VF610_CLK_ADC1 139 | |
153 | #define VF610_CLK_DAC0 140 | |
154 | #define VF610_CLK_DAC1 141 | |
155 | #define VF610_CLK_FLEXCAN0 142 | |
156 | #define VF610_CLK_FLEXCAN1 143 | |
157 | #define VF610_CLK_ASRC 144 | |
158 | #define VF610_CLK_GPU_SEL 145 | |
159 | #define VF610_CLK_GPU_EN 146 | |
160 | #define VF610_CLK_GPU2D 147 | |
4f71612e SG |
161 | #define VF610_CLK_ENET0 148 |
162 | #define VF610_CLK_ENET1 149 | |
163 | #define VF610_CLK_END 150 | |
1f2c5fd5 JL |
164 | |
165 | #endif /* __DT_BINDINGS_CLOCK_VF610_H */ |