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800eeca4 | 1 | /* IA-64 ELF support for BFD. |
40eb4f34 | 2 | Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc. |
800eeca4 JW |
3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
4 | ||
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | ||
22 | #ifndef _ELF_IA64_H | |
23 | #define _ELF_IA64_H | |
24 | ||
25 | /* Bits in the e_flags field of the Elf64_Ehdr: */ | |
26 | ||
27 | #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ | |
28 | #define EF_IA_64_ABI64 (1 << 4) /* 64-bit ABI */ | |
29 | #define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ | |
30 | ||
31 | /* ??? These four definitions are not part of the SVR4 ABI. | |
32 | They were present in David's initial code drop, so it is probable | |
33 | that they are used by HP/UX. */ | |
34 | #define EF_IA_64_TRAPNIL (1 << 0) /* trap NIL pointer dereferences */ | |
35 | #define EF_IA_64_EXT (1 << 2) /* program uses arch. extensions */ | |
36 | #define EF_IA_64_BE (1 << 3) /* PSR BE bit set (big-endian) */ | |
37 | #define EFA_IA_64_EAS2_3 0x23000000 /* ia64 EAS 2.3 */ | |
38 | ||
39 | #define ELF_STRING_ia64_archext ".IA_64.archext" | |
40 | #define ELF_STRING_ia64_pltoff ".IA_64.pltoff" | |
41 | #define ELF_STRING_ia64_unwind ".IA_64.unwind" | |
42 | #define ELF_STRING_ia64_unwind_info ".IA_64.unwind_info" | |
43 | ||
44 | /* Bits in the sh_flags field of Elf64_Shdr: */ | |
45 | ||
46 | #define SHF_IA_64_SHORT 0x10000000 /* section near gp */ | |
47 | #define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ | |
48 | ||
49 | /* Possible values for sh_type in Elf64_Shdr: */ | |
50 | ||
51 | #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ | |
52 | #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ | |
53 | ||
54 | /* Bits in the p_flags field of Elf64_Phdr: */ | |
55 | ||
56 | #define PF_IA_64_NORECOV 0x80000000 | |
57 | ||
58 | /* Possible values for p_type in Elf64_Phdr: */ | |
59 | ||
60 | #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ | |
61 | #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ | |
62 | ||
63 | /* Possible values for d_tag in Elf64_Dyn: */ | |
64 | ||
65 | #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) | |
66 | ||
67 | /* ia64-specific relocation types: */ | |
68 | ||
69 | /* Relocs apply to specific instructions within a bundle. The least | |
70 | significant 2 bits of the address indicate which instruction in the | |
71 | bundle the reloc refers to (0=first slot, 1=second slow, 2=third | |
72 | slot, 3=undefined) and the remaining bits give the address of the | |
73 | bundle (16 byte aligned). | |
74 | ||
75 | The top 5 bits of the reloc code specifies the expression type, the | |
76 | low 3 bits the format of the data word being relocated. | |
77 | ||
78 | ??? Relocations below marked ## are not part of the SVR4 processor | |
79 | suppliment. They were present in David's initial code drop, so it | |
80 | is possible that they are used by HP/UX. */ | |
81 | ||
82 | #include "elf/reloc-macros.h" | |
83 | ||
84 | START_RELOC_NUMBERS (elf_ia64_reloc_type) | |
85 | RELOC_NUMBER (R_IA64_NONE, 0x00) /* none */ | |
86 | ||
87 | RELOC_NUMBER (R_IA64_IMM14, 0x21) /* symbol + addend, add imm14 */ | |
88 | RELOC_NUMBER (R_IA64_IMM22, 0x22) /* symbol + addend, add imm22 */ | |
89 | RELOC_NUMBER (R_IA64_IMM64, 0x23) /* symbol + addend, mov imm64 */ | |
90 | RELOC_NUMBER (R_IA64_DIR32MSB, 0x24) /* symbol + addend, data4 MSB */ | |
91 | RELOC_NUMBER (R_IA64_DIR32LSB, 0x25) /* symbol + addend, data4 LSB */ | |
92 | RELOC_NUMBER (R_IA64_DIR64MSB, 0x26) /* symbol + addend, data8 MSB */ | |
93 | RELOC_NUMBER (R_IA64_DIR64LSB, 0x27) /* symbol + addend, data8 LSB */ | |
94 | ||
95 | RELOC_NUMBER (R_IA64_GPREL22, 0x2a) /* @gprel(sym + add), add imm22 */ | |
96 | RELOC_NUMBER (R_IA64_GPREL64I, 0x2b) /* @gprel(sym + add), mov imm64 */ | |
97 | RELOC_NUMBER (R_IA64_GPREL32MSB, 0x2c) /* @gprel(sym + add), data4 MSB ## */ | |
98 | RELOC_NUMBER (R_IA64_GPREL32LSB, 0x2d) /* @gprel(sym + add), data4 LSB ## */ | |
99 | RELOC_NUMBER (R_IA64_GPREL64MSB, 0x2e) /* @gprel(sym + add), data8 MSB */ | |
100 | RELOC_NUMBER (R_IA64_GPREL64LSB, 0x2f) /* @gprel(sym + add), data8 LSB */ | |
101 | ||
102 | RELOC_NUMBER (R_IA64_LTOFF22, 0x32) /* @ltoff(sym + add), add imm22 */ | |
103 | RELOC_NUMBER (R_IA64_LTOFF64I, 0x33) /* @ltoff(sym + add), mov imm64 */ | |
104 | ||
105 | RELOC_NUMBER (R_IA64_PLTOFF22, 0x3a) /* @pltoff(sym + add), add imm22 */ | |
106 | RELOC_NUMBER (R_IA64_PLTOFF64I, 0x3b) /* @pltoff(sym + add), mov imm64 */ | |
107 | RELOC_NUMBER (R_IA64_PLTOFF64MSB, 0x3e) /* @pltoff(sym + add), data8 MSB */ | |
108 | RELOC_NUMBER (R_IA64_PLTOFF64LSB, 0x3f) /* @pltoff(sym + add), data8 LSB */ | |
109 | ||
110 | RELOC_NUMBER (R_IA64_FPTR64I, 0x43) /* @fptr(sym + add), mov imm64 */ | |
111 | RELOC_NUMBER (R_IA64_FPTR32MSB, 0x44) /* @fptr(sym + add), data4 MSB */ | |
112 | RELOC_NUMBER (R_IA64_FPTR32LSB, 0x45) /* @fptr(sym + add), data4 LSB */ | |
113 | RELOC_NUMBER (R_IA64_FPTR64MSB, 0x46) /* @fptr(sym + add), data8 MSB */ | |
114 | RELOC_NUMBER (R_IA64_FPTR64LSB, 0x47) /* @fptr(sym + add), data8 LSB */ | |
115 | ||
40eb4f34 | 116 | RELOC_NUMBER (R_IA64_PCREL60B, 0x48) /* @pcrel(sym + add), brl */ |
800eeca4 JW |
117 | RELOC_NUMBER (R_IA64_PCREL21B, 0x49) /* @pcrel(sym + add), ptb, call */ |
118 | RELOC_NUMBER (R_IA64_PCREL21M, 0x4a) /* @pcrel(sym + add), chk.s */ | |
119 | RELOC_NUMBER (R_IA64_PCREL21F, 0x4b) /* @pcrel(sym + add), fchkf */ | |
120 | RELOC_NUMBER (R_IA64_PCREL32MSB, 0x4c) /* @pcrel(sym + add), data4 MSB */ | |
121 | RELOC_NUMBER (R_IA64_PCREL32LSB, 0x4d) /* @pcrel(sym + add), data4 LSB */ | |
122 | RELOC_NUMBER (R_IA64_PCREL64MSB, 0x4e) /* @pcrel(sym + add), data8 MSB */ | |
123 | RELOC_NUMBER (R_IA64_PCREL64LSB, 0x4f) /* @pcrel(sym + add), data8 LSB */ | |
124 | ||
125 | RELOC_NUMBER (R_IA64_LTOFF_FPTR22, 0x52) /* @ltoff(@fptr(s+a)), imm22 */ | |
126 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64I, 0x53) /* @ltoff(@fptr(s+a)), imm64 */ | |
127 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64MSB, 0x56) /* @ltoff(@fptr(s+a)), 8 MSB ##*/ | |
128 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64LSB, 0x57) /* @ltoff(@fptr(s+a)), 8 LSB ##*/ | |
129 | ||
130 | RELOC_NUMBER (R_IA64_SEGBASE, 0x58) /* set segment base for @segrel ## */ | |
131 | RELOC_NUMBER (R_IA64_SEGREL32MSB, 0x5c) /* @segrel(sym + add), data4 MSB */ | |
132 | RELOC_NUMBER (R_IA64_SEGREL32LSB, 0x5d) /* @segrel(sym + add), data4 LSB */ | |
133 | RELOC_NUMBER (R_IA64_SEGREL64MSB, 0x5e) /* @segrel(sym + add), data8 MSB */ | |
134 | RELOC_NUMBER (R_IA64_SEGREL64LSB, 0x5f) /* @segrel(sym + add), data8 LSB */ | |
135 | ||
136 | RELOC_NUMBER (R_IA64_SECREL32MSB, 0x64) /* @secrel(sym + add), data4 MSB */ | |
137 | RELOC_NUMBER (R_IA64_SECREL32LSB, 0x65) /* @secrel(sym + add), data4 LSB */ | |
138 | RELOC_NUMBER (R_IA64_SECREL64MSB, 0x66) /* @secrel(sym + add), data8 MSB */ | |
139 | RELOC_NUMBER (R_IA64_SECREL64LSB, 0x67) /* @secrel(sym + add), data8 LSB */ | |
140 | ||
141 | RELOC_NUMBER (R_IA64_REL32MSB, 0x6c) /* data 4 + REL */ | |
142 | RELOC_NUMBER (R_IA64_REL32LSB, 0x6d) /* data 4 + REL */ | |
143 | RELOC_NUMBER (R_IA64_REL64MSB, 0x6e) /* data 8 + REL */ | |
144 | RELOC_NUMBER (R_IA64_REL64LSB, 0x6f) /* data 8 + REL */ | |
145 | ||
146 | RELOC_NUMBER (R_IA64_LTV32MSB, 0x70) /* symbol + addend, data4 MSB */ | |
147 | RELOC_NUMBER (R_IA64_LTV32LSB, 0x71) /* symbol + addend, data4 LSB */ | |
148 | RELOC_NUMBER (R_IA64_LTV64MSB, 0x72) /* symbol + addend, data8 MSB */ | |
149 | RELOC_NUMBER (R_IA64_LTV64LSB, 0x73) /* symbol + addend, data8 LSB */ | |
150 | ||
40eb4f34 RH |
151 | RELOC_NUMBER (R_IA64_PCREL21BI, 0x79) /* @pcrel(sym + add), ptb, call */ |
152 | RELOC_NUMBER (R_IA64_PCREL22, 0x7a) /* @pcrel(sym + add), imm22 */ | |
153 | RELOC_NUMBER (R_IA64_PCREL64I, 0x7b) /* @pcrel(sym + add), imm64 */ | |
154 | ||
800eeca4 JW |
155 | RELOC_NUMBER (R_IA64_IPLTMSB, 0x80) /* dynamic reloc, imported PLT, MSB */ |
156 | RELOC_NUMBER (R_IA64_IPLTLSB, 0x81) /* dynamic reloc, imported PLT, LSB */ | |
157 | RELOC_NUMBER (R_IA64_EPLTMSB, 0x82) /* dynamic reloc, exported PLT, ## */ | |
158 | RELOC_NUMBER (R_IA64_EPLTLSB, 0x83) /* dynamic reloc, exported PLT, ## */ | |
159 | RELOC_NUMBER (R_IA64_COPY, 0x84) /* dynamic reloc, data copy ## */ | |
160 | RELOC_NUMBER (R_IA64_LTOFF22X, 0x86) /* LTOFF22, relaxable. */ | |
161 | RELOC_NUMBER (R_IA64_LDXMOV, 0x87) /* Use of LTOFF22X. */ | |
162 | ||
163 | RELOC_NUMBER (R_IA64_TPREL22, 0x92) /* sym-TP+add, add imm22 ## */ | |
164 | RELOC_NUMBER (R_IA64_TPREL64MSB, 0x96) /* sym-TP+add, data8 MSB ## */ | |
165 | RELOC_NUMBER (R_IA64_TPREL64LSB, 0x97) /* sym-TP+add, data8 LSB ## */ | |
166 | ||
167 | RELOC_NUMBER (R_IA64_LTOFF_TP22, 0x9a) /* @ltoff(sym-TP+add), add imm22 ## */ | |
168 | ||
169 | FAKE_RELOC (R_IA64_MAX_RELOC_CODE, 0x9a) | |
1b452ec6 | 170 | END_RELOC_NUMBERS (R_IA64_max) |
800eeca4 JW |
171 | |
172 | #endif /* _ELF_IA64_H */ |