projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 800eeca4 | 1 | /* IA-64 ELF support for BFD. |
| 01e1a5bc | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2008, 2009 |
| c3aa17e9 | 3 | Free Software Foundation, Inc. |
| 800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
| 5 | ||
| ecc51f48 | 6 | This file is part of BFD, the Binary File Descriptor library. |
| 800eeca4 | 7 | |
| ecc51f48 NC |
8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by | |
| 10 | the Free Software Foundation; either version 2 of the License, or | |
| 11 | (at your option) any later version. | |
| 800eeca4 | 12 | |
| ecc51f48 NC |
13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | GNU General Public License for more details. | |
| 800eeca4 | 17 | |
| ecc51f48 NC |
18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software | |
| e172dbf8 | 20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
| 800eeca4 JW |
21 | |
| 22 | #ifndef _ELF_IA64_H | |
| 23 | #define _ELF_IA64_H | |
| 24 | ||
| 25 | /* Bits in the e_flags field of the Elf64_Ehdr: */ | |
| 26 | ||
| 01e1a5bc NC |
27 | #define EF_IA_64_MASKOS 0x0000000f /* OS-specific flags. */ |
| 28 | #define EF_IA_64_ARCH 0xff000000 /* Arch. version mask. */ | |
| 29 | #define EF_IA_64_ARCHVER_1 (1 << 24) /* Arch. version level 1 compat. */ | |
| 800eeca4 JW |
30 | |
| 31 | /* ??? These four definitions are not part of the SVR4 ABI. | |
| 32 | They were present in David's initial code drop, so it is probable | |
| 33 | that they are used by HP/UX. */ | |
| ecc51f48 NC |
34 | #define EF_IA_64_TRAPNIL (1 << 0) /* Trap NIL pointer dereferences. */ |
| 35 | #define EF_IA_64_EXT (1 << 2) /* Program uses arch. extensions. */ | |
| 36 | #define EF_IA_64_BE (1 << 3) /* PSR BE bit set (big-endian). */ | |
| 37 | #define EFA_IA_64_EAS2_3 0x23000000 /* IA64 EAS 2.3. */ | |
| 800eeca4 | 38 | |
| ecc51f48 | 39 | #define EF_IA_64_ABI64 (1 << 4) /* 64-bit ABI. */ |
| c43c2cc5 JW |
40 | /* Not used yet. */ |
| 41 | #define EF_IA_64_REDUCEDFP (1 << 5) /* Only FP6-FP11 used. */ | |
| ecc51f48 NC |
42 | #define EF_IA_64_CONS_GP (1 << 6) /* gp as program wide constant. */ |
| 43 | #define EF_IA_64_NOFUNCDESC_CONS_GP (1 << 7) /* And no function descriptors. */ | |
| c43c2cc5 JW |
44 | /* Not used yet. */ |
| 45 | #define EF_IA_64_ABSOLUTE (1 << 8) /* Load at absolute addresses. */ | |
| 46 | ||
| 800eeca4 JW |
47 | #define ELF_STRING_ia64_archext ".IA_64.archext" |
| 48 | #define ELF_STRING_ia64_pltoff ".IA_64.pltoff" | |
| 49 | #define ELF_STRING_ia64_unwind ".IA_64.unwind" | |
| 50 | #define ELF_STRING_ia64_unwind_info ".IA_64.unwind_info" | |
| 579f31ac JJ |
51 | #define ELF_STRING_ia64_unwind_once ".gnu.linkonce.ia64unw." |
| 52 | #define ELF_STRING_ia64_unwind_info_once ".gnu.linkonce.ia64unwi." | |
| 8661be6a AM |
53 | /* .IA_64.unwind_hdr is only used by HP-UX. */ |
| 54 | #define ELF_STRING_ia64_unwind_hdr ".IA_64.unwind_hdr" | |
| 800eeca4 JW |
55 | |
| 56 | /* Bits in the sh_flags field of Elf64_Shdr: */ | |
| 57 | ||
| 148b93f2 NC |
58 | #define SHF_IA_64_SHORT 0x10000000 /* Section near gp. */ |
| 59 | #define SHF_IA_64_NORECOV 0x20000000 /* Spec insns w/o recovery. */ | |
| 800eeca4 | 60 | |
| 148b93f2 NC |
61 | #define SHF_IA_64_HP_TLS 0x01000000 /* HP specific TLS flag. */ |
| 62 | ||
| 63 | #define SHF_IA_64_VMS_GLOBAL 0x0100000000ULL /* Global for clustering. */ | |
| 64 | #define SHF_IA_64_VMS_OVERLAID 0x0200000000ULL /* To be overlaid. */ | |
| 65 | #define SHF_IA_64_VMS_SHARED 0x0400000000ULL /* Shared btw processes. */ | |
| 66 | #define SHF_IA_64_VMS_VECTOR 0x0800000000ULL /* Priv change mode vect. */ | |
| 67 | #define SHF_IA_64_VMS_ALLOC_64BIT 0x1000000000ULL /* Allocate beyond 2GB. */ | |
| 68 | #define SHF_IA_64_VMS_PROTECTED 0x2000000000ULL /* Export from sharable. */ | |
| 37debb04 | 69 | |
| 800eeca4 JW |
70 | /* Possible values for sh_type in Elf64_Shdr: */ |
| 71 | ||
| ecc51f48 NC |
72 | #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* Extension bits. */ |
| 73 | #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* Unwind bits. */ | |
| 148b93f2 | 74 | #define SHT_IA_64_LOPSREG (SHT_LOPROC + 0x8000000) |
| ecc51f48 | 75 | /* ABI says (SHT_LOPROC + 0xfffffff) but I think it's a typo -- this makes sense. */ |
| 148b93f2 | 76 | #define SHT_IA_64_HIPSREG (SHT_LOPROC + 0x8ffffff) |
| ecc51f48 | 77 | #define SHT_IA_64_PRIORITY_INIT (SHT_LOPROC + 0x9000000) |
| 800eeca4 | 78 | |
| 8661be6a AM |
79 | /* SHT_IA_64_HP_OPT_ANOT is only generated by HPUX compilers for its |
| 80 | optimization annotation section. GCC does not generate it but we | |
| 81 | want readelf to know what they are. Do not use two capital Ns in | |
| 82 | annotate or sed will turn it into 32 or 64 during the build. */ | |
| 83 | #define SHT_IA_64_HP_OPT_ANOT 0x60000004 | |
| 84 | ||
| 148b93f2 NC |
85 | /* OpenVMS section types. */ |
| 86 | /* The section contains PC-to-source correlation information for use by the | |
| 87 | VMS RTL's traceback facility. */ | |
| 01e1a5bc | 88 | #define SHT_IA_64_VMS_TRACE 0x60000000 |
| 148b93f2 NC |
89 | /* The section contains routine signature information for use by the |
| 90 | translated image executive. */ | |
| 01e1a5bc | 91 | #define SHT_IA_64_VMS_TIE_SIGNATURES 0x60000001 |
| 148b93f2 | 92 | /* The section contains dwarf-3 information. */ |
| 01e1a5bc | 93 | #define SHT_IA_64_VMS_DEBUG 0x60000002 |
| 148b93f2 | 94 | /* The section contains the dwarf-3 string table. */ |
| 01e1a5bc | 95 | #define SHT_IA_64_VMS_DEBUG_STR 0x60000003 |
| 148b93f2 NC |
96 | /* The section contains linkage information to perform consistency checking |
| 97 | accross object modules. */ | |
| 01e1a5bc | 98 | #define SHT_IA_64_VMS_LINKAGES 0x60000004 |
| 148b93f2 NC |
99 | /* The section allows the symbol vector in an image to be location through |
| 100 | the section table. */ | |
| 01e1a5bc | 101 | #define SHT_IA_64_VMS_SYMBOL_VECTOR 0x60000005 |
| 148b93f2 | 102 | /* The section contains inter-image fixups. */ |
| 01e1a5bc NC |
103 | #define SHT_IA_64_VMS_FIXUP 0x60000006 |
| 104 | /* The section contains unmangled name info. */ | |
| 105 | #define SHT_IA_64_VMS_DISPLAY_NAME_INFO 0x60000007 | |
| 148b93f2 | 106 | |
| 800eeca4 JW |
107 | /* Bits in the p_flags field of Elf64_Phdr: */ |
| 108 | ||
| 109 | #define PF_IA_64_NORECOV 0x80000000 | |
| 110 | ||
| 111 | /* Possible values for p_type in Elf64_Phdr: */ | |
| 112 | ||
| ecc51f48 NC |
113 | #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* Arch extension bits, */ |
| 114 | #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* IA64 unwind bits. */ | |
| 800eeca4 | 115 | |
| 8661be6a AM |
116 | /* HP-UX specific values for p_type in Elf64_Phdr. |
| 117 | These values are currently just used to make | |
| 118 | readelf more usable on HP-UX. */ | |
| 119 | ||
| 120 | #define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12) | |
| 121 | #define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13) | |
| 122 | #define PT_IA_64_HP_STACK (PT_LOOS + 0x14) | |
| 123 | ||
| 800eeca4 JW |
124 | /* Possible values for d_tag in Elf64_Dyn: */ |
| 125 | ||
| 126 | #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) | |
| 127 | ||
| 148b93f2 NC |
128 | /* VMS specific values for d_tag in Elf64_Dyn: */ |
| 129 | ||
| 130 | #define DT_IA_64_VMS_SUBTYPE (DT_LOOS + 0) | |
| 131 | #define DT_IA_64_VMS_IMGIOCNT (DT_LOOS + 2) | |
| 132 | #define DT_IA_64_VMS_LNKFLAGS (DT_LOOS + 8) | |
| 133 | #define DT_IA_64_VMS_VIR_MEM_BLK_SIZ (DT_LOOS + 10) | |
| 134 | #define DT_IA_64_VMS_IDENT (DT_LOOS + 12) | |
| 135 | #define DT_IA_64_VMS_NEEDED_IDENT (DT_LOOS + 16) | |
| 136 | #define DT_IA_64_VMS_IMG_RELA_CNT (DT_LOOS + 18) | |
| 137 | #define DT_IA_64_VMS_SEG_RELA_CNT (DT_LOOS + 20) | |
| 138 | #define DT_IA_64_VMS_FIXUP_RELA_CNT (DT_LOOS + 22) | |
| 139 | #define DT_IA_64_VMS_FIXUP_NEEDED (DT_LOOS + 24) | |
| 140 | #define DT_IA_64_VMS_SYMVEC_CNT (DT_LOOS + 26) | |
| 141 | #define DT_IA_64_VMS_XLATED (DT_LOOS + 30) | |
| 142 | #define DT_IA_64_VMS_STACKSIZE (DT_LOOS + 32) | |
| 143 | #define DT_IA_64_VMS_UNWINDSZ (DT_LOOS + 34) | |
| 144 | #define DT_IA_64_VMS_UNWIND_CODSEG (DT_LOOS + 36) | |
| 145 | #define DT_IA_64_VMS_UNWIND_INFOSEG (DT_LOOS + 38) | |
| 146 | #define DT_IA_64_VMS_LINKTIME (DT_LOOS + 40) | |
| 147 | #define DT_IA_64_VMS_SEG_NO (DT_LOOS + 42) | |
| 148 | #define DT_IA_64_VMS_SYMVEC_OFFSET (DT_LOOS + 44) | |
| 149 | #define DT_IA_64_VMS_SYMVEC_SEG (DT_LOOS + 46) | |
| 150 | #define DT_IA_64_VMS_UNWIND_OFFSET (DT_LOOS + 48) | |
| 151 | #define DT_IA_64_VMS_UNWIND_SEG (DT_LOOS + 50) | |
| 152 | #define DT_IA_64_VMS_STRTAB_OFFSET (DT_LOOS + 52) | |
| 153 | #define DT_IA_64_VMS_SYSVER_OFFSET (DT_LOOS + 54) | |
| 154 | #define DT_IA_64_VMS_IMG_RELA_OFF (DT_LOOS + 56) | |
| 155 | #define DT_IA_64_VMS_SEG_RELA_OFF (DT_LOOS + 58) | |
| 156 | #define DT_IA_64_VMS_FIXUP_RELA_OFF (DT_LOOS + 60) | |
| 157 | #define DT_IA_64_VMS_PLTGOT_OFFSET (DT_LOOS + 62) | |
| 158 | #define DT_IA_64_VMS_PLTGOT_SEG (DT_LOOS + 64) | |
| 159 | #define DT_IA_64_VMS_FPMODE (DT_LOOS + 66) | |
| 160 | ||
| 8661be6a AM |
161 | /* This section only used by HP-UX, The HP linker gives weak symbols |
| 162 | precedence over regular common symbols. We want common to override | |
| 163 | weak. Using this common instead of SHN_COMMON does that. */ | |
| 1bce5d2c | 164 | #define SHN_IA_64_ANSI_COMMON SHN_LORESERVE |
| 8661be6a | 165 | |
| 148b93f2 NC |
166 | /* This section is only used by OpenVMS. Symbol is defined in the symbol |
| 167 | vector (only possible for image files). */ | |
| 1bce5d2c | 168 | #define SHN_IA_64_VMS_SYMVEC SHN_LOOS |
| 148b93f2 | 169 | |
| ecc51f48 | 170 | /* IA64-specific relocation types: */ |
| 800eeca4 JW |
171 | |
| 172 | /* Relocs apply to specific instructions within a bundle. The least | |
| 173 | significant 2 bits of the address indicate which instruction in the | |
| 174 | bundle the reloc refers to (0=first slot, 1=second slow, 2=third | |
| 175 | slot, 3=undefined) and the remaining bits give the address of the | |
| 176 | bundle (16 byte aligned). | |
| 177 | ||
| 178 | The top 5 bits of the reloc code specifies the expression type, the | |
| 71517c70 | 179 | low 3 bits the format of the data word being relocated. */ |
| 800eeca4 JW |
180 | |
| 181 | #include "elf/reloc-macros.h" | |
| 182 | ||
| 183 | START_RELOC_NUMBERS (elf_ia64_reloc_type) | |
| 184 | RELOC_NUMBER (R_IA64_NONE, 0x00) /* none */ | |
| 185 | ||
| 186 | RELOC_NUMBER (R_IA64_IMM14, 0x21) /* symbol + addend, add imm14 */ | |
| 187 | RELOC_NUMBER (R_IA64_IMM22, 0x22) /* symbol + addend, add imm22 */ | |
| 188 | RELOC_NUMBER (R_IA64_IMM64, 0x23) /* symbol + addend, mov imm64 */ | |
| 189 | RELOC_NUMBER (R_IA64_DIR32MSB, 0x24) /* symbol + addend, data4 MSB */ | |
| 190 | RELOC_NUMBER (R_IA64_DIR32LSB, 0x25) /* symbol + addend, data4 LSB */ | |
| 191 | RELOC_NUMBER (R_IA64_DIR64MSB, 0x26) /* symbol + addend, data8 MSB */ | |
| 192 | RELOC_NUMBER (R_IA64_DIR64LSB, 0x27) /* symbol + addend, data8 LSB */ | |
| 193 | ||
| 71517c70 RH |
194 | RELOC_NUMBER (R_IA64_GPREL22, 0x2a) /* @gprel(sym+add), add imm22 */ |
| 195 | RELOC_NUMBER (R_IA64_GPREL64I, 0x2b) /* @gprel(sym+add), mov imm64 */ | |
| 196 | RELOC_NUMBER (R_IA64_GPREL32MSB, 0x2c) /* @gprel(sym+add), data4 MSB */ | |
| 197 | RELOC_NUMBER (R_IA64_GPREL32LSB, 0x2d) /* @gprel(sym+add), data4 LSB */ | |
| 198 | RELOC_NUMBER (R_IA64_GPREL64MSB, 0x2e) /* @gprel(sym+add), data8 MSB */ | |
| 199 | RELOC_NUMBER (R_IA64_GPREL64LSB, 0x2f) /* @gprel(sym+add), data8 LSB */ | |
| 200 | ||
| 201 | RELOC_NUMBER (R_IA64_LTOFF22, 0x32) /* @ltoff(sym+add), add imm22 */ | |
| 202 | RELOC_NUMBER (R_IA64_LTOFF64I, 0x33) /* @ltoff(sym+add), mov imm64 */ | |
| 203 | ||
| 204 | RELOC_NUMBER (R_IA64_PLTOFF22, 0x3a) /* @pltoff(sym+add), add imm22 */ | |
| 205 | RELOC_NUMBER (R_IA64_PLTOFF64I, 0x3b) /* @pltoff(sym+add), mov imm64 */ | |
| 206 | RELOC_NUMBER (R_IA64_PLTOFF64MSB, 0x3e) /* @pltoff(sym+add), data8 MSB */ | |
| 207 | RELOC_NUMBER (R_IA64_PLTOFF64LSB, 0x3f) /* @pltoff(sym+add), data8 LSB */ | |
| 208 | ||
| 209 | RELOC_NUMBER (R_IA64_FPTR64I, 0x43) /* @fptr(sym+add), mov imm64 */ | |
| 210 | RELOC_NUMBER (R_IA64_FPTR32MSB, 0x44) /* @fptr(sym+add), data4 MSB */ | |
| 211 | RELOC_NUMBER (R_IA64_FPTR32LSB, 0x45) /* @fptr(sym+add), data4 LSB */ | |
| 212 | RELOC_NUMBER (R_IA64_FPTR64MSB, 0x46) /* @fptr(sym+add), data8 MSB */ | |
| 213 | RELOC_NUMBER (R_IA64_FPTR64LSB, 0x47) /* @fptr(sym+add), data8 LSB */ | |
| 214 | ||
| 215 | RELOC_NUMBER (R_IA64_PCREL60B, 0x48) /* @pcrel(sym+add), brl */ | |
| 216 | RELOC_NUMBER (R_IA64_PCREL21B, 0x49) /* @pcrel(sym+add), ptb, call */ | |
| 217 | RELOC_NUMBER (R_IA64_PCREL21M, 0x4a) /* @pcrel(sym+add), chk.s */ | |
| 218 | RELOC_NUMBER (R_IA64_PCREL21F, 0x4b) /* @pcrel(sym+add), fchkf */ | |
| 219 | RELOC_NUMBER (R_IA64_PCREL32MSB, 0x4c) /* @pcrel(sym+add), data4 MSB */ | |
| 220 | RELOC_NUMBER (R_IA64_PCREL32LSB, 0x4d) /* @pcrel(sym+add), data4 LSB */ | |
| 221 | RELOC_NUMBER (R_IA64_PCREL64MSB, 0x4e) /* @pcrel(sym+add), data8 MSB */ | |
| 222 | RELOC_NUMBER (R_IA64_PCREL64LSB, 0x4f) /* @pcrel(sym+add), data8 LSB */ | |
| 800eeca4 JW |
223 | |
| 224 | RELOC_NUMBER (R_IA64_LTOFF_FPTR22, 0x52) /* @ltoff(@fptr(s+a)), imm22 */ | |
| 225 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64I, 0x53) /* @ltoff(@fptr(s+a)), imm64 */ | |
| 71517c70 RH |
226 | RELOC_NUMBER (R_IA64_LTOFF_FPTR32MSB, 0x54) /* @ltoff(@fptr(s+a)), 4 MSB */ |
| 227 | RELOC_NUMBER (R_IA64_LTOFF_FPTR32LSB, 0x55) /* @ltoff(@fptr(s+a)), 4 LSB */ | |
| 228 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64MSB, 0x56) /* @ltoff(@fptr(s+a)), 8 MSB */ | |
| 229 | RELOC_NUMBER (R_IA64_LTOFF_FPTR64LSB, 0x57) /* @ltoff(@fptr(s+a)), 8 LSB */ | |
| 800eeca4 | 230 | |
| 71517c70 RH |
231 | RELOC_NUMBER (R_IA64_SEGREL32MSB, 0x5c) /* @segrel(sym+add), data4 MSB */ |
| 232 | RELOC_NUMBER (R_IA64_SEGREL32LSB, 0x5d) /* @segrel(sym+add), data4 LSB */ | |
| 233 | RELOC_NUMBER (R_IA64_SEGREL64MSB, 0x5e) /* @segrel(sym+add), data8 MSB */ | |
| 234 | RELOC_NUMBER (R_IA64_SEGREL64LSB, 0x5f) /* @segrel(sym+add), data8 LSB */ | |
| 800eeca4 | 235 | |
| 71517c70 RH |
236 | RELOC_NUMBER (R_IA64_SECREL32MSB, 0x64) /* @secrel(sym+add), data4 MSB */ |
| 237 | RELOC_NUMBER (R_IA64_SECREL32LSB, 0x65) /* @secrel(sym+add), data4 LSB */ | |
| 238 | RELOC_NUMBER (R_IA64_SECREL64MSB, 0x66) /* @secrel(sym+add), data8 MSB */ | |
| 239 | RELOC_NUMBER (R_IA64_SECREL64LSB, 0x67) /* @secrel(sym+add), data8 LSB */ | |
| 800eeca4 JW |
240 | |
| 241 | RELOC_NUMBER (R_IA64_REL32MSB, 0x6c) /* data 4 + REL */ | |
| 242 | RELOC_NUMBER (R_IA64_REL32LSB, 0x6d) /* data 4 + REL */ | |
| 243 | RELOC_NUMBER (R_IA64_REL64MSB, 0x6e) /* data 8 + REL */ | |
| 244 | RELOC_NUMBER (R_IA64_REL64LSB, 0x6f) /* data 8 + REL */ | |
| 245 | ||
| 71517c70 RH |
246 | RELOC_NUMBER (R_IA64_LTV32MSB, 0x74) /* symbol + addend, data4 MSB */ |
| 247 | RELOC_NUMBER (R_IA64_LTV32LSB, 0x75) /* symbol + addend, data4 LSB */ | |
| 248 | RELOC_NUMBER (R_IA64_LTV64MSB, 0x76) /* symbol + addend, data8 MSB */ | |
| 249 | RELOC_NUMBER (R_IA64_LTV64LSB, 0x77) /* symbol + addend, data8 LSB */ | |
| 800eeca4 | 250 | |
| 71517c70 RH |
251 | RELOC_NUMBER (R_IA64_PCREL21BI, 0x79) /* @pcrel(sym+add), ptb, call */ |
| 252 | RELOC_NUMBER (R_IA64_PCREL22, 0x7a) /* @pcrel(sym+add), imm22 */ | |
| 253 | RELOC_NUMBER (R_IA64_PCREL64I, 0x7b) /* @pcrel(sym+add), imm64 */ | |
| 40eb4f34 | 254 | |
| 800eeca4 JW |
255 | RELOC_NUMBER (R_IA64_IPLTMSB, 0x80) /* dynamic reloc, imported PLT, MSB */ |
| 256 | RELOC_NUMBER (R_IA64_IPLTLSB, 0x81) /* dynamic reloc, imported PLT, LSB */ | |
| 71517c70 | 257 | RELOC_NUMBER (R_IA64_COPY, 0x84) /* dynamic reloc, data copy */ |
| 800eeca4 JW |
258 | RELOC_NUMBER (R_IA64_LTOFF22X, 0x86) /* LTOFF22, relaxable. */ |
| 259 | RELOC_NUMBER (R_IA64_LDXMOV, 0x87) /* Use of LTOFF22X. */ | |
| 260 | ||
| 71517c70 RH |
261 | RELOC_NUMBER (R_IA64_TPREL14, 0x91) /* @tprel(sym+add), add imm14 */ |
| 262 | RELOC_NUMBER (R_IA64_TPREL22, 0x92) /* @tprel(sym+add), add imm22 */ | |
| 263 | RELOC_NUMBER (R_IA64_TPREL64I, 0x93) /* @tprel(sym+add), add imm64 */ | |
| 264 | RELOC_NUMBER (R_IA64_TPREL64MSB, 0x96) /* @tprel(sym+add), data8 MSB */ | |
| 265 | RELOC_NUMBER (R_IA64_TPREL64LSB, 0x97) /* @tprel(sym+add), data8 LSB */ | |
| 266 | ||
| 13ae64f3 | 267 | RELOC_NUMBER (R_IA64_LTOFF_TPREL22, 0x9a) /* @ltoff(@tprel(s+a)), add imm22 */ |
| 71517c70 RH |
268 | |
| 269 | RELOC_NUMBER (R_IA64_DTPMOD64MSB, 0xa6) /* @dtpmod(sym+add), data8 MSB */ | |
| 270 | RELOC_NUMBER (R_IA64_DTPMOD64LSB, 0xa7) /* @dtpmod(sym+add), data8 LSB */ | |
| 271 | RELOC_NUMBER (R_IA64_LTOFF_DTPMOD22, 0xaa) /* @ltoff(@dtpmod(s+a)), imm22 */ | |
| 272 | ||
| 273 | RELOC_NUMBER (R_IA64_DTPREL14, 0xb1) /* @dtprel(sym+add), imm14 */ | |
| 274 | RELOC_NUMBER (R_IA64_DTPREL22, 0xb2) /* @dtprel(sym+add), imm22 */ | |
| 275 | RELOC_NUMBER (R_IA64_DTPREL64I, 0xb3) /* @dtprel(sym+add), imm64 */ | |
| 276 | RELOC_NUMBER (R_IA64_DTPREL32MSB, 0xb4) /* @dtprel(sym+add), data4 MSB */ | |
| 277 | RELOC_NUMBER (R_IA64_DTPREL32LSB, 0xb5) /* @dtprel(sym+add), data4 LSB */ | |
| 278 | RELOC_NUMBER (R_IA64_DTPREL64MSB, 0xb6) /* @dtprel(sym+add), data8 MSB */ | |
| 279 | RELOC_NUMBER (R_IA64_DTPREL64LSB, 0xb7) /* @dtprel(sym+add), data8 LSB */ | |
| 800eeca4 | 280 | |
| 71517c70 | 281 | RELOC_NUMBER (R_IA64_LTOFF_DTPREL22, 0xba) /* @ltoff(@dtprel(s+a)), imm22 */ |
| 800eeca4 | 282 | |
| 71517c70 | 283 | FAKE_RELOC (R_IA64_MAX_RELOC_CODE, 0xba) |
| 1b452ec6 | 284 | END_RELOC_NUMBERS (R_IA64_max) |
| 800eeca4 JW |
285 | |
| 286 | #endif /* _ELF_IA64_H */ |