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ef016f83 MF |
1 | /* This file defines the interface between the Blackfin simulator and GDB. |
2 | ||
42a4f53d | 3 | Copyright (C) 2005-2019 Free Software Foundation, Inc. |
ef016f83 MF |
4 | Contributed by Analog Devices. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | enum sim_bfin_regnum { | |
22 | SIM_BFIN_R0_REGNUM = 0, | |
23 | SIM_BFIN_R1_REGNUM, | |
24 | SIM_BFIN_R2_REGNUM, | |
25 | SIM_BFIN_R3_REGNUM, | |
26 | SIM_BFIN_R4_REGNUM, | |
27 | SIM_BFIN_R5_REGNUM, | |
28 | SIM_BFIN_R6_REGNUM, | |
29 | SIM_BFIN_R7_REGNUM, | |
30 | SIM_BFIN_P0_REGNUM, | |
31 | SIM_BFIN_P1_REGNUM, | |
32 | SIM_BFIN_P2_REGNUM, | |
33 | SIM_BFIN_P3_REGNUM, | |
34 | SIM_BFIN_P4_REGNUM, | |
35 | SIM_BFIN_P5_REGNUM, | |
36 | SIM_BFIN_SP_REGNUM, | |
37 | SIM_BFIN_FP_REGNUM, | |
38 | SIM_BFIN_I0_REGNUM, | |
39 | SIM_BFIN_I1_REGNUM, | |
40 | SIM_BFIN_I2_REGNUM, | |
41 | SIM_BFIN_I3_REGNUM, | |
42 | SIM_BFIN_M0_REGNUM, | |
43 | SIM_BFIN_M1_REGNUM, | |
44 | SIM_BFIN_M2_REGNUM, | |
45 | SIM_BFIN_M3_REGNUM, | |
46 | SIM_BFIN_B0_REGNUM, | |
47 | SIM_BFIN_B1_REGNUM, | |
48 | SIM_BFIN_B2_REGNUM, | |
49 | SIM_BFIN_B3_REGNUM, | |
50 | SIM_BFIN_L0_REGNUM, | |
51 | SIM_BFIN_L1_REGNUM, | |
52 | SIM_BFIN_L2_REGNUM, | |
53 | SIM_BFIN_L3_REGNUM, | |
54 | SIM_BFIN_A0_DOT_X_REGNUM, | |
55 | SIM_BFIN_A0_DOT_W_REGNUM, | |
56 | SIM_BFIN_A1_DOT_X_REGNUM, | |
57 | SIM_BFIN_A1_DOT_W_REGNUM, | |
58 | SIM_BFIN_ASTAT_REGNUM, | |
59 | SIM_BFIN_RETS_REGNUM, | |
60 | SIM_BFIN_LC0_REGNUM, | |
61 | SIM_BFIN_LT0_REGNUM, | |
62 | SIM_BFIN_LB0_REGNUM, | |
63 | SIM_BFIN_LC1_REGNUM, | |
64 | SIM_BFIN_LT1_REGNUM, | |
65 | SIM_BFIN_LB1_REGNUM, | |
66 | SIM_BFIN_CYCLES_REGNUM, | |
67 | SIM_BFIN_CYCLES2_REGNUM, | |
68 | SIM_BFIN_USP_REGNUM, | |
69 | SIM_BFIN_SEQSTAT_REGNUM, | |
70 | SIM_BFIN_SYSCFG_REGNUM, | |
71 | SIM_BFIN_RETI_REGNUM, | |
72 | SIM_BFIN_RETX_REGNUM, | |
73 | SIM_BFIN_RETN_REGNUM, | |
74 | SIM_BFIN_RETE_REGNUM, | |
75 | SIM_BFIN_PC_REGNUM, | |
76 | SIM_BFIN_CC_REGNUM, | |
77 | SIM_BFIN_TEXT_ADDR, | |
78 | SIM_BFIN_TEXT_END_ADDR, | |
79 | SIM_BFIN_DATA_ADDR, | |
80 | SIM_BFIN_IPEND_REGNUM | |
81 | }; | |
82 |