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26f59a9e | 1 | /* This file defines the interface between the d10v simulator and gdb. |
18c0df9e | 2 | |
618f726f | 3 | Copyright (C) 1999-2016 Free Software Foundation, Inc. |
26f59a9e | 4 | |
1d52ba21 | 5 | This file is part of GDB. |
26f59a9e | 6 | |
1d52ba21 JB |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
26f59a9e | 11 | |
1d52ba21 JB |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
26f59a9e | 16 | |
1d52ba21 JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
26f59a9e MM |
19 | |
20 | #if !defined (SIM_D10V_H) | |
21 | #define SIM_D10V_H | |
22 | ||
26f59a9e MM |
23 | /* GDB interprets addresses as: |
24 | ||
25 | 0x00xxxxxx: Physical unified memory segment (Unified memory) | |
26 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory) | |
27 | 0x02xxxxxx: Physical data memory segment (On-chip data memory) | |
28 | 0x10xxxxxx: Logical data address segment (DMAP translated memory) | |
29 | 0x11xxxxxx: Logical instruction address segment (IMAP translated memory) | |
30 | ||
31 | The remote d10v board interprets addresses as: | |
32 | ||
33 | 0x00xxxxxx: Physical unified memory segment (Unified memory) | |
34 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory) | |
35 | 0x02xxxxxx: Physical data memory segment (On-chip data memory) | |
36 | ||
37 | The following translate a virtual DMAP/IMAP offset into a physical | |
38 | memory segment assigning the translated address to PHYS. Since a | |
39 | memory access may cross a page boundrary the number of bytes for | |
40 | which the translation is applicable (or 0 for an invalid virtual | |
41 | offset) is returned. */ | |
42 | ||
43 | enum | |
44 | { | |
45 | SIM_D10V_MEMORY_UNIFIED = 0x00000000, | |
46 | SIM_D10V_MEMORY_INSN = 0x01000000, | |
47 | SIM_D10V_MEMORY_DATA = 0x02000000, | |
48 | SIM_D10V_MEMORY_DMAP = 0x10000000, | |
49 | SIM_D10V_MEMORY_IMAP = 0x11000000 | |
50 | }; | |
51 | ||
26f59a9e MM |
52 | /* The simulator makes use of the following register information. */ |
53 | ||
18c0df9e AC |
54 | enum sim_d10v_regs |
55 | { | |
56 | SIM_D10V_R0_REGNUM, | |
57 | SIM_D10V_R1_REGNUM, | |
58 | SIM_D10V_R2_REGNUM, | |
59 | SIM_D10V_R3_REGNUM, | |
60 | SIM_D10V_R4_REGNUM, | |
61 | SIM_D10V_R5_REGNUM, | |
62 | SIM_D10V_R6_REGNUM, | |
63 | SIM_D10V_R7_REGNUM, | |
64 | SIM_D10V_R8_REGNUM, | |
65 | SIM_D10V_R9_REGNUM, | |
66 | SIM_D10V_R10_REGNUM, | |
67 | SIM_D10V_R11_REGNUM, | |
68 | SIM_D10V_R12_REGNUM, | |
69 | SIM_D10V_R13_REGNUM, | |
70 | SIM_D10V_R14_REGNUM, | |
71 | SIM_D10V_R15_REGNUM, | |
72 | SIM_D10V_CR0_REGNUM, | |
73 | SIM_D10V_CR1_REGNUM, | |
74 | SIM_D10V_CR2_REGNUM, | |
75 | SIM_D10V_CR3_REGNUM, | |
76 | SIM_D10V_CR4_REGNUM, | |
77 | SIM_D10V_CR5_REGNUM, | |
78 | SIM_D10V_CR6_REGNUM, | |
79 | SIM_D10V_CR7_REGNUM, | |
80 | SIM_D10V_CR8_REGNUM, | |
81 | SIM_D10V_CR9_REGNUM, | |
82 | SIM_D10V_CR10_REGNUM, | |
83 | SIM_D10V_CR11_REGNUM, | |
84 | SIM_D10V_CR12_REGNUM, | |
85 | SIM_D10V_CR13_REGNUM, | |
86 | SIM_D10V_CR14_REGNUM, | |
87 | SIM_D10V_CR15_REGNUM, | |
88 | SIM_D10V_A0_REGNUM, | |
89 | SIM_D10V_A1_REGNUM, | |
90 | SIM_D10V_SPI_REGNUM, | |
91 | SIM_D10V_SPU_REGNUM, | |
92 | SIM_D10V_IMAP0_REGNUM, | |
93 | SIM_D10V_IMAP1_REGNUM, | |
94 | SIM_D10V_DMAP0_REGNUM, | |
95 | SIM_D10V_DMAP1_REGNUM, | |
96 | SIM_D10V_DMAP2_REGNUM, | |
97 | SIM_D10V_DMAP3_REGNUM, | |
98 | SIM_D10V_TS2_DMAP_REGNUM | |
99 | }; | |
100 | ||
26f59a9e | 101 | enum |
18c0df9e AC |
102 | { |
103 | SIM_D10V_NR_R_REGS = 16, | |
104 | SIM_D10V_NR_A_REGS = 2, | |
105 | SIM_D10V_NR_IMAP_REGS = 2, | |
106 | SIM_D10V_NR_DMAP_REGS = 4, | |
107 | SIM_D10V_NR_CR_REGS = 16 | |
108 | }; | |
26f59a9e | 109 | |
26f59a9e | 110 | #endif |