Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _ASM_LINUX_DMA_MAPPING_H |
2 | #define _ASM_LINUX_DMA_MAPPING_H | |
3 | ||
4 | #include <linux/device.h> | |
5 | #include <linux/err.h> | |
6 | ||
7 | /* These definitions mirror those in pci.h, so they can be used | |
8 | * interchangeably with their PCI_ counterparts */ | |
9 | enum dma_data_direction { | |
10 | DMA_BIDIRECTIONAL = 0, | |
11 | DMA_TO_DEVICE = 1, | |
12 | DMA_FROM_DEVICE = 2, | |
13 | DMA_NONE = 3, | |
14 | }; | |
15 | ||
16 | #define DMA_64BIT_MASK 0xffffffffffffffffULL | |
4c1b4622 | 17 | #define DMA_48BIT_MASK 0x0000ffffffffffffULL |
b8112df7 LR |
18 | #define DMA_40BIT_MASK 0x000000ffffffffffULL |
19 | #define DMA_39BIT_MASK 0x0000007fffffffffULL | |
1da177e4 | 20 | #define DMA_32BIT_MASK 0x00000000ffffffffULL |
b8112df7 LR |
21 | #define DMA_31BIT_MASK 0x000000007fffffffULL |
22 | #define DMA_30BIT_MASK 0x000000003fffffffULL | |
23 | #define DMA_29BIT_MASK 0x000000001fffffffULL | |
9d2f928d | 24 | #define DMA_28BIT_MASK 0x000000000fffffffULL |
56b146d3 | 25 | #define DMA_24BIT_MASK 0x0000000000ffffffULL |
1da177e4 | 26 | |
d6bd3a39 REB |
27 | static inline int valid_dma_direction(int dma_direction) |
28 | { | |
29 | return ((dma_direction == DMA_BIDIRECTIONAL) || | |
30 | (dma_direction == DMA_TO_DEVICE) || | |
31 | (dma_direction == DMA_FROM_DEVICE)); | |
32 | } | |
33 | ||
1b0fac45 | 34 | #ifdef CONFIG_HAS_DMA |
1da177e4 | 35 | #include <asm/dma-mapping.h> |
1b0fac45 DW |
36 | #else |
37 | #include <asm-generic/dma-mapping-broken.h> | |
38 | #endif | |
1da177e4 LT |
39 | |
40 | /* Backwards compat, remove in 2.7.x */ | |
41 | #define dma_sync_single dma_sync_single_for_cpu | |
42 | #define dma_sync_sg dma_sync_sg_for_cpu | |
43 | ||
44 | extern u64 dma_get_required_mask(struct device *dev); | |
45 | ||
46 | /* flags for the coherent memory api */ | |
47 | #define DMA_MEMORY_MAP 0x01 | |
48 | #define DMA_MEMORY_IO 0x02 | |
49 | #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 | |
50 | #define DMA_MEMORY_EXCLUSIVE 0x08 | |
51 | ||
52 | #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY | |
53 | static inline int | |
54 | dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |
55 | dma_addr_t device_addr, size_t size, int flags) | |
56 | { | |
57 | return 0; | |
58 | } | |
59 | ||
60 | static inline void | |
61 | dma_release_declared_memory(struct device *dev) | |
62 | { | |
63 | } | |
64 | ||
65 | static inline void * | |
66 | dma_mark_declared_memory_occupied(struct device *dev, | |
67 | dma_addr_t device_addr, size_t size) | |
68 | { | |
69 | return ERR_PTR(-EBUSY); | |
70 | } | |
71 | #endif | |
72 | ||
9ac7849e TH |
73 | /* |
74 | * Managed DMA API | |
75 | */ | |
76 | extern void *dmam_alloc_coherent(struct device *dev, size_t size, | |
77 | dma_addr_t *dma_handle, gfp_t gfp); | |
78 | extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, | |
79 | dma_addr_t dma_handle); | |
80 | extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, | |
81 | dma_addr_t *dma_handle, gfp_t gfp); | |
82 | extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, | |
83 | dma_addr_t dma_handle); | |
84 | #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY | |
85 | extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |
86 | dma_addr_t device_addr, size_t size, | |
87 | int flags); | |
88 | extern void dmam_release_declared_memory(struct device *dev); | |
89 | #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ | |
90 | static inline int dmam_declare_coherent_memory(struct device *dev, | |
91 | dma_addr_t bus_addr, dma_addr_t device_addr, | |
92 | size_t size, gfp_t gfp) | |
93 | { | |
94 | return 0; | |
95 | } | |
1da177e4 | 96 | |
9ac7849e TH |
97 | static inline void dmam_release_declared_memory(struct device *dev) |
98 | { | |
99 | } | |
100 | #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ | |
1da177e4 | 101 | |
9ac7849e | 102 | #endif |