[deliverable/linux.git] / include / linux / dma-mapping.h

#ifndef _LINUX_DMA_MAPPING_H
#define _LINUX_DMA_MAPPING_H

#include <linux/device.h>
#include <linux/err.h>

/* These definitions mirror those in pci.h, so they can be used
 * interchangeably with their PCI_ counterparts */
enum dma_data_direction {
	DMA_BIDIRECTIONAL = 0,
	DMA_TO_DEVICE = 1,
	DMA_FROM_DEVICE = 2,
	DMA_NONE = 3,
};

#define DMA_BIT_MASK(n)	(((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))

/*
 * NOTE: do not use the below macros in new code and do not add new definitions
 * here.
 *
 * Instead, just open-code DMA_BIT_MASK(n) within your driver
 */
#define DMA_64BIT_MASK	DMA_BIT_MASK(64)
#define DMA_48BIT_MASK	DMA_BIT_MASK(48)
#define DMA_47BIT_MASK	DMA_BIT_MASK(47)
#define DMA_40BIT_MASK	DMA_BIT_MASK(40)
#define DMA_39BIT_MASK	DMA_BIT_MASK(39)
#define DMA_35BIT_MASK	DMA_BIT_MASK(35)
#define DMA_32BIT_MASK	DMA_BIT_MASK(32)
#define DMA_31BIT_MASK	DMA_BIT_MASK(31)
#define DMA_30BIT_MASK	DMA_BIT_MASK(30)
#define DMA_29BIT_MASK	DMA_BIT_MASK(29)
#define DMA_28BIT_MASK	DMA_BIT_MASK(28)
#define DMA_24BIT_MASK	DMA_BIT_MASK(24)

#define DMA_MASK_NONE	0x0ULL

static inline int valid_dma_direction(int dma_direction)
{
	return ((dma_direction == DMA_BIDIRECTIONAL) ||
		(dma_direction == DMA_TO_DEVICE) ||
		(dma_direction == DMA_FROM_DEVICE));
}

static inline int is_device_dma_capable(struct device *dev)
{
	return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
}

static inline int is_buffer_dma_capable(u64 mask, dma_addr_t addr, size_t size)
{
	return addr + size <= mask;
}

#ifdef CONFIG_HAS_DMA
#include <asm/dma-mapping.h>
#else
#include <asm-generic/dma-mapping-broken.h>
#endif

/* Backwards compat, remove in 2.7.x */
#define dma_sync_single		dma_sync_single_for_cpu
#define dma_sync_sg		dma_sync_sg_for_cpu

static inline u64 dma_get_mask(struct device *dev)
{
	if (dev && dev->dma_mask && *dev->dma_mask)
		return *dev->dma_mask;
	return DMA_32BIT_MASK;
}

extern u64 dma_get_required_mask(struct device *dev);

static inline unsigned int dma_get_max_seg_size(struct device *dev)
{
	return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
}

static inline unsigned int dma_set_max_seg_size(struct device *dev,
						unsigned int size)
{
	if (dev->dma_parms) {
		dev->dma_parms->max_segment_size = size;
		return 0;
	} else
		return -EIO;
}

static inline unsigned long dma_get_seg_boundary(struct device *dev)
{
	return dev->dma_parms ?
		dev->dma_parms->segment_boundary_mask : 0xffffffff;
}

static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
{
	if (dev->dma_parms) {
		dev->dma_parms->segment_boundary_mask = mask;
		return 0;
	} else
		return -EIO;
}

/* flags for the coherent memory api */
#define	DMA_MEMORY_MAP			0x01
#define DMA_MEMORY_IO			0x02
#define DMA_MEMORY_INCLUDES_CHILDREN	0x04
#define DMA_MEMORY_EXCLUSIVE		0x08

#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
static inline int
dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
			    dma_addr_t device_addr, size_t size, int flags)
{
	return 0;
}

static inline void
dma_release_declared_memory(struct device *dev)
{
}

static inline void *
dma_mark_declared_memory_occupied(struct device *dev,
				  dma_addr_t device_addr, size_t size)
{
	return ERR_PTR(-EBUSY);
}
#endif

/*
 * Managed DMA API
 */
extern void *dmam_alloc_coherent(struct device *dev, size_t size,
				 dma_addr_t *dma_handle, gfp_t gfp);
extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
			       dma_addr_t dma_handle);
extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
				    dma_addr_t *dma_handle, gfp_t gfp);
extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
				  dma_addr_t dma_handle);
#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
					dma_addr_t device_addr, size_t size,
					int flags);
extern void dmam_release_declared_memory(struct device *dev);
#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
static inline int dmam_declare_coherent_memory(struct device *dev,
				dma_addr_t bus_addr, dma_addr_t device_addr,
				size_t size, gfp_t gfp)
{
	return 0;
}

static inline void dmam_release_declared_memory(struct device *dev)
{
}
#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */

#ifndef CONFIG_HAVE_DMA_ATTRS
struct dma_attrs;

#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
	dma_map_single(dev, cpu_addr, size, dir)

#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
	dma_unmap_single(dev, dma_addr, size, dir)

#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
	dma_map_sg(dev, sgl, nents, dir)

#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
	dma_unmap_sg(dev, sgl, nents, dir)

#endif /* CONFIG_HAVE_DMA_ATTRS */

#endif
Commit	Line	Data
96532bab RD	1	#ifndef _LINUX_DMA_MAPPING_H
96532bab RD	2	#define _LINUX_DMA_MAPPING_H
1da177e4 LT	3
	4	#include <linux/device.h>
	5	#include <linux/err.h>
	6
	7	/* These definitions mirror those in pci.h, so they can be used
	8	* interchangeably with their PCI_ counterparts */
	9	enum dma_data_direction {
	10	DMA_BIDIRECTIONAL = 0,
	11	DMA_TO_DEVICE = 1,
	12	DMA_FROM_DEVICE = 2,
	13	DMA_NONE = 3,
	14	};
	15
8f286c33	16	#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
34c65384	17
8f286c33 AM	18	/*
	19	* NOTE: do not use the below macros in new code and do not add new definitions
	20	* here.
	21	*
	22	* Instead, just open-code DMA_BIT_MASK(n) within your driver
	23	*/
	24	#define DMA_64BIT_MASK DMA_BIT_MASK(64)
34c65384 BP	25	#define DMA_48BIT_MASK DMA_BIT_MASK(48)
	26	#define DMA_47BIT_MASK DMA_BIT_MASK(47)
	27	#define DMA_40BIT_MASK DMA_BIT_MASK(40)
	28	#define DMA_39BIT_MASK DMA_BIT_MASK(39)
	29	#define DMA_35BIT_MASK DMA_BIT_MASK(35)
	30	#define DMA_32BIT_MASK DMA_BIT_MASK(32)
	31	#define DMA_31BIT_MASK DMA_BIT_MASK(31)
	32	#define DMA_30BIT_MASK DMA_BIT_MASK(30)
	33	#define DMA_29BIT_MASK DMA_BIT_MASK(29)
	34	#define DMA_28BIT_MASK DMA_BIT_MASK(28)
	35	#define DMA_24BIT_MASK DMA_BIT_MASK(24)
1da177e4	36
32e8f702 JB	37	#define DMA_MASK_NONE 0x0ULL
32e8f702 JB	38
d6bd3a39 REB	39	static inline int valid_dma_direction(int dma_direction)
	40	{
	41	return ((dma_direction == DMA_BIDIRECTIONAL) \|\|
	42	(dma_direction == DMA_TO_DEVICE) \|\|
	43	(dma_direction == DMA_FROM_DEVICE));
	44	}
	45
32e8f702 JB	46	static inline int is_device_dma_capable(struct device *dev)
	47	{
	48	return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
	49	}
	50
636dc67c FT	51	static inline int is_buffer_dma_capable(u64 mask, dma_addr_t addr, size_t size)
	52	{
	53	return addr + size <= mask;
	54	}
	55
1b0fac45	56	#ifdef CONFIG_HAS_DMA
1da177e4	57	#include <asm/dma-mapping.h>
1b0fac45 DW	58	#else
	59	#include <asm-generic/dma-mapping-broken.h>
	60	#endif
1da177e4 LT	61
	62	/* Backwards compat, remove in 2.7.x */
	63	#define dma_sync_single dma_sync_single_for_cpu
	64	#define dma_sync_sg dma_sync_sg_for_cpu
	65
589fc9a6 FT	66	static inline u64 dma_get_mask(struct device *dev)
589fc9a6 FT	67	{
07a2c01a	68	if (dev && dev->dma_mask && *dev->dma_mask)
589fc9a6 FT	69	return *dev->dma_mask;
	70	return DMA_32BIT_MASK;
	71	}
	72
1da177e4 LT	73	extern u64 dma_get_required_mask(struct device *dev);
1da177e4 LT	74
6b7b6510 FT	75	static inline unsigned int dma_get_max_seg_size(struct device *dev)
	76	{
	77	return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
	78	}
	79
	80	static inline unsigned int dma_set_max_seg_size(struct device *dev,
	81	unsigned int size)
	82	{
	83	if (dev->dma_parms) {
	84	dev->dma_parms->max_segment_size = size;
	85	return 0;
	86	} else
	87	return -EIO;
	88	}
	89
d22a6966 FT	90	static inline unsigned long dma_get_seg_boundary(struct device *dev)
	91	{
	92	return dev->dma_parms ?
	93	dev->dma_parms->segment_boundary_mask : 0xffffffff;
	94	}
	95
	96	static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
	97	{
	98	if (dev->dma_parms) {
	99	dev->dma_parms->segment_boundary_mask = mask;
	100	return 0;
	101	} else
	102	return -EIO;
	103	}
	104
1da177e4 LT	105	/* flags for the coherent memory api */
	106	#define DMA_MEMORY_MAP 0x01
	107	#define DMA_MEMORY_IO 0x02
	108	#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
	109	#define DMA_MEMORY_EXCLUSIVE 0x08
	110
	111	#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
	112	static inline int
	113	dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
	114	dma_addr_t device_addr, size_t size, int flags)
	115	{
	116	return 0;
	117	}
	118
	119	static inline void
	120	dma_release_declared_memory(struct device *dev)
	121	{
	122	}
	123
	124	static inline void *
	125	dma_mark_declared_memory_occupied(struct device *dev,
	126	dma_addr_t device_addr, size_t size)
	127	{
	128	return ERR_PTR(-EBUSY);
	129	}
	130	#endif
	131
9ac7849e TH	132	/*
	133	* Managed DMA API
	134	*/
	135	extern void dmam_alloc_coherent(struct device dev, size_t size,
	136	dma_addr_t *dma_handle, gfp_t gfp);
	137	extern void dmam_free_coherent(struct device dev, size_t size, void vaddr,
	138	dma_addr_t dma_handle);
	139	extern void dmam_alloc_noncoherent(struct device dev, size_t size,
	140	dma_addr_t *dma_handle, gfp_t gfp);
	141	extern void dmam_free_noncoherent(struct device dev, size_t size, void vaddr,
	142	dma_addr_t dma_handle);
	143	#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
	144	extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
	145	dma_addr_t device_addr, size_t size,
	146	int flags);
	147	extern void dmam_release_declared_memory(struct device *dev);
	148	#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
	149	static inline int dmam_declare_coherent_memory(struct device *dev,
	150	dma_addr_t bus_addr, dma_addr_t device_addr,
	151	size_t size, gfp_t gfp)
	152	{
	153	return 0;
	154	}
1da177e4	155
9ac7849e TH	156	static inline void dmam_release_declared_memory(struct device *dev)
	157	{
	158	}
	159	#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
1da177e4	160
74bc7cee AK	161	#ifndef CONFIG_HAVE_DMA_ATTRS
	162	struct dma_attrs;
	163
	164	#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
	165	dma_map_single(dev, cpu_addr, size, dir)
	166
	167	#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
	168	dma_unmap_single(dev, dma_addr, size, dir)
	169
	170	#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
	171	dma_map_sg(dev, sgl, nents, dir)
	172
	173	#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
	174	dma_unmap_sg(dev, sgl, nents, dir)
	175
	176	#endif /* CONFIG_HAVE_DMA_ATTRS */
	177
9ac7849e	178	#endif