[PATCH] spinlock consolidation
[deliverable/linux.git] / include / linux / fsl_devices.h
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1/*
2 * include/linux/fsl_devices.h
3 *
4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices
6 *
7 * Maintainer: Kumar Gala (kumar.gala@freescale.com)
8 *
9 * Copyright 2004 Freescale Semiconductor, Inc
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#ifdef __KERNEL__
18#ifndef _FSL_DEVICE_H_
19#define _FSL_DEVICE_H_
20
21#include <linux/types.h>
22
23/*
24 * Some conventions on how we handle peripherals on Freescale chips
25 *
26 * unique device: a platform_device entry in fsl_plat_devs[] plus
27 * associated device information in its platform_data structure.
28 *
29 * A chip is described by a set of unique devices.
30 *
31 * Each sub-arch has its own master list of unique devices and
32 * enumerates them by enum fsl_devices in a sub-arch specific header
33 *
34 * The platform data structure is broken into two parts. The
35 * first is device specific information that help identify any
36 * unique features of a peripheral. The second is any
37 * information that may be defined by the board or how the device
38 * is connected externally of the chip.
39 *
40 * naming conventions:
41 * - platform data structures: <driver>_platform_data
42 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
43 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
44 *
45 */
46
47struct gianfar_platform_data {
48 /* device specific information */
49 u32 device_flags;
50 u32 phy_reg_addr;
51
52 /* board specific information */
53 u32 board_flags;
5b37b700 54 u32 phy_flags;
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55 u32 phyid;
56 u32 interruptPHY;
57 u8 mac_addr[6];
58};
59
60/* Flags related to gianfar device features */
61#define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001
62#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
63#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004
64#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008
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65#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
66#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
67#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
68#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
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69
70/* Flags in gianfar_platform_data */
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71#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
72#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
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73
74struct fsl_i2c_platform_data {
75 /* device specific information */
76 u32 device_flags;
77};
78
79/* Flags related to I2C device features */
80#define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001
81#define FSL_I2C_DEV_CLOCK_5200 0x00000002
82
83#endif /* _FSL_DEVICE_H_ */
84#endif /* __KERNEL__ */
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