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79a9becd AC |
1 | #ifndef __LINUX_GPIO_DRIVER_H |
2 | #define __LINUX_GPIO_DRIVER_H | |
3 | ||
4 | #include <linux/types.h> | |
c9a9972b | 5 | #include <linux/module.h> |
14250520 LW |
6 | #include <linux/irq.h> |
7 | #include <linux/irqchip/chained_irq.h> | |
8 | #include <linux/irqdomain.h> | |
79a9becd AC |
9 | |
10 | struct device; | |
11 | struct gpio_desc; | |
c9a9972b AC |
12 | struct of_phandle_args; |
13 | struct device_node; | |
f3ed0b66 | 14 | struct seq_file; |
79a9becd | 15 | |
bb1e88cc AC |
16 | #ifdef CONFIG_GPIOLIB |
17 | ||
79a9becd AC |
18 | /** |
19 | * struct gpio_chip - abstract a GPIO controller | |
20 | * @label: for diagnostics | |
21 | * @dev: optional device providing the GPIOs | |
22 | * @owner: helps prevent removal of modules exporting active GPIOs | |
23 | * @list: links gpio_chips together for traversal | |
24 | * @request: optional hook for chip-specific activation, such as | |
25 | * enabling module power and clock; may sleep | |
26 | * @free: optional hook for chip-specific deactivation, such as | |
27 | * disabling module power and clock; may sleep | |
28 | * @get_direction: returns direction for signal "offset", 0=out, 1=in, | |
29 | * (same as GPIOF_DIR_XXX), or negative error | |
30 | * @direction_input: configures signal "offset" as input, or returns error | |
31 | * @direction_output: configures signal "offset" as output, or returns error | |
32 | * @get: returns value for signal "offset"; for output signals this | |
33 | * returns either the value actually sensed, or zero | |
34 | * @set: assigns output value for signal "offset" | |
35 | * @set_debounce: optional hook for setting debounce time for specified gpio in | |
36 | * interrupt triggered gpio chips | |
37 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; | |
38 | * implementation may not sleep | |
39 | * @dbg_show: optional routine to show contents in debugfs; default code | |
40 | * will be used when this is omitted, but custom code can show extra | |
41 | * state (such as pullup/pulldown configuration). | |
42 | * @base: identifies the first GPIO number handled by this chip; or, if | |
43 | * negative during registration, requests dynamic ID allocation. | |
44 | * @ngpio: the number of GPIOs handled by this controller; the last GPIO | |
45 | * handled is (base + ngpio - 1). | |
46 | * @desc: array of ngpio descriptors. Private. | |
79a9becd AC |
47 | * @names: if set, must be an array of strings to use as alternative |
48 | * names for the GPIOs in this chip. Any entry in the array | |
49 | * may be NULL if there is no alias for the GPIO, however the | |
50 | * array must be @ngpio entries long. A name can include a single printk | |
51 | * format specifier for an unsigned int. It is substituted by the actual | |
52 | * number of the gpio. | |
9fb1f39e LW |
53 | * @can_sleep: flag must be set iff get()/set() methods sleep, as they |
54 | * must while accessing GPIO expander chips over I2C or SPI | |
55 | * @exported: flags if the gpiochip is exported for use from sysfs. Private. | |
79a9becd AC |
56 | * |
57 | * A gpio_chip can help platforms abstract various sources of GPIOs so | |
58 | * they can all be accessed through a common programing interface. | |
59 | * Example sources would be SOC controllers, FPGAs, multifunction | |
60 | * chips, dedicated GPIO expanders, and so on. | |
61 | * | |
62 | * Each chip controls a number of signals, identified in method calls | |
63 | * by "offset" values in the range 0..(@ngpio - 1). When those signals | |
64 | * are referenced through calls like gpio_get_value(gpio), the offset | |
65 | * is calculated by subtracting @base from the gpio number. | |
66 | */ | |
67 | struct gpio_chip { | |
68 | const char *label; | |
69 | struct device *dev; | |
70 | struct module *owner; | |
71 | struct list_head list; | |
72 | ||
73 | int (*request)(struct gpio_chip *chip, | |
74 | unsigned offset); | |
75 | void (*free)(struct gpio_chip *chip, | |
76 | unsigned offset); | |
77 | int (*get_direction)(struct gpio_chip *chip, | |
78 | unsigned offset); | |
79 | int (*direction_input)(struct gpio_chip *chip, | |
80 | unsigned offset); | |
81 | int (*direction_output)(struct gpio_chip *chip, | |
82 | unsigned offset, int value); | |
83 | int (*get)(struct gpio_chip *chip, | |
84 | unsigned offset); | |
85 | void (*set)(struct gpio_chip *chip, | |
86 | unsigned offset, int value); | |
87 | int (*set_debounce)(struct gpio_chip *chip, | |
88 | unsigned offset, | |
89 | unsigned debounce); | |
90 | ||
91 | int (*to_irq)(struct gpio_chip *chip, | |
92 | unsigned offset); | |
93 | ||
94 | void (*dbg_show)(struct seq_file *s, | |
95 | struct gpio_chip *chip); | |
96 | int base; | |
97 | u16 ngpio; | |
98 | struct gpio_desc *desc; | |
99 | const char *const *names; | |
9fb1f39e LW |
100 | bool can_sleep; |
101 | bool exported; | |
79a9becd | 102 | |
14250520 LW |
103 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
104 | /* | |
105 | * With CONFIG_GPIO_IRQCHIP we get an irqchip inside the gpiolib | |
106 | * to handle IRQs for most practical cases. | |
107 | */ | |
108 | struct irq_chip *irqchip; | |
109 | struct irq_domain *irqdomain; | |
c3626fde | 110 | unsigned int irq_base; |
14250520 LW |
111 | irq_flow_handler_t irq_handler; |
112 | unsigned int irq_default_type; | |
113 | #endif | |
114 | ||
79a9becd AC |
115 | #if defined(CONFIG_OF_GPIO) |
116 | /* | |
117 | * If CONFIG_OF is enabled, then all GPIO controllers described in the | |
118 | * device tree automatically may have an OF translation | |
119 | */ | |
120 | struct device_node *of_node; | |
121 | int of_gpio_n_cells; | |
122 | int (*of_xlate)(struct gpio_chip *gc, | |
123 | const struct of_phandle_args *gpiospec, u32 *flags); | |
124 | #endif | |
125 | #ifdef CONFIG_PINCTRL | |
126 | /* | |
127 | * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally | |
128 | * describe the actual pin range which they serve in an SoC. This | |
129 | * information would be used by pinctrl subsystem to configure | |
130 | * corresponding pins for gpio usage. | |
131 | */ | |
132 | struct list_head pin_ranges; | |
133 | #endif | |
134 | }; | |
135 | ||
136 | extern const char *gpiochip_is_requested(struct gpio_chip *chip, | |
137 | unsigned offset); | |
138 | ||
139 | /* add/remove chips */ | |
140 | extern int gpiochip_add(struct gpio_chip *chip); | |
141 | extern int __must_check gpiochip_remove(struct gpio_chip *chip); | |
142 | extern struct gpio_chip *gpiochip_find(void *data, | |
143 | int (*match)(struct gpio_chip *chip, void *data)); | |
144 | ||
145 | /* lock/unlock as IRQ */ | |
146 | int gpiod_lock_as_irq(struct gpio_desc *desc); | |
147 | void gpiod_unlock_as_irq(struct gpio_desc *desc); | |
148 | ||
bb1e88cc AC |
149 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
150 | ||
151 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, | |
152 | u16 hwnum); | |
153 | ||
53e7cac3 AC |
154 | enum gpio_lookup_flags { |
155 | GPIO_ACTIVE_HIGH = (0 << 0), | |
156 | GPIO_ACTIVE_LOW = (1 << 0), | |
157 | GPIO_OPEN_DRAIN = (1 << 1), | |
158 | GPIO_OPEN_SOURCE = (1 << 2), | |
159 | }; | |
160 | ||
bae48da2 | 161 | /** |
f9244ae5 AS |
162 | * struct gpiod_lookup - lookup table |
163 | * @chip_label: name of the chip the GPIO belongs to | |
164 | * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO | |
165 | * @con_id: name of the GPIO from the device's point of view | |
166 | * @idx: index of the GPIO in case several GPIOs share the same name | |
167 | * @flags: mask of GPIO_* values | |
168 | * | |
169 | * gpiod_lookup is a lookup table for associating GPIOs to specific devices and | |
170 | * functions using platform data. | |
bae48da2 AC |
171 | */ |
172 | struct gpiod_lookup { | |
bae48da2 | 173 | const char *chip_label; |
bae48da2 | 174 | u16 chip_hwnum; |
bae48da2 | 175 | const char *con_id; |
bae48da2 | 176 | unsigned int idx; |
53e7cac3 | 177 | enum gpio_lookup_flags flags; |
bae48da2 AC |
178 | }; |
179 | ||
ad824783 AC |
180 | struct gpiod_lookup_table { |
181 | struct list_head list; | |
182 | const char *dev_id; | |
183 | struct gpiod_lookup table[]; | |
184 | }; | |
185 | ||
bae48da2 AC |
186 | /* |
187 | * Simple definition of a single GPIO under a con_id | |
188 | */ | |
ad824783 AC |
189 | #define GPIO_LOOKUP(_chip_label, _chip_hwnum, _con_id, _flags) \ |
190 | GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, 0, _flags) | |
bae48da2 AC |
191 | |
192 | /* | |
193 | * Use this macro if you need to have several GPIOs under the same con_id. | |
194 | * Each GPIO needs to use a different index and can be accessed using | |
195 | * gpiod_get_index() | |
196 | */ | |
ad824783 | 197 | #define GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, _idx, _flags) \ |
bae48da2 AC |
198 | { \ |
199 | .chip_label = _chip_label, \ | |
200 | .chip_hwnum = _chip_hwnum, \ | |
bae48da2 AC |
201 | .con_id = _con_id, \ |
202 | .idx = _idx, \ | |
203 | .flags = _flags, \ | |
204 | } | |
205 | ||
ad824783 | 206 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table); |
bae48da2 | 207 | |
14250520 LW |
208 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
209 | ||
210 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, | |
211 | struct irq_chip *irqchip, | |
212 | int parent_irq, | |
213 | irq_flow_handler_t parent_handler); | |
214 | ||
215 | int gpiochip_irqchip_add(struct gpio_chip *gpiochip, | |
216 | struct irq_chip *irqchip, | |
217 | unsigned int first_irq, | |
218 | irq_flow_handler_t handler, | |
219 | unsigned int type); | |
220 | ||
221 | #endif /* CONFIG_GPIO_IRQCHIP */ | |
222 | ||
bb1e88cc AC |
223 | #else /* CONFIG_GPIOLIB */ |
224 | ||
225 | static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
226 | { | |
227 | /* GPIO can never have been requested */ | |
228 | WARN_ON(1); | |
229 | return ERR_PTR(-ENODEV); | |
230 | } | |
231 | ||
232 | #endif /* CONFIG_GPIOLIB */ | |
233 | ||
79a9becd | 234 | #endif |