[deliverable/linux.git] / include / linux / hardirq.h

#ifndef LINUX_HARDIRQ_H
#define LINUX_HARDIRQ_H

#include <linux/preempt.h>
#include <linux/smp_lock.h>
#include <linux/lockdep.h>
#include <asm/hardirq.h>
#include <asm/ftrace.h>
#include <asm/system.h>

/*
 * We put the hardirq and softirq counter into the preemption
 * counter. The bitmask has the following meaning:
 *
 * - bits 0-7 are the preemption count (max preemption depth: 256)
 * - bits 8-15 are the softirq count (max # of softirqs: 256)
 *
 * The hardirq count can be overridden per architecture, the default is:
 *
 * - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
 * - ( bit 28 is the PREEMPT_ACTIVE flag. )
 *
 * PREEMPT_MASK: 0x000000ff
 * SOFTIRQ_MASK: 0x0000ff00
 * HARDIRQ_MASK: 0x0fff0000
 */
#define PREEMPT_BITS	8
#define SOFTIRQ_BITS	8

#ifndef HARDIRQ_BITS
#define HARDIRQ_BITS	12

#ifndef MAX_HARDIRQS_PER_CPU
#define MAX_HARDIRQS_PER_CPU NR_IRQS
#endif

/*
 * The hardirq mask has to be large enough to have space for potentially
 * all IRQ sources in the system nesting on a single CPU.
 */
#if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU
# error HARDIRQ_BITS is too low!
#endif
#endif

#define PREEMPT_SHIFT	0
#define SOFTIRQ_SHIFT	(PREEMPT_SHIFT + PREEMPT_BITS)
#define HARDIRQ_SHIFT	(SOFTIRQ_SHIFT + SOFTIRQ_BITS)

#define __IRQ_MASK(x)	((1UL << (x))-1)

#define PREEMPT_MASK	(__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
#define SOFTIRQ_MASK	(__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
#define HARDIRQ_MASK	(__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)

#define PREEMPT_OFFSET	(1UL << PREEMPT_SHIFT)
#define SOFTIRQ_OFFSET	(1UL << SOFTIRQ_SHIFT)
#define HARDIRQ_OFFSET	(1UL << HARDIRQ_SHIFT)

#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
#error PREEMPT_ACTIVE is too low!
#endif

#define hardirq_count()	(preempt_count() & HARDIRQ_MASK)
#define softirq_count()	(preempt_count() & SOFTIRQ_MASK)
#define irq_count()	(preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))

/*
 * Are we doing bottom half or hardware interrupt processing?
 * Are we in a softirq context? Interrupt context?
 */
#define in_irq()		(hardirq_count())
#define in_softirq()		(softirq_count())
#define in_interrupt()		(irq_count())

#if defined(CONFIG_PREEMPT)
# define PREEMPT_INATOMIC_BASE kernel_locked()
# define PREEMPT_CHECK_OFFSET 1
#else
# define PREEMPT_INATOMIC_BASE 0
# define PREEMPT_CHECK_OFFSET 0
#endif

/*
 * Are we running in atomic context?  WARNING: this macro cannot
 * always detect atomic context; in particular, it cannot know about
 * held spinlocks in non-preemptible kernels.  Thus it should not be
 * used in the general case to determine whether sleeping is possible.
 * Do not use in_atomic() in driver code.
 */
#define in_atomic()	((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)

/*
 * Check whether we were atomic before we did preempt_disable():
 * (used by the scheduler, *after* releasing the kernel lock)
 */
#define in_atomic_preempt_off() \
		((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)

#ifdef CONFIG_PREEMPT
# define preemptible()	(preempt_count() == 0 && !irqs_disabled())
# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
#else
# define preemptible()	0
# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
#endif

#ifdef CONFIG_SMP
extern void synchronize_irq(unsigned int irq);
#else
# define synchronize_irq(irq)	barrier()
#endif

struct task_struct;

#ifndef CONFIG_VIRT_CPU_ACCOUNTING
static inline void account_system_vtime(struct task_struct *tsk)
{
}
#endif

#if defined(CONFIG_PREEMPT_RCU) && defined(CONFIG_NO_HZ)
extern void rcu_irq_enter(void);
extern void rcu_irq_exit(void);
#else
# define rcu_irq_enter() do { } while (0)
# define rcu_irq_exit() do { } while (0)
#endif /* CONFIG_PREEMPT_RCU */

/*
 * It is safe to do non-atomic ops on ->hardirq_context,
 * because NMI handlers may not preempt and the ops are
 * always balanced, so the interrupted value of ->hardirq_context
 * will always be restored.
 */
#define __irq_enter()					\
	do {						\
		rcu_irq_enter();			\
		account_system_vtime(current);		\
		add_preempt_count(HARDIRQ_OFFSET);	\
		trace_hardirq_enter();			\
	} while (0)

/*
 * Enter irq context (on NO_HZ, update jiffies):
 */
extern void irq_enter(void);

/*
 * Exit irq context without processing softirqs:
 */
#define __irq_exit()					\
	do {						\
		trace_hardirq_exit();			\
		account_system_vtime(current);		\
		sub_preempt_count(HARDIRQ_OFFSET);	\
		rcu_irq_exit();				\
	} while (0)

/*
 * Exit irq context and process softirqs if needed:
 */
extern void irq_exit(void);

#define nmi_enter()				\
	do {					\
		ftrace_nmi_enter();		\
		lockdep_off();			\
		__irq_enter();			\
	} while (0)
#define nmi_exit()				\
	do {					\
		__irq_exit();			\
		lockdep_on();			\
		ftrace_nmi_exit();		\
	} while (0)

#endif /* LINUX_HARDIRQ_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef LINUX_HARDIRQ_H
	2	#define LINUX_HARDIRQ_H
	3
67bc4eb0	4	#include <linux/preempt.h>
1da177e4	5	#include <linux/smp_lock.h>
fbb9ce95	6	#include <linux/lockdep.h>
1da177e4	7	#include <asm/hardirq.h>
17666f02	8	#include <asm/ftrace.h>
1da177e4 LT	9	#include <asm/system.h>
	10
	11	/*
	12	* We put the hardirq and softirq counter into the preemption
	13	* counter. The bitmask has the following meaning:
	14	*
	15	* - bits 0-7 are the preemption count (max preemption depth: 256)
	16	* - bits 8-15 are the softirq count (max # of softirqs: 256)
	17	*
	18	* The hardirq count can be overridden per architecture, the default is:
	19	*
	20	* - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
	21	* - ( bit 28 is the PREEMPT_ACTIVE flag. )
	22	*
	23	* PREEMPT_MASK: 0x000000ff
	24	* SOFTIRQ_MASK: 0x0000ff00
	25	* HARDIRQ_MASK: 0x0fff0000
	26	*/
	27	#define PREEMPT_BITS 8
	28	#define SOFTIRQ_BITS 8
	29
	30	#ifndef HARDIRQ_BITS
	31	#define HARDIRQ_BITS 12
23d0b8b0 EB	32
	33	#ifndef MAX_HARDIRQS_PER_CPU
	34	#define MAX_HARDIRQS_PER_CPU NR_IRQS
	35	#endif
	36
1da177e4 LT	37	/*
	38	* The hardirq mask has to be large enough to have space for potentially
	39	* all IRQ sources in the system nesting on a single CPU.
	40	*/
23d0b8b0	41	#if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU
1da177e4 LT	42	# error HARDIRQ_BITS is too low!
	43	#endif
	44	#endif
	45
	46	#define PREEMPT_SHIFT 0
	47	#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
	48	#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
	49
	50	#define __IRQ_MASK(x) ((1UL << (x))-1)
	51
	52	#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
1da177e4	53	#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
8f28e8fa	54	#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
1da177e4 LT	55
	56	#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
	57	#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
	58	#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
	59
8f28e8fa PBG	60	#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
	61	#error PREEMPT_ACTIVE is too low!
	62	#endif
	63
1da177e4 LT	64	#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
	65	#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
	66	#define irq_count() (preempt_count() & (HARDIRQ_MASK \| SOFTIRQ_MASK))
	67
	68	/*
	69	* Are we doing bottom half or hardware interrupt processing?
	70	* Are we in a softirq context? Interrupt context?
	71	*/
	72	#define in_irq() (hardirq_count())
	73	#define in_softirq() (softirq_count())
	74	#define in_interrupt() (irq_count())
	75
8e3e076c LT	76	#if defined(CONFIG_PREEMPT)
	77	# define PREEMPT_INATOMIC_BASE kernel_locked()
	78	# define PREEMPT_CHECK_OFFSET 1
	79	#else
	80	# define PREEMPT_INATOMIC_BASE 0
	81	# define PREEMPT_CHECK_OFFSET 0
	82	#endif
	83
8c703d35 JC	84	/*
	85	* Are we running in atomic context? WARNING: this macro cannot
	86	* always detect atomic context; in particular, it cannot know about
	87	* held spinlocks in non-preemptible kernels. Thus it should not be
	88	* used in the general case to determine whether sleeping is possible.
	89	* Do not use in_atomic() in driver code.
	90	*/
8e3e076c	91	#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
4da1ce6d IM	92
	93	/*
	94	* Check whether we were atomic before we did preempt_disable():
8e3e076c	95	* (used by the scheduler, after releasing the kernel lock)
4da1ce6d IM	96	*/
	97	#define in_atomic_preempt_off() \
	98	((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
	99
1da177e4 LT	100	#ifdef CONFIG_PREEMPT
	101	# define preemptible() (preempt_count() == 0 && !irqs_disabled())
	102	# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
	103	#else
	104	# define preemptible() 0
	105	# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
	106	#endif
	107
	108	#ifdef CONFIG_SMP
	109	extern void synchronize_irq(unsigned int irq);
	110	#else
	111	# define synchronize_irq(irq) barrier()
	112	#endif
	113
f037360f AV	114	struct task_struct;
f037360f AV	115
1da177e4	116	#ifndef CONFIG_VIRT_CPU_ACCOUNTING
1da177e4 LT	117	static inline void account_system_vtime(struct task_struct *tsk)
	118	{
	119	}
	120	#endif
	121
2232c2d8 SR	122	#if defined(CONFIG_PREEMPT_RCU) && defined(CONFIG_NO_HZ)
	123	extern void rcu_irq_enter(void);
	124	extern void rcu_irq_exit(void);
	125	#else
	126	# define rcu_irq_enter() do { } while (0)
	127	# define rcu_irq_exit() do { } while (0)
	128	#endif /* CONFIG_PREEMPT_RCU */
	129
de30a2b3 IM	130	/*
	131	* It is safe to do non-atomic ops on ->hardirq_context,
	132	* because NMI handlers may not preempt and the ops are
	133	* always balanced, so the interrupted value of ->hardirq_context
	134	* will always be restored.
	135	*/
79bf2bb3 TG	136	#define __irq_enter() \
79bf2bb3 TG	137	do { \
2232c2d8	138	rcu_irq_enter(); \
79bf2bb3 TG	139	account_system_vtime(current); \
	140	add_preempt_count(HARDIRQ_OFFSET); \
	141	trace_hardirq_enter(); \
	142	} while (0)
	143
	144	/*
	145	* Enter irq context (on NO_HZ, update jiffies):
	146	*/
dde4b2b5	147	extern void irq_enter(void);
de30a2b3 IM	148
	149	/*
	150	* Exit irq context without processing softirqs:
	151	*/
	152	#define __irq_exit() \
	153	do { \
	154	trace_hardirq_exit(); \
	155	account_system_vtime(current); \
	156	sub_preempt_count(HARDIRQ_OFFSET); \
2232c2d8	157	rcu_irq_exit(); \
1da177e4 LT	158	} while (0)
1da177e4 LT	159
de30a2b3 IM	160	/*
	161	* Exit irq context and process softirqs if needed:
	162	*/
1da177e4 LT	163	extern void irq_exit(void);
1da177e4 LT	164
17666f02 SR	165	#define nmi_enter() \
	166	do { \
	167	ftrace_nmi_enter(); \
	168	lockdep_off(); \
	169	__irq_enter(); \
	170	} while (0)
	171	#define nmi_exit() \
	172	do { \
	173	__irq_exit(); \
	174	lockdep_on(); \
	175	ftrace_nmi_exit(); \
	176	} while (0)
de30a2b3	177
1da177e4	178	#endif /* LINUX_HARDIRQ_H */