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b652b438 RK |
1 | /* |
2 | * i2c_pxa.h | |
3 | * | |
4 | * Copyright (C) 2002 Intrinsyc Software Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | #ifndef _I2C_PXA_H_ | |
12 | #define _I2C_PXA_H_ | |
13 | ||
14 | #if 0 | |
15 | #define DEF_TIMEOUT 3 | |
16 | #else | |
17 | /* need a longer timeout if we're dealing with the fact we may well be | |
18 | * looking at a multi-master environment | |
19 | */ | |
20 | #define DEF_TIMEOUT 32 | |
21 | #endif | |
22 | ||
23 | #define BUS_ERROR (-EREMOTEIO) | |
24 | #define XFER_NAKED (-ECONNREFUSED) | |
25 | #define I2C_RETRY (-2000) /* an error has occurred retry transmit */ | |
26 | ||
27 | /* ICR initialize bit values | |
28 | * | |
29 | * 15. FM 0 (100 Khz operation) | |
30 | * 14. UR 0 (No unit reset) | |
31 | * 13. SADIE 0 (Disables the unit from interrupting on slave addresses | |
32 | * matching its slave address) | |
33 | * 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration | |
34 | * in master mode) | |
35 | * 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) | |
36 | * 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) | |
37 | * 9. IRFIE 1 (Enable interrupts from full buffer received) | |
38 | * 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) | |
39 | * 7. GCD 1 (Disables i2c unit response to general call messages as a slave) | |
40 | * 6. IUE 0 (Disable unit until we change settings) | |
41 | * 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) | |
42 | * 4. MA 0 (Only send stop with the ICR stop bit) | |
43 | * 3. TB 0 (We are not transmitting a byte initially) | |
44 | * 2. ACKNAK 0 (Send an ACK after the unit receives a byte) | |
45 | * 1. STOP 0 (Do not send a STOP) | |
46 | * 0. START 0 (Do not send a START) | |
47 | * | |
48 | */ | |
49 | #define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) | |
50 | ||
51 | /* I2C status register init values | |
52 | * | |
53 | * 10. BED 1 (Clear bus error detected) | |
54 | * 9. SAD 1 (Clear slave address detected) | |
55 | * 7. IRF 1 (Clear IDBR Receive Full) | |
56 | * 6. ITE 1 (Clear IDBR Transmit Empty) | |
57 | * 5. ALD 1 (Clear Arbitration Loss Detected) | |
58 | * 4. SSD 1 (Clear Slave Stop Detected) | |
59 | */ | |
60 | #define I2C_ISR_INIT 0x7FF /* status register init */ | |
61 | ||
62 | struct i2c_slave_client; | |
63 | ||
64 | struct i2c_pxa_platform_data { | |
65 | unsigned int slave_addr; | |
66 | struct i2c_slave_client *slave; | |
a79220b7 | 67 | unsigned int class; |
c46c9482 JC |
68 | unsigned int use_pio :1; |
69 | unsigned int fast_mode :1; | |
9d3dda5c LS |
70 | unsigned int high_mode:1; |
71 | unsigned char master_code; | |
72 | unsigned long rate; | |
b652b438 RK |
73 | }; |
74 | ||
75 | extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); | |
b7a36701 MR |
76 | |
77 | #ifdef CONFIG_PXA27x | |
9ba63c4f MR |
78 | extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); |
79 | #endif | |
80 | ||
81 | #ifdef CONFIG_PXA3xx | |
82 | extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); | |
b7a36701 MR |
83 | #endif |
84 | ||
b652b438 | 85 | #endif |