ide: remove ->dma_master field from ide_hwif_t (take 5)
[deliverable/linux.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
12#include <linux/hdsmart.h>
13#include <linux/blkdev.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/device.h>
19#include <linux/pci.h>
f36d4024 20#include <linux/completion.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/semaphore.h>
f9383c42 28#include <asm/mutex.h>
1da177e4 29
1da177e4
LT
30/******************************************************************************
31 * IDE driver configuration options (play with these as desired):
32 *
33 * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
34 */
35#define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
36
37#ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
38#define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
39#endif
40#ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
41#define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
42#endif
43#ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
44#define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
45#endif
46
47#ifndef DISABLE_IRQ_NOSYNC
48#define DISABLE_IRQ_NOSYNC 0
49#endif
50
51/*
52 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
53 * number.
54 */
55
56#define IDE_NO_IRQ (-1)
57
58/*
59 * "No user-serviceable parts" beyond this point :)
60 *****************************************************************************/
61
62typedef unsigned char byte; /* used everywhere */
63
64/*
65 * Probably not wise to fiddle with these
66 */
67#define ERROR_MAX 8 /* Max read/write errors per sector */
68#define ERROR_RESET 3 /* Reset controller every 4th retry */
69#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
70
71/*
72 * Tune flags
73 */
74#define IDE_TUNE_NOAUTO 2
75#define IDE_TUNE_AUTO 1
76#define IDE_TUNE_DEFAULT 0
77
78/*
79 * state flags
80 */
81
82#define DMA_PIO_RETRY 1 /* retrying in PIO */
83
84#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
85#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
86
87/*
88 * Definitions for accessing IDE controller registers
89 */
90#define IDE_NR_PORTS (10)
91
92#define IDE_DATA_OFFSET (0)
93#define IDE_ERROR_OFFSET (1)
94#define IDE_NSECTOR_OFFSET (2)
95#define IDE_SECTOR_OFFSET (3)
96#define IDE_LCYL_OFFSET (4)
97#define IDE_HCYL_OFFSET (5)
98#define IDE_SELECT_OFFSET (6)
99#define IDE_STATUS_OFFSET (7)
100#define IDE_CONTROL_OFFSET (8)
101#define IDE_IRQ_OFFSET (9)
102
103#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
104#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
105
106#define IDE_CONTROL_OFFSET_HOB (7)
107
108#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
109#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
110#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
111#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
112#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
113#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
114#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
115#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
116#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
117#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
118
119#define IDE_FEATURE_REG IDE_ERROR_REG
120#define IDE_COMMAND_REG IDE_STATUS_REG
121#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
122#define IDE_IREASON_REG IDE_NSECTOR_REG
123#define IDE_BCOUNTL_REG IDE_LCYL_REG
124#define IDE_BCOUNTH_REG IDE_HCYL_REG
125
126#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
127#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
128#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
129#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
130#define DRIVE_READY (READY_STAT | SEEK_STAT)
131#define DATA_READY (DRQ_STAT)
132
133#define BAD_CRC (ABRT_ERR | ICRC_ERR)
134
135#define SATA_NR_PORTS (3) /* 16 possible ?? */
136
137#define SATA_STATUS_OFFSET (0)
138#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
139#define SATA_ERROR_OFFSET (1)
140#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
141#define SATA_CONTROL_OFFSET (2)
142#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
143
144#define SATA_MISC_OFFSET (0)
145#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
146#define SATA_PHY_OFFSET (1)
147#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
148#define SATA_IEN_OFFSET (2)
149#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
150
151/*
152 * Our Physical Region Descriptor (PRD) table should be large enough
153 * to handle the biggest I/O request we are likely to see. Since requests
154 * can have no more than 256 sectors, and since the typical blocksize is
155 * two or more sectors, we could get by with a limit of 128 entries here for
156 * the usual worst case. Most requests seem to include some contiguous blocks,
157 * further reducing the number of table entries required.
158 *
159 * The driver reverts to PIO mode for individual requests that exceed
160 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
161 * 100% of all crazy scenarios here is not necessary.
162 *
163 * As it turns out though, we must allocate a full 4KB page for this,
164 * so the two PRD tables (ide0 & ide1) will each get half of that,
165 * allowing each to have about 256 entries (8 bytes each) from this.
166 */
167#define PRD_BYTES 8
168#define PRD_ENTRIES 256
169
170/*
171 * Some more useful definitions
172 */
173#define PARTN_BITS 6 /* number of minor dev bits for partitions */
174#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
175#define SECTOR_SIZE 512
176#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
177#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
178
179/*
180 * Timeouts for various operations:
181 */
182#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
183#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
184#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
185#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
186#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
187#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
188
1da177e4
LT
189/*
190 * Check for an interrupt and acknowledge the interrupt status
191 */
192struct hwif_s;
193typedef int (ide_ack_intr_t)(struct hwif_s *);
194
1da177e4
LT
195/*
196 * hwif_chipset_t is used to keep track of the specific hardware
197 * chipset used by each IDE interface, if known.
198 */
528a572d 199enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
200 ide_cmd640, ide_dtc2278, ide_ali14xx,
201 ide_qd65xx, ide_umc8672, ide_ht6560b,
202 ide_rz1000, ide_trm290,
203 ide_cmd646, ide_cy82c693, ide_4drives,
204 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 205 ide_au1xxx, ide_forced
528a572d
BZ
206};
207
208typedef u8 hwif_chipset_t;
1da177e4
LT
209
210/*
211 * Structure to hold all information about the location of this port
212 */
213typedef struct hw_regs_s {
214 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
215 int irq; /* our irq number */
1da177e4
LT
216 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
217 hwif_chipset_t chipset;
4349d5cd 218 struct device *dev;
1da177e4
LT
219} hw_regs_t;
220
baa8f3e9
BZ
221struct hwif_s * ide_find_port(unsigned long);
222
fd9bb539
BZ
223int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
224 struct hwif_s **);
1da177e4 225
1da177e4
LT
226void ide_setup_ports( hw_regs_t *hw,
227 unsigned long base,
228 int *offsets,
229 unsigned long ctrl,
230 unsigned long intr,
231 ide_ack_intr_t *ack_intr,
232#if 0
233 ide_io_ops_t *iops,
234#endif
235 int irq);
236
237static inline void ide_std_init_ports(hw_regs_t *hw,
238 unsigned long io_addr,
239 unsigned long ctl_addr)
240{
241 unsigned int i;
242
243 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
244 hw->io_ports[i] = io_addr++;
245
246 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
247}
248
249#include <asm/ide.h>
250
83d7dbc4
MM
251#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
252#undef MAX_HWIFS
83ae20c8
BH
253#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
254#endif
255
1da177e4
LT
256/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
257#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
258# define ide_default_io_base(index) (0)
259# define ide_default_irq(base) (0)
260# define ide_init_default_irq(base) (0)
261#endif
262
847ddd2b 263#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT
264static inline void ide_init_hwif_ports(hw_regs_t *hw,
265 unsigned long io_addr,
266 unsigned long ctl_addr,
267 int *irq)
268{
269 if (!ctl_addr)
270 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
271 else
272 ide_std_init_ports(hw, io_addr, ctl_addr);
273
274 if (irq)
275 *irq = 0;
276
277 hw->io_ports[IDE_IRQ_OFFSET] = 0;
278
279#ifdef CONFIG_PPC32
280 if (ppc_ide_md.ide_init_hwif)
281 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
282#endif
283}
284#else
285static inline void ide_init_hwif_ports(hw_regs_t *hw,
286 unsigned long io_addr,
287 unsigned long ctl_addr,
288 int *irq)
289{
290 if (io_addr || ctl_addr)
291 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
292}
847ddd2b 293#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT
294
295/* Currently only m68k, apus and m8xx need it */
296#ifndef IDE_ARCH_ACK_INTR
297# define ide_ack_intr(hwif) (1)
298#endif
299
300/* Currently only Atari needs it */
301#ifndef IDE_ARCH_LOCK
302# define ide_release_lock() do {} while (0)
303# define ide_get_lock(hdlr, data) do {} while (0)
304#endif /* IDE_ARCH_LOCK */
305
306/*
307 * Now for the data we need to maintain per-drive: ide_drive_t
308 */
309
310#define ide_scsi 0x21
311#define ide_disk 0x20
312#define ide_optical 0x7
313#define ide_cdrom 0x5
314#define ide_tape 0x1
315#define ide_floppy 0x0
316
317/*
318 * Special Driver Flags
319 *
320 * set_geometry : respecify drive geometry
321 * recalibrate : seek to cyl 0
322 * set_multmode : set multmode count
323 * set_tune : tune interface for drive
324 * serviced : service command
325 * reserved : unused
326 */
327typedef union {
328 unsigned all : 8;
329 struct {
330#if defined(__LITTLE_ENDIAN_BITFIELD)
331 unsigned set_geometry : 1;
332 unsigned recalibrate : 1;
333 unsigned set_multmode : 1;
334 unsigned set_tune : 1;
335 unsigned serviced : 1;
336 unsigned reserved : 3;
337#elif defined(__BIG_ENDIAN_BITFIELD)
338 unsigned reserved : 3;
339 unsigned serviced : 1;
340 unsigned set_tune : 1;
341 unsigned set_multmode : 1;
342 unsigned recalibrate : 1;
343 unsigned set_geometry : 1;
344#else
345#error "Please fix <asm/byteorder.h>"
346#endif
347 } b;
348} special_t;
349
350/*
351 * ATA DATA Register Special.
352 * ATA NSECTOR Count Register().
353 * ATAPI Byte Count Register.
1da177e4
LT
354 */
355typedef union {
356 unsigned all :16;
357 struct {
358#if defined(__LITTLE_ENDIAN_BITFIELD)
359 unsigned low :8; /* LSB */
360 unsigned high :8; /* MSB */
361#elif defined(__BIG_ENDIAN_BITFIELD)
362 unsigned high :8; /* MSB */
363 unsigned low :8; /* LSB */
364#else
365#error "Please fix <asm/byteorder.h>"
366#endif
367 } b;
8447d9d5 368} ata_nsector_t, ata_data_t, atapi_bcount_t;
1da177e4 369
1da177e4
LT
370/*
371 * ATA-IDE Select Register, aka Device-Head
372 *
373 * head : always zeros here
374 * unit : drive select number: 0/1
375 * bit5 : always 1
376 * lba : using LBA instead of CHS
377 * bit7 : always 1
378 */
379typedef union {
380 unsigned all : 8;
381 struct {
382#if defined(__LITTLE_ENDIAN_BITFIELD)
383 unsigned head : 4;
384 unsigned unit : 1;
385 unsigned bit5 : 1;
386 unsigned lba : 1;
387 unsigned bit7 : 1;
388#elif defined(__BIG_ENDIAN_BITFIELD)
389 unsigned bit7 : 1;
390 unsigned lba : 1;
391 unsigned bit5 : 1;
392 unsigned unit : 1;
393 unsigned head : 4;
394#else
395#error "Please fix <asm/byteorder.h>"
396#endif
397 } b;
398} select_t, ata_select_t;
399
400/*
401 * The ATA-IDE Status Register.
402 * The ATAPI Status Register.
403 *
404 * check : Error occurred
405 * idx : Index Error
406 * corr : Correctable error occurred
407 * drq : Data is request by the device
408 * dsc : Disk Seek Complete : ata
409 * : Media access command finished : atapi
410 * df : Device Fault : ata
411 * : Reserved : atapi
412 * drdy : Ready, Command Mode Capable : ata
413 * : Ignored for ATAPI commands : atapi
414 * bsy : Disk is Busy
415 * : The device has access to the command block
416 */
417typedef union {
418 unsigned all :8;
419 struct {
420#if defined(__LITTLE_ENDIAN_BITFIELD)
421 unsigned check :1;
422 unsigned idx :1;
423 unsigned corr :1;
424 unsigned drq :1;
425 unsigned dsc :1;
426 unsigned df :1;
427 unsigned drdy :1;
428 unsigned bsy :1;
429#elif defined(__BIG_ENDIAN_BITFIELD)
430 unsigned bsy :1;
431 unsigned drdy :1;
432 unsigned df :1;
433 unsigned dsc :1;
434 unsigned drq :1;
435 unsigned corr :1;
436 unsigned idx :1;
437 unsigned check :1;
438#else
439#error "Please fix <asm/byteorder.h>"
440#endif
441 } b;
442} ata_status_t, atapi_status_t;
443
1da177e4
LT
444/*
445 * ATAPI Feature Register
446 *
447 * dma : Using DMA or PIO
448 * reserved321 : Reserved
449 * reserved654 : Reserved (Tag Type)
450 * reserved7 : Reserved
451 */
452typedef union {
453 unsigned all :8;
454 struct {
455#if defined(__LITTLE_ENDIAN_BITFIELD)
456 unsigned dma :1;
457 unsigned reserved321 :3;
458 unsigned reserved654 :3;
459 unsigned reserved7 :1;
460#elif defined(__BIG_ENDIAN_BITFIELD)
461 unsigned reserved7 :1;
462 unsigned reserved654 :3;
463 unsigned reserved321 :3;
464 unsigned dma :1;
465#else
466#error "Please fix <asm/byteorder.h>"
467#endif
468 } b;
469} atapi_feature_t;
470
471/*
472 * ATAPI Interrupt Reason Register.
473 *
474 * cod : Information transferred is command (1) or data (0)
475 * io : The device requests us to read (1) or write (0)
476 * reserved : Reserved
477 */
478typedef union {
479 unsigned all :8;
480 struct {
481#if defined(__LITTLE_ENDIAN_BITFIELD)
482 unsigned cod :1;
483 unsigned io :1;
484 unsigned reserved :6;
485#elif defined(__BIG_ENDIAN_BITFIELD)
486 unsigned reserved :6;
487 unsigned io :1;
488 unsigned cod :1;
489#else
490#error "Please fix <asm/byteorder.h>"
491#endif
492 } b;
493} atapi_ireason_t;
494
495/*
496 * The ATAPI error register.
497 *
498 * ili : Illegal Length Indication
499 * eom : End Of Media Detected
500 * abrt : Aborted command - As defined by ATA
501 * mcr : Media Change Requested - As defined by ATA
502 * sense_key : Sense key of the last failed packet command
503 */
504typedef union {
505 unsigned all :8;
506 struct {
507#if defined(__LITTLE_ENDIAN_BITFIELD)
508 unsigned ili :1;
509 unsigned eom :1;
510 unsigned abrt :1;
511 unsigned mcr :1;
512 unsigned sense_key :4;
513#elif defined(__BIG_ENDIAN_BITFIELD)
514 unsigned sense_key :4;
515 unsigned mcr :1;
516 unsigned abrt :1;
517 unsigned eom :1;
518 unsigned ili :1;
519#else
520#error "Please fix <asm/byteorder.h>"
521#endif
522 } b;
523} atapi_error_t;
524
1da177e4
LT
525/*
526 * Status returned from various ide_ functions
527 */
528typedef enum {
529 ide_stopped, /* no drive operation was started */
530 ide_started, /* a drive operation was started, handler was set */
531} ide_startstop_t;
532
533struct ide_driver_s;
534struct ide_settings_s;
535
e3a59b4d
HR
536#ifdef CONFIG_BLK_DEV_IDEACPI
537struct ide_acpi_drive_link;
538struct ide_acpi_hwif_link;
539#endif
540
1da177e4
LT
541typedef struct ide_drive_s {
542 char name[4]; /* drive name, such as "hda" */
543 char driver_req[10]; /* requests specific driver */
544
165125e1 545 struct request_queue *queue; /* request queue */
1da177e4
LT
546
547 struct request *rq; /* current request */
548 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
549 void *driver_data; /* extra driver data */
550 struct hd_driveid *id; /* drive model identification info */
7662d046 551#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
552 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
553 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 554#endif
1da177e4
LT
555 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
556
557 unsigned long sleep; /* sleep until this time */
558 unsigned long service_start; /* time we started last request */
559 unsigned long service_time; /* service time of last request */
560 unsigned long timeout; /* max time to wait for irq */
561
562 special_t special; /* special action flags */
563 select_t select; /* basic drive/head select reg value */
564
565 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
566 u8 using_dma; /* disk is using dma for read/write */
567 u8 retry_pio; /* retrying dma capable host in pio */
568 u8 state; /* retry state */
569 u8 waiting_for_dma; /* dma currently in progress */
570 u8 unmask; /* okay to unmask other irqs */
571 u8 bswap; /* byte swap data */
36193484 572 u8 noflush; /* don't attempt flushes */
1da177e4
LT
573 u8 dsc_overlap; /* DSC overlap */
574 u8 nice1; /* give potential excess bandwidth */
575
576 unsigned present : 1; /* drive is physically present */
577 unsigned dead : 1; /* device ejected hint */
578 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
579 unsigned noprobe : 1; /* from: hdx=noprobe */
580 unsigned removable : 1; /* 1 if need to do check_media_change */
581 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
582 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
583 unsigned no_unmask : 1; /* disallow setting unmask bit */
584 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
585 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
586 unsigned nice0 : 1; /* give obvious excess bandwidth */
587 unsigned nice2 : 1; /* give a share in our own bandwidth */
588 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 589 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
590 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
591 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
592 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
593 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
594 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
595 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
596 unsigned post_reset : 1;
7f8f48af 597 unsigned udma33_warned : 1;
1da177e4 598
1497943e 599 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
600 u8 quirk_list; /* considered quirky, set for a specific host */
601 u8 init_speed; /* transfer rate set at boot */
1da177e4 602 u8 current_speed; /* current transfer rate set */
513daadd 603 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
604 u8 dn; /* now wide spread use */
605 u8 wcache; /* status of write cache */
606 u8 acoustic; /* acoustic management */
607 u8 media; /* disk, cdrom, tape, floppy, ... */
608 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
609 u8 ready_stat; /* min status value for drive ready */
610 u8 mult_count; /* current multiple sector setting */
611 u8 mult_req; /* requested multiple sector setting */
612 u8 tune_req; /* requested drive tuning setting */
613 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
614 u8 bad_wstat; /* used for ignoring WRERR_STAT */
615 u8 nowerr; /* used for ignoring WRERR_STAT */
616 u8 sect0; /* offset of first sector for DM6:DDO */
617 u8 head; /* "real" number of heads */
618 u8 sect; /* "real" sectors per track */
619 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
620 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
621
622 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
623 unsigned int cyl; /* "real" number of cyls */
26bcb879 624 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
625 unsigned int failures; /* current failure count */
626 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 627 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
628
629 u64 capacity64; /* total number of sectors */
630
631 int lun; /* logical unit */
632 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
633#ifdef CONFIG_BLK_DEV_IDEACPI
634 struct ide_acpi_drive_link *acpidata;
635#endif
1da177e4
LT
636 struct list_head list;
637 struct device gendev;
f36d4024 638 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
639} ide_drive_t;
640
8604affd
BZ
641#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
642
1da177e4
LT
643#define IDE_CHIPSET_PCI_MASK \
644 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
645#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
646
039788e1 647struct ide_port_info;
1da177e4
LT
648
649typedef struct hwif_s {
650 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
651 struct hwif_s *mate; /* other hwif from same PCI chip */
652 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
653 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
654
655 char name[6]; /* name of interface, eg. "ide0" */
656
657 /* task file registers for pata and sata */
658 unsigned long io_ports[IDE_NR_PORTS];
659 unsigned long sata_scr[SATA_NR_PORTS];
660 unsigned long sata_misc[SATA_NR_PORTS];
661
1da177e4
LT
662 ide_drive_t drives[MAX_DRIVES]; /* drive info */
663
664 u8 major; /* our major number */
665 u8 index; /* 0 for ide0; 1 for ide1; ... */
666 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
667 u8 straight8; /* Alan's straight 8 check */
668 u8 bus_state; /* power state of the IDE bus */
669
e95d9c6b 670 u32 host_flags;
6a824c92 671
4099d143
BZ
672 u8 pio_mask;
673
1da177e4
LT
674 u8 ultra_mask;
675 u8 mwdma_mask;
676 u8 swdma_mask;
677
49521f97
BZ
678 u8 cbl; /* cable type */
679
1da177e4
LT
680 hwif_chipset_t chipset; /* sub-module for tuning.. */
681
682 struct pci_dev *pci_dev; /* for pci chipsets */
85620436 683 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 684
18e181fe
BZ
685 ide_ack_intr_t *ack_intr;
686
1da177e4
LT
687 void (*rw_disk)(ide_drive_t *, struct request *);
688
689#if 0
690 ide_hwif_ops_t *hwifops;
691#else
88b2b32b 692 /* routine to program host for PIO mode */
26bcb879 693 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ
694 /* routine to program host for DMA mode */
695 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT
696 /* tweaks hardware to select drive */
697 void (*selectproc)(ide_drive_t *);
698 /* chipset polling based on hba specifics */
699 int (*reset_poll)(ide_drive_t *);
700 /* chipset specific changes to default for device-hba resets */
701 void (*pre_reset)(ide_drive_t *);
702 /* routine to reset controller after a disk reset */
703 void (*resetproc)(ide_drive_t *);
704 /* special interrupt handling for shared pci interrupts */
705 void (*intrproc)(ide_drive_t *);
706 /* special host masking for drive selection */
707 void (*maskproc)(ide_drive_t *, int);
708 /* check host's drive quirk list */
709 int (*quirkproc)(ide_drive_t *);
710 /* driver soft-power interface */
711 int (*busproc)(ide_drive_t *, int);
1da177e4 712#endif
b4e44369 713 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 714 u8 (*udma_filter)(ide_drive_t *);
1da177e4 715
fd9bb539
BZ
716 void (*fixup)(struct hwif_s *);
717
1da177e4
LT
718 void (*ata_input_data)(ide_drive_t *, void *, u32);
719 void (*ata_output_data)(ide_drive_t *, void *, u32);
720
721 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
722 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
723
724 int (*dma_setup)(ide_drive_t *);
725 void (*dma_exec_cmd)(ide_drive_t *, u8);
726 void (*dma_start)(ide_drive_t *);
727 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 728 int (*ide_dma_on)(ide_drive_t *drive);
7469aaf6 729 void (*dma_off_quietly)(ide_drive_t *drive);
1da177e4 730 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 731 void (*ide_dma_clear_irq)(ide_drive_t *drive);
ccf35289 732 void (*dma_host_on)(ide_drive_t *drive);
7469aaf6 733 void (*dma_host_off)(ide_drive_t *drive);
841d2a9b 734 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 735 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT
736
737 void (*OUTB)(u8 addr, unsigned long port);
738 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
739 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
740 void (*OUTSW)(unsigned long port, void *addr, u32 count);
741 void (*OUTSL)(unsigned long port, void *addr, u32 count);
742
743 u8 (*INB)(unsigned long port);
744 u16 (*INW)(unsigned long port);
1da177e4
LT
745 void (*INSW)(unsigned long port, void *addr, u32 count);
746 void (*INSL)(unsigned long port, void *addr, u32 count);
747
748 /* dma physical region descriptor table (cpu view) */
749 unsigned int *dmatable_cpu;
750 /* dma physical region descriptor table (dma view) */
751 dma_addr_t dmatable_dma;
752 /* Scatter-gather list used to build the above */
753 struct scatterlist *sg_table;
754 int sg_max_nents; /* Maximum number of entries in it */
755 int sg_nents; /* Current number of entries in it */
756 int sg_dma_direction; /* dma transfer direction */
757
758 /* data phase of the active command (currently only valid for PIO/DMA) */
759 int data_phase;
760
761 unsigned int nsect;
762 unsigned int nleft;
55c16a70 763 struct scatterlist *cursg;
1da177e4
LT
764 unsigned int cursg_ofs;
765
1da177e4
LT
766 int rqsize; /* max sectors per request */
767 int irq; /* our irq number */
768
1da177e4
LT
769 unsigned long dma_base; /* base addr for dma ports */
770 unsigned long dma_command; /* dma command register */
771 unsigned long dma_vendor1; /* dma vendor 1 register */
772 unsigned long dma_status; /* dma status register */
773 unsigned long dma_vendor3; /* dma vendor 3 register */
774 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 775
1da177e4
LT
776 unsigned long config_data; /* for use by chipset-specific code */
777 unsigned long select_data; /* for use by chipset-specific code */
778
020e322d
SS
779 unsigned long extra_base; /* extra addr for dma ports */
780 unsigned extra_ports; /* number of extra dma ports */
781
1da177e4
LT
782 unsigned noprobe : 1; /* don't probe for this interface */
783 unsigned present : 1; /* this interface exists */
784 unsigned hold : 1; /* this interface is always present */
785 unsigned serialized : 1; /* serialized all channel operation */
786 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
787 unsigned reset : 1; /* reset after probe */
1da177e4
LT
788 unsigned auto_poll : 1; /* supports nop auto-poll */
789 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
208a08f7 790 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
2ad1e558 791 unsigned mmio : 1; /* host uses MMIO */
1da177e4
LT
792
793 struct device gendev;
f36d4024 794 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
795
796 void *hwif_data; /* extra hwif data */
797
798 unsigned dma;
e3a59b4d
HR
799
800#ifdef CONFIG_BLK_DEV_IDEACPI
801 struct ide_acpi_hwif_link *acpidata;
802#endif
22fc6ecc 803} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
804
805/*
806 * internal ide interrupt handler type
807 */
808typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
809typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
810typedef int (ide_expiry_t)(ide_drive_t *);
811
812typedef struct hwgroup_s {
813 /* irq handler, if active */
814 ide_startstop_t (*handler)(ide_drive_t *);
815 /* irq handler, suspended if active */
816 ide_startstop_t (*handler_save)(ide_drive_t *);
817 /* BOOL: protects all fields below */
818 volatile int busy;
819 /* BOOL: wake us up on timer expiry */
820 unsigned int sleeping : 1;
821 /* BOOL: polling active & poll_timeout field valid */
822 unsigned int polling : 1;
913759ac
AC
823 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
824 unsigned int resetting : 1;
825
1da177e4
LT
826 /* current drive */
827 ide_drive_t *drive;
828 /* ptr to current hwif in linked-list */
829 ide_hwif_t *hwif;
830
831 /* for pci chipsets */
832 struct pci_dev *pci_dev;
1da177e4
LT
833
834 /* current request */
835 struct request *rq;
836 /* failsafe timer */
837 struct timer_list timer;
838 /* local copy of current write rq */
839 struct request wrq;
840 /* timeout value during long polls */
841 unsigned long poll_timeout;
842 /* queried upon timeouts */
843 int (*expiry)(ide_drive_t *);
844 /* ide_system_bus_speed */
845 int pio_clock;
23450319
SS
846 int req_gen;
847 int req_gen_timer;
1da177e4
LT
848
849 unsigned char cmd_buf[4];
850} ide_hwgroup_t;
851
7662d046
BZ
852typedef struct ide_driver_s ide_driver_t;
853
f9383c42 854extern struct mutex ide_setting_mtx;
1da177e4 855
7662d046
BZ
856int set_io_32bit(ide_drive_t *, int);
857int set_pio_mode(ide_drive_t *, int);
858int set_using_dma(ide_drive_t *, int);
859
860#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
861/*
862 * configurable drive settings
863 */
864
865#define TYPE_INT 0
1497943e
BZ
866#define TYPE_BYTE 1
867#define TYPE_SHORT 2
1da177e4
LT
868
869#define SETTING_READ (1 << 0)
870#define SETTING_WRITE (1 << 1)
871#define SETTING_RW (SETTING_READ | SETTING_WRITE)
872
873typedef int (ide_procset_t)(ide_drive_t *, int);
874typedef struct ide_settings_s {
875 char *name;
876 int rw;
1da177e4
LT
877 int data_type;
878 int min;
879 int max;
880 int mul_factor;
881 int div_factor;
882 void *data;
883 ide_procset_t *set;
884 int auto_remove;
885 struct ide_settings_s *next;
886} ide_settings_t;
887
1497943e 888int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
889
890/*
891 * /proc/ide interface
892 */
893typedef struct {
894 const char *name;
895 mode_t mode;
896 read_proc_t *read_proc;
897 write_proc_t *write_proc;
898} ide_proc_entry_t;
899
ecfd80e4
BZ
900void proc_ide_create(void);
901void proc_ide_destroy(void);
5cbf79cd
BZ
902void ide_proc_register_port(ide_hwif_t *);
903void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
904void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
905void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
906
907void ide_add_generic_settings(ide_drive_t *);
908
1da177e4
LT
909read_proc_t proc_ide_read_capacity;
910read_proc_t proc_ide_read_geometry;
911
912#ifdef CONFIG_BLK_DEV_IDEPCI
913void ide_pci_create_host_proc(const char *, get_info_t *);
914#endif
915
916/*
917 * Standard exit stuff:
918 */
919#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
920{ \
921 len -= off; \
922 if (len < count) { \
923 *eof = 1; \
924 if (len <= 0) \
925 return 0; \
926 } else \
927 len = count; \
928 *start = page + off; \
929 return len; \
930}
931#else
ecfd80e4
BZ
932static inline void proc_ide_create(void) { ; }
933static inline void proc_ide_destroy(void) { ; }
5cbf79cd
BZ
934static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
935static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
936static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
937static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
938static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
939#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
940#endif
941
942/*
943 * Power Management step value (rq->pm->pm_step).
944 *
945 * The step value starts at 0 (ide_pm_state_start_suspend) for a
946 * suspend operation or 1000 (ide_pm_state_start_resume) for a
947 * resume operation.
948 *
949 * For each step, the core calls the subdriver start_power_step() first.
950 * This can return:
951 * - ide_stopped : In this case, the core calls us back again unless
952 * step have been set to ide_power_state_completed.
953 * - ide_started : In this case, the channel is left busy until an
954 * async event (interrupt) occurs.
955 * Typically, start_power_step() will issue a taskfile request with
956 * do_rw_taskfile().
957 *
958 * Upon reception of the interrupt, the core will call complete_power_step()
959 * with the error code if any. This routine should update the step value
960 * and return. It should not start a new request. The core will call
961 * start_power_step for the new step value, unless step have been set to
962 * ide_power_state_completed.
963 *
964 * Subdrivers are expected to define their own additional power
965 * steps from 1..999 for suspend and from 1001..1999 for resume,
966 * other values are reserved for future use.
967 */
968
969enum {
970 ide_pm_state_completed = -1,
971 ide_pm_state_start_suspend = 0,
972 ide_pm_state_start_resume = 1000,
973};
974
975/*
976 * Subdrivers support.
4ef3b8f4
LR
977 *
978 * The gendriver.owner field should be set to the module owner of this driver.
979 * The gendriver.name field should be set to the name of this driver
1da177e4 980 */
7662d046 981struct ide_driver_s {
1da177e4
LT
982 const char *version;
983 u8 media;
1da177e4 984 unsigned supports_dsc_overlap : 1;
1da177e4
LT
985 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
986 int (*end_request)(ide_drive_t *, int, int);
987 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
988 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 989 struct device_driver gen_driver;
4031bbe4
RK
990 int (*probe)(ide_drive_t *);
991 void (*remove)(ide_drive_t *);
0d2157f7 992 void (*resume)(ide_drive_t *);
4031bbe4 993 void (*shutdown)(ide_drive_t *);
7662d046
BZ
994#ifdef CONFIG_IDE_PROC_FS
995 ide_proc_entry_t *proc;
996#endif
997};
1da177e4 998
4031bbe4
RK
999#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1000
1da177e4
LT
1001int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
1002
1003/*
1004 * ide_hwifs[] is the master data structure used to keep track
1005 * of just about everything in ide.c. Whenever possible, routines
1006 * should be using pointers to a drive (ide_drive_t *) or
1007 * pointers to a hwif (ide_hwif_t *), rather than indexing this
1008 * structure directly (the allocation/layout may change!).
1009 *
1010 */
1011#ifndef _IDE_C
1012extern ide_hwif_t ide_hwifs[]; /* master data repository */
1013#endif
1014extern int noautodma;
1015
1016extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
1017int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1018 int uptodate, int nr_sectors);
1da177e4 1019
1da177e4
LT
1020extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1021
1da177e4
LT
1022extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *);
1023
1024ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1025
1da177e4
LT
1026ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1027
1028ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
1029
1da177e4
LT
1030extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
1031
1032extern void ide_fix_driveid(struct hd_driveid *);
01745112 1033
1da177e4
LT
1034extern void ide_fixstring(u8 *, const int, const int);
1035
74af21cf 1036int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1037
1da177e4
LT
1038extern ide_startstop_t ide_do_reset (ide_drive_t *);
1039
1da177e4
LT
1040extern void ide_init_drive_cmd (struct request *rq);
1041
1da177e4
LT
1042/*
1043 * "action" parameter type for ide_do_drive_cmd() below.
1044 */
1045typedef enum {
1046 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
1047 ide_preempt, /* insert rq in front of current request */
1048 ide_head_wait, /* insert rq in front of current request and wait for it */
1049 ide_end /* insert rq at end of list, but don't wait for it */
1050} ide_action_t;
1051
1da177e4
LT
1052extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1053
1da177e4
LT
1054extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1055
1056/*
1057 * Issue ATA command and wait for completion.
1058 * Use for implementing commands in kernel
1059 *
1060 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
1061 */
1062extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
1063
1064typedef struct ide_task_s {
1065/*
1066 * struct hd_drive_task_hdr tf;
1067 * task_struct_t tf;
1068 * struct hd_drive_hob_hdr hobf;
1069 * hob_struct_t hobf;
1070 */
1071 task_ioreg_t tfRegister[8];
1072 task_ioreg_t hobRegister[8];
1073 ide_reg_valid_t tf_out_flags;
1074 ide_reg_valid_t tf_in_flags;
1075 int data_phase;
1076 int command_type;
1077 ide_pre_handler_t *prehandler;
1078 ide_handler_t *handler;
1079 struct request *rq; /* copy of request */
1080 void *special; /* valid_t generally */
1081} ide_task_t;
1082
1083extern u32 ide_read_24(ide_drive_t *);
1084
1085extern void SELECT_DRIVE(ide_drive_t *);
1086extern void SELECT_INTERRUPT(ide_drive_t *);
1087extern void SELECT_MASK(ide_drive_t *, int);
1088extern void QUIRK_LIST(ide_drive_t *);
1089
1090extern int drive_is_ready(ide_drive_t *);
1da177e4
LT
1091
1092/*
1093 * taskfile io for disks for now...and builds request from ide_ioctl
1094 */
1095extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1096
1097/*
1098 * Special Flagged Register Validation Caller
1099 */
1100extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1101
1102extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1103extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1104extern ide_startstop_t recal_intr(ide_drive_t *);
1105extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1106extern ide_startstop_t task_in_intr(ide_drive_t *);
1107extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1108
1109extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1110
1111int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1112int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1113int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1114
1115extern int system_bus_clock(void);
1116
1117extern int ide_driveid_update(ide_drive_t *);
1118extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1119extern int ide_config_drive_speed(ide_drive_t *, u8);
1120extern u8 eighty_ninty_three (ide_drive_t *);
1121extern int set_transfer(ide_drive_t *, ide_task_t *);
1122extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1123
1124extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1125
1da177e4
LT
1126extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1127
1128extern int ide_spin_wait_hwgroup(ide_drive_t *);
1129extern void ide_timer_expiry(unsigned long);
7d12e780 1130extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1131extern void do_ide_request(struct request_queue *);
1da177e4
LT
1132
1133void ide_init_disk(struct gendisk *, ide_drive_t *);
1134
1da177e4
LT
1135extern int ideprobe_init(void);
1136
6d208b39 1137#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1da177e4 1138extern void ide_scan_pcibus(int scan_direction) __init;
725522b5
GKH
1139extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1140#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1141#else
1142#define ide_pci_register_driver(d) pci_register_driver(d)
1143#endif
1144
85620436
BZ
1145void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1146void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1147
1148extern void default_hwif_iops(ide_hwif_t *);
1149extern void default_hwif_mmiops(ide_hwif_t *);
1150extern void default_hwif_transport(ide_hwif_t *);
1151
1da177e4
LT
1152typedef struct ide_pci_enablebit_s {
1153 u8 reg; /* byte pci reg holding the enable-bit */
1154 u8 mask; /* mask to isolate the enable-bit */
1155 u8 val; /* value of masked reg when "enabled" */
1156} ide_pci_enablebit_t;
1157
1158enum {
1159 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1160 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1161 /* single port device */
a5d8c5c8 1162 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1163 /* don't use legacy PIO blacklist */
1164 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1165 /* don't use conservative PIO "downgrade" */
1166 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ
1167 /* use PIO8/9 for prefetch off/on */
1168 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1169 /* use PIO6/7 for fast-devsel off/on */
1170 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1171 /* use 100-102 and 200-202 PIO values to set DMA modes */
1172 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1173 /*
1174 * keep DMA setting when programming PIO mode, may be used only
1175 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1176 */
1177 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1178 /* program host for the transfer mode after programming device */
1179 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1180 /* don't program host/device for the transfer mode ("smart" hosts) */
1181 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1182 /* trust BIOS for programming chipset/device for DMA */
1183 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1184 /* host uses VDMA */
1185 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1186 /* ATAPI DMA is unsupported */
1187 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ
1188 /* set if host is a "bootable" controller */
1189 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ
1190 /* host doesn't support DMA */
1191 IDE_HFLAG_NO_DMA = (1 << 14),
1192 /* check if host is PCI IDE device before allowing DMA */
1193 IDE_HFLAG_NO_AUTODMA = (1 << 15),
9ffcf364
BZ
1194 /* host is CS5510/CS5520 */
1195 IDE_HFLAG_CS5520 = (1 << 16),
238e4f14
BZ
1196 /* no LBA48 */
1197 IDE_HFLAG_NO_LBA48 = (1 << 17),
1198 /* no LBA48 DMA */
1199 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1200 /* data FIFO is cleared by an error */
1201 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1202 /* serialize ports */
1203 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1204 /* use legacy IRQs */
1205 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1206 /* force use of legacy IRQs */
1207 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1208 /* limit LBA48 requests to 256 sectors */
1209 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1210 /* use 32-bit I/O ops */
1211 IDE_HFLAG_IO_32BIT = (1 << 24),
1212 /* unmask IRQs */
1213 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1da177e4
LT
1214};
1215
7cab14a7
BZ
1216#ifdef CONFIG_BLK_DEV_OFFBOARD
1217# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1218#else
1219# define IDE_HFLAG_OFF_BOARD 0
1220#endif
1221
039788e1 1222struct ide_port_info {
1da177e4 1223 char *name;
1da177e4
LT
1224 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1225 void (*init_iops)(ide_hwif_t *);
1226 void (*init_hwif)(ide_hwif_t *);
1227 void (*init_dma)(ide_hwif_t *, unsigned long);
1228 void (*fixup)(ide_hwif_t *);
1da177e4 1229 ide_pci_enablebit_t enablebits[2];
528a572d 1230 hwif_chipset_t chipset;
1da177e4 1231 unsigned int extra;
9ffcf364 1232 u32 host_flags;
4099d143 1233 u8 pio_mask;
5f8b6c34
BZ
1234 u8 swdma_mask;
1235 u8 mwdma_mask;
18137207 1236 u8 udma_mask;
039788e1 1237};
1da177e4 1238
85620436
BZ
1239int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1240int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1241
1242void ide_map_sg(ide_drive_t *, struct request *);
1243void ide_init_sg_cmd(ide_drive_t *, struct request *);
1244
1245#define BAD_DMA_DRIVE 0
1246#define GOOD_DMA_DRIVE 1
1247
65e5f2e3
JC
1248struct drive_list_entry {
1249 const char *id_model;
1250 const char *id_firmware;
1251};
1252
1253int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1254
1255#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1256int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1257int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1258
1259u8 ide_find_dma_mode(ide_drive_t *, u8);
1260
1261static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1262{
1263 return ide_find_dma_mode(drive, XFER_UDMA_6);
1264}
1265
7469aaf6 1266void ide_dma_off(ide_drive_t *);
3608b5d7 1267int ide_set_dma(ide_drive_t *);
1da177e4
LT
1268ide_startstop_t ide_dma_intr(ide_drive_t *);
1269
1270#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1271extern int ide_build_sglist(ide_drive_t *, struct request *);
1272extern int ide_build_dmatable(ide_drive_t *, struct request *);
1273extern void ide_destroy_dmatable(ide_drive_t *);
1274extern int ide_release_dma(ide_hwif_t *);
1275extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1276
7469aaf6
BZ
1277void ide_dma_host_off(ide_drive_t *);
1278void ide_dma_off_quietly(ide_drive_t *);
ccf35289 1279void ide_dma_host_on(ide_drive_t *);
1da177e4 1280extern int __ide_dma_on(ide_drive_t *);
1da177e4
LT
1281extern int ide_dma_setup(ide_drive_t *);
1282extern void ide_dma_start(ide_drive_t *);
1283extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1284extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1285extern void ide_dma_timeout(ide_drive_t *);
1da177e4
LT
1286#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1287
1288#else
3ab7efe8 1289static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1290static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1291static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
7469aaf6 1292static inline void ide_dma_off(ide_drive_t *drive) { ; }
1da177e4 1293static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1294static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT
1295#endif /* CONFIG_BLK_DEV_IDEDMA */
1296
1297#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1298static inline void ide_release_dma(ide_hwif_t *drive) {;}
1299#endif
1300
e3a59b4d
HR
1301#ifdef CONFIG_BLK_DEV_IDEACPI
1302extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1303extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1304extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1305extern void ide_acpi_init(ide_hwif_t *hwif);
5e32132b 1306extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1307#else
1308static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1309static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1310static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1311static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
5e32132b 1312static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1313#endif
1314
1da177e4
LT
1315extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1316extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1317extern void ide_unregister (unsigned int index);
1318
1319void ide_register_region(struct gendisk *);
1320void ide_unregister_region(struct gendisk *);
1321
1322void ide_undecoded_slave(ide_hwif_t *);
1323
8447d9d5 1324int ide_device_add(u8 idx[4]);
1da177e4
LT
1325
1326static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1327{
1328 return hwif->hwif_data;
1329}
1330
1331static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1332{
1333 hwif->hwif_data = data;
1334}
1335
3ab7efe8 1336const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1337extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1338extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1339
2229833c
BZ
1340static inline int ide_dev_has_iordy(struct hd_driveid *id)
1341{
1342 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1343}
1344
6c3c22f3
SS
1345static inline int ide_dev_is_sata(struct hd_driveid *id)
1346{
1347 /*
1348 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1349 * verifying that word 80 by casting it to a signed type --
1350 * this trick allows us to filter out the reserved values of
1351 * 0x0000 and 0xffff along with the earlier ATA revisions...
1352 */
1353 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1354 return 1;
1355 return 0;
1356}
1357
1da177e4
LT
1358u8 ide_dump_status(ide_drive_t *, const char *, u8);
1359
1360typedef struct ide_pio_timings_s {
1361 int setup_time; /* Address setup (ns) minimum */
1362 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1363 int cycle_time; /* Cycle time (ns) minimum = */
1364 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1365} ide_pio_timings_t;
1366
7dd00083 1367unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1368u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1369extern const ide_pio_timings_t ide_pio_timings[6];
1370
88b2b32b
BZ
1371int ide_set_pio_mode(ide_drive_t *, u8);
1372int ide_set_dma_mode(ide_drive_t *, u8);
1373
26bcb879
BZ
1374void ide_set_pio(ide_drive_t *, u8);
1375
1376static inline void ide_set_max_pio(ide_drive_t *drive)
1377{
1378 ide_set_pio(drive, 255);
1379}
1da177e4
LT
1380
1381extern spinlock_t ide_lock;
ef29888e 1382extern struct mutex ide_cfg_mtx;
1da177e4
LT
1383/*
1384 * Structure locking:
1385 *
ef29888e 1386 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1387 * ide_hwif_t->{next,hwgroup}
1388 * ide_drive_t->next
1389 *
1390 * ide_hwgroup_t->busy: ide_lock
1391 * ide_hwgroup_t->hwif: ide_lock
1392 * ide_hwif_t->mate: constant, no locking
1393 * ide_drive_t->hwif: constant, no locking
1394 */
1395
366c7f55 1396#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1397
1398extern struct bus_type ide_bus_type;
1399
1400/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1401#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1402
1403/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1404#define ide_id_has_flush_cache_ext(id) \
1405 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1406
86b37860
CL
1407static inline int hwif_to_node(ide_hwif_t *hwif)
1408{
1409 struct pci_dev *dev = hwif->pci_dev;
1410 return dev ? pcibus_to_node(dev->bus) : -1;
1411}
1412
1b678347
BH
1413static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1414{
1415 ide_hwif_t *hwif = HWIF(drive);
1416
1417 return &hwif->drives[(drive->dn ^ 1) & 1];
1418}
1419
1da177e4 1420#endif /* _IDE_H */
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