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ide: keep pointer to struct device instead of struct pci_dev in ide_hwif_t
[deliverable/linux.git] / include / linux / ide.h
CommitLineData
1da177e4
LT		 1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
12#include <linux/hdsmart.h>
13#include <linux/blkdev.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/device.h>
19#include <linux/pci.h>
f36d4024 20#include <linux/completion.h>
e3a59b4d
HR		 21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT		 24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/semaphore.h>
f9383c42 28#include <asm/mutex.h>
1da177e4 29
4ee06b7e
BZ		 30#if defined(CRIS) || defined(FRV)
31# define SUPPORT_VLB_SYNC 0
32#else
33# define SUPPORT_VLB_SYNC 1
1da177e4
LT		 34#endif
35
36/*
37 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
38 * number.
39 */
40
41#define IDE_NO_IRQ (-1)
42
1da177e4
LT		 43typedef unsigned char byte; /* used everywhere */
44
45/*
46 * Probably not wise to fiddle with these
47 */
48#define ERROR_MAX 8 /* Max read/write errors per sector */
49#define ERROR_RESET 3 /* Reset controller every 4th retry */
50#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
51
52/*
53 * Tune flags
54 */
55#define IDE_TUNE_NOAUTO 2
56#define IDE_TUNE_AUTO 1
57#define IDE_TUNE_DEFAULT 0
58
59/*
60 * state flags
61 */
62
63#define DMA_PIO_RETRY 1 /* retrying in PIO */
64
65#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
66#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
67
68/*
69 * Definitions for accessing IDE controller registers
70 */
71#define IDE_NR_PORTS (10)
72
73#define IDE_DATA_OFFSET (0)
74#define IDE_ERROR_OFFSET (1)
75#define IDE_NSECTOR_OFFSET (2)
76#define IDE_SECTOR_OFFSET (3)
77#define IDE_LCYL_OFFSET (4)
78#define IDE_HCYL_OFFSET (5)
79#define IDE_SELECT_OFFSET (6)
80#define IDE_STATUS_OFFSET (7)
81#define IDE_CONTROL_OFFSET (8)
82#define IDE_IRQ_OFFSET (9)
83
84#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
85#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
86
1da177e4
LT		 87#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
88#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
89#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
90#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
91#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
92#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
93#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
94#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
95#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
96#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
97
98#define IDE_FEATURE_REG IDE_ERROR_REG
99#define IDE_COMMAND_REG IDE_STATUS_REG
100#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
101#define IDE_IREASON_REG IDE_NSECTOR_REG
102#define IDE_BCOUNTL_REG IDE_LCYL_REG
103#define IDE_BCOUNTH_REG IDE_HCYL_REG
104
105#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
106#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
107#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
108#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
109#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT		 110
111#define BAD_CRC (ABRT_ERR | ICRC_ERR)
112
113#define SATA_NR_PORTS (3) /* 16 possible ?? */
114
115#define SATA_STATUS_OFFSET (0)
116#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
117#define SATA_ERROR_OFFSET (1)
118#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
119#define SATA_CONTROL_OFFSET (2)
120#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
121
122#define SATA_MISC_OFFSET (0)
123#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
124#define SATA_PHY_OFFSET (1)
125#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
126#define SATA_IEN_OFFSET (2)
127#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
128
129/*
130 * Our Physical Region Descriptor (PRD) table should be large enough
131 * to handle the biggest I/O request we are likely to see. Since requests
132 * can have no more than 256 sectors, and since the typical blocksize is
133 * two or more sectors, we could get by with a limit of 128 entries here for
134 * the usual worst case. Most requests seem to include some contiguous blocks,
135 * further reducing the number of table entries required.
136 *
137 * The driver reverts to PIO mode for individual requests that exceed
138 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
139 * 100% of all crazy scenarios here is not necessary.
140 *
141 * As it turns out though, we must allocate a full 4KB page for this,
142 * so the two PRD tables (ide0 & ide1) will each get half of that,
143 * allowing each to have about 256 entries (8 bytes each) from this.
144 */
145#define PRD_BYTES 8
146#define PRD_ENTRIES 256
147
148/*
149 * Some more useful definitions
150 */
151#define PARTN_BITS 6 /* number of minor dev bits for partitions */
152#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
153#define SECTOR_SIZE 512
154#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
155#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
156
157/*
158 * Timeouts for various operations:
159 */
160#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
161#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
162#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
163#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
164#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
165#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
166
1da177e4
LT		 167/*
168 * Check for an interrupt and acknowledge the interrupt status
169 */
170struct hwif_s;
171typedef int (ide_ack_intr_t)(struct hwif_s *);
172
1da177e4
LT		 173/*
174 * hwif_chipset_t is used to keep track of the specific hardware
175 * chipset used by each IDE interface, if known.
176 */
528a572d 177enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT		 178 ide_cmd640, ide_dtc2278, ide_ali14xx,
179 ide_qd65xx, ide_umc8672, ide_ht6560b,
180 ide_rz1000, ide_trm290,
181 ide_cmd646, ide_cy82c693, ide_4drives,
182 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 183 ide_au1xxx, ide_forced
528a572d
BZ		 184};
185
186typedef u8 hwif_chipset_t;
1da177e4
LT		 187
188/*
189 * Structure to hold all information about the location of this port
190 */
191typedef struct hw_regs_s {
192 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
193 int irq; /* our irq number */
1da177e4
LT		 194 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
195 hwif_chipset_t chipset;
4349d5cd 196 struct device *dev;
1da177e4
LT		 197} hw_regs_t;
198
baa8f3e9 199struct hwif_s * ide_find_port(unsigned long);
cbb010c1 200void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 201void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 202
f01393e4 203struct ide_drive_s;
cbb010c1 204int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
fd9bb539 205 struct hwif_s **);
1da177e4 206
1da177e4
LT		 207void ide_setup_ports( hw_regs_t *hw,
208 unsigned long base,
209 int *offsets,
210 unsigned long ctrl,
211 unsigned long intr,
212 ide_ack_intr_t *ack_intr,
213#if 0
214 ide_io_ops_t *iops,
215#endif
216 int irq);
217
218static inline void ide_std_init_ports(hw_regs_t *hw,
219 unsigned long io_addr,
220 unsigned long ctl_addr)
221{
222 unsigned int i;
223
224 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
225 hw->io_ports[i] = io_addr++;
226
227 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
228}
229
230#include <asm/ide.h>
231
83d7dbc4
MM		 232#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
233#undef MAX_HWIFS
83ae20c8
BH		 234#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
235#endif
236
1da177e4
LT		 237/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
238#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
239# define ide_default_io_base(index) (0)
240# define ide_default_irq(base) (0)
241# define ide_init_default_irq(base) (0)
242#endif
243
847ddd2b 244#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT		 245static inline void ide_init_hwif_ports(hw_regs_t *hw,
246 unsigned long io_addr,
247 unsigned long ctl_addr,
248 int *irq)
249{
250 if (!ctl_addr)
251 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
252 else
253 ide_std_init_ports(hw, io_addr, ctl_addr);
254
255 if (irq)
256 *irq = 0;
257
258 hw->io_ports[IDE_IRQ_OFFSET] = 0;
259
260#ifdef CONFIG_PPC32
261 if (ppc_ide_md.ide_init_hwif)
262 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
263#endif
264}
265#else
266static inline void ide_init_hwif_ports(hw_regs_t *hw,
267 unsigned long io_addr,
268 unsigned long ctl_addr,
269 int *irq)
270{
271 if (io_addr || ctl_addr)
272 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
273}
847ddd2b 274#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT		 275
276/* Currently only m68k, apus and m8xx need it */
277#ifndef IDE_ARCH_ACK_INTR
278# define ide_ack_intr(hwif) (1)
279#endif
280
281/* Currently only Atari needs it */
282#ifndef IDE_ARCH_LOCK
283# define ide_release_lock() do {} while (0)
284# define ide_get_lock(hdlr, data) do {} while (0)
285#endif /* IDE_ARCH_LOCK */
286
287/*
288 * Now for the data we need to maintain per-drive: ide_drive_t
289 */
290
291#define ide_scsi 0x21
292#define ide_disk 0x20
293#define ide_optical 0x7
294#define ide_cdrom 0x5
295#define ide_tape 0x1
296#define ide_floppy 0x0
297
298/*
299 * Special Driver Flags
300 *
301 * set_geometry : respecify drive geometry
302 * recalibrate : seek to cyl 0
303 * set_multmode : set multmode count
304 * set_tune : tune interface for drive
305 * serviced : service command
306 * reserved : unused
307 */
308typedef union {
309 unsigned all : 8;
310 struct {
1da177e4
LT		 311 unsigned set_geometry : 1;
312 unsigned recalibrate : 1;
313 unsigned set_multmode : 1;
314 unsigned set_tune : 1;
315 unsigned serviced : 1;
316 unsigned reserved : 3;
1da177e4
LT		 317 } b;
318} special_t;
319
1da177e4
LT		 320/*
321 * ATA-IDE Select Register, aka Device-Head
322 *
323 * head : always zeros here
324 * unit : drive select number: 0/1
325 * bit5 : always 1
326 * lba : using LBA instead of CHS
327 * bit7 : always 1
328 */
329typedef union {
330 unsigned all : 8;
331 struct {
332#if defined(__LITTLE_ENDIAN_BITFIELD)
333 unsigned head : 4;
334 unsigned unit : 1;
335 unsigned bit5 : 1;
336 unsigned lba : 1;
337 unsigned bit7 : 1;
338#elif defined(__BIG_ENDIAN_BITFIELD)
339 unsigned bit7 : 1;
340 unsigned lba : 1;
341 unsigned bit5 : 1;
342 unsigned unit : 1;
343 unsigned head : 4;
344#else
345#error "Please fix <asm/byteorder.h>"
346#endif
347 } b;
348} select_t, ata_select_t;
349
1da177e4
LT		 350/*
351 * Status returned from various ide_ functions
352 */
353typedef enum {
354 ide_stopped, /* no drive operation was started */
355 ide_started, /* a drive operation was started, handler was set */
356} ide_startstop_t;
357
358struct ide_driver_s;
359struct ide_settings_s;
360
e3a59b4d
HR		 361#ifdef CONFIG_BLK_DEV_IDEACPI
362struct ide_acpi_drive_link;
363struct ide_acpi_hwif_link;
364#endif
365
1da177e4
LT		 366typedef struct ide_drive_s {
367 char name[4]; /* drive name, such as "hda" */
368 char driver_req[10]; /* requests specific driver */
369
165125e1 370 struct request_queue *queue; /* request queue */
1da177e4
LT		 371
372 struct request *rq; /* current request */
373 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT		 374 void *driver_data; /* extra driver data */
375 struct hd_driveid *id; /* drive model identification info */
7662d046 376#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 377 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
378 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 379#endif
1da177e4
LT		 380 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
381
382 unsigned long sleep; /* sleep until this time */
383 unsigned long service_start; /* time we started last request */
384 unsigned long service_time; /* service time of last request */
385 unsigned long timeout; /* max time to wait for irq */
386
387 special_t special; /* special action flags */
388 select_t select; /* basic drive/head select reg value */
389
390 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT		 391 u8 using_dma; /* disk is using dma for read/write */
392 u8 retry_pio; /* retrying dma capable host in pio */
393 u8 state; /* retry state */
394 u8 waiting_for_dma; /* dma currently in progress */
395 u8 unmask; /* okay to unmask other irqs */
36193484 396 u8 noflush; /* don't attempt flushes */
1da177e4
LT		 397 u8 dsc_overlap; /* DSC overlap */
398 u8 nice1; /* give potential excess bandwidth */
399
400 unsigned present : 1; /* drive is physically present */
401 unsigned dead : 1; /* device ejected hint */
402 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
403 unsigned noprobe : 1; /* from: hdx=noprobe */
404 unsigned removable : 1; /* 1 if need to do check_media_change */
405 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT		 406 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
407 unsigned no_unmask : 1; /* disallow setting unmask bit */
408 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
409 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
410 unsigned nice0 : 1; /* give obvious excess bandwidth */
411 unsigned nice2 : 1; /* give a share in our own bandwidth */
412 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 413 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT		 414 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
415 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
416 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
417 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT		 418 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
419 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
420 unsigned post_reset : 1;
7f8f48af 421 unsigned udma33_warned : 1;
1da177e4 422
1497943e 423 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT		 424 u8 quirk_list; /* considered quirky, set for a specific host */
425 u8 init_speed; /* transfer rate set at boot */
1da177e4 426 u8 current_speed; /* current transfer rate set */
513daadd 427 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT		 428 u8 dn; /* now wide spread use */
429 u8 wcache; /* status of write cache */
430 u8 acoustic; /* acoustic management */
431 u8 media; /* disk, cdrom, tape, floppy, ... */
432 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
433 u8 ready_stat; /* min status value for drive ready */
434 u8 mult_count; /* current multiple sector setting */
435 u8 mult_req; /* requested multiple sector setting */
436 u8 tune_req; /* requested drive tuning setting */
437 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
438 u8 bad_wstat; /* used for ignoring WRERR_STAT */
439 u8 nowerr; /* used for ignoring WRERR_STAT */
440 u8 sect0; /* offset of first sector for DM6:DDO */
441 u8 head; /* "real" number of heads */
442 u8 sect; /* "real" sectors per track */
443 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
444 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
445
446 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
447 unsigned int cyl; /* "real" number of cyls */
26bcb879 448 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT		 449 unsigned int failures; /* current failure count */
450 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 451 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT		 452
453 u64 capacity64; /* total number of sectors */
454
455 int lun; /* logical unit */
456 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR		 457#ifdef CONFIG_BLK_DEV_IDEACPI
458 struct ide_acpi_drive_link *acpidata;
459#endif
1da177e4
LT		 460 struct list_head list;
461 struct device gendev;
f36d4024 462 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT		 463} ide_drive_t;
464
8604affd
BZ		 465#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
466
1da177e4
LT		 467#define IDE_CHIPSET_PCI_MASK \
468 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
469#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
470
039788e1 471struct ide_port_info;
1da177e4
LT		 472
473typedef struct hwif_s {
474 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
475 struct hwif_s *mate; /* other hwif from same PCI chip */
476 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
477 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
478
479 char name[6]; /* name of interface, eg. "ide0" */
480
481 /* task file registers for pata and sata */
482 unsigned long io_ports[IDE_NR_PORTS];
483 unsigned long sata_scr[SATA_NR_PORTS];
484 unsigned long sata_misc[SATA_NR_PORTS];
485
1da177e4
LT		 486 ide_drive_t drives[MAX_DRIVES]; /* drive info */
487
488 u8 major; /* our major number */
489 u8 index; /* 0 for ide0; 1 for ide1; ... */
490 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
491 u8 straight8; /* Alan's straight 8 check */
492 u8 bus_state; /* power state of the IDE bus */
493
e95d9c6b 494 u32 host_flags;
6a824c92 495
4099d143
BZ		 496 u8 pio_mask;
497
1da177e4
LT		 498 u8 ultra_mask;
499 u8 mwdma_mask;
500 u8 swdma_mask;
501
49521f97
BZ		 502 u8 cbl; /* cable type */
503
1da177e4
LT		 504 hwif_chipset_t chipset; /* sub-module for tuning.. */
505
36501650
BZ		 506 struct device *dev;
507
85620436 508 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 509
18e181fe
BZ		 510 ide_ack_intr_t *ack_intr;
511
1da177e4
LT		 512 void (*rw_disk)(ide_drive_t *, struct request *);
513
514#if 0
515 ide_hwif_ops_t *hwifops;
516#else
88b2b32b 517 /* routine to program host for PIO mode */
26bcb879 518 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ		 519 /* routine to program host for DMA mode */
520 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT		 521 /* tweaks hardware to select drive */
522 void (*selectproc)(ide_drive_t *);
523 /* chipset polling based on hba specifics */
524 int (*reset_poll)(ide_drive_t *);
525 /* chipset specific changes to default for device-hba resets */
526 void (*pre_reset)(ide_drive_t *);
527 /* routine to reset controller after a disk reset */
528 void (*resetproc)(ide_drive_t *);
1da177e4
LT		 529 /* special host masking for drive selection */
530 void (*maskproc)(ide_drive_t *, int);
531 /* check host's drive quirk list */
f01393e4 532 void (*quirkproc)(ide_drive_t *);
1da177e4
LT		 533 /* driver soft-power interface */
534 int (*busproc)(ide_drive_t *, int);
1da177e4 535#endif
b4e44369 536 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 537 u8 (*udma_filter)(ide_drive_t *);
1da177e4
LT		 538
539 void (*ata_input_data)(ide_drive_t *, void *, u32);
540 void (*ata_output_data)(ide_drive_t *, void *, u32);
541
542 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
543 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
544
15ce926a 545 void (*dma_host_set)(ide_drive_t *, int);
1da177e4
LT		 546 int (*dma_setup)(ide_drive_t *);
547 void (*dma_exec_cmd)(ide_drive_t *, u8);
548 void (*dma_start)(ide_drive_t *);
549 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 550 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 551 void (*ide_dma_clear_irq)(ide_drive_t *drive);
841d2a9b 552 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 553 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT		 554
555 void (*OUTB)(u8 addr, unsigned long port);
556 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
557 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT		 558 void (*OUTSW)(unsigned long port, void *addr, u32 count);
559 void (*OUTSL)(unsigned long port, void *addr, u32 count);
560
561 u8 (*INB)(unsigned long port);
562 u16 (*INW)(unsigned long port);
1da177e4
LT		 563 void (*INSW)(unsigned long port, void *addr, u32 count);
564 void (*INSL)(unsigned long port, void *addr, u32 count);
565
566 /* dma physical region descriptor table (cpu view) */
567 unsigned int *dmatable_cpu;
568 /* dma physical region descriptor table (dma view) */
569 dma_addr_t dmatable_dma;
570 /* Scatter-gather list used to build the above */
571 struct scatterlist *sg_table;
572 int sg_max_nents; /* Maximum number of entries in it */
573 int sg_nents; /* Current number of entries in it */
574 int sg_dma_direction; /* dma transfer direction */
575
576 /* data phase of the active command (currently only valid for PIO/DMA) */
577 int data_phase;
578
579 unsigned int nsect;
580 unsigned int nleft;
55c16a70 581 struct scatterlist *cursg;
1da177e4
LT		 582 unsigned int cursg_ofs;
583
1da177e4
LT		 584 int rqsize; /* max sectors per request */
585 int irq; /* our irq number */
586
1da177e4
LT		 587 unsigned long dma_base; /* base addr for dma ports */
588 unsigned long dma_command; /* dma command register */
589 unsigned long dma_vendor1; /* dma vendor 1 register */
590 unsigned long dma_status; /* dma status register */
591 unsigned long dma_vendor3; /* dma vendor 3 register */
592 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 593
1da177e4
LT		 594 unsigned long config_data; /* for use by chipset-specific code */
595 unsigned long select_data; /* for use by chipset-specific code */
596
020e322d
SS		 597 unsigned long extra_base; /* extra addr for dma ports */
598 unsigned extra_ports; /* number of extra dma ports */
599
1da177e4
LT		 600 unsigned noprobe : 1; /* don't probe for this interface */
601 unsigned present : 1; /* this interface exists */
602 unsigned hold : 1; /* this interface is always present */
603 unsigned serialized : 1; /* serialized all channel operation */
604 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
605 unsigned reset : 1; /* reset after probe */
1da177e4
LT		 606 unsigned auto_poll : 1; /* supports nop auto-poll */
607 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
208a08f7 608 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
2ad1e558 609 unsigned mmio : 1; /* host uses MMIO */
1da177e4
LT		 610
611 struct device gendev;
f36d4024 612 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT		 613
614 void *hwif_data; /* extra hwif data */
615
616 unsigned dma;
e3a59b4d
HR		 617
618#ifdef CONFIG_BLK_DEV_IDEACPI
619 struct ide_acpi_hwif_link *acpidata;
620#endif
22fc6ecc 621} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT		 622
623/*
624 * internal ide interrupt handler type
625 */
1da177e4
LT		 626typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
627typedef int (ide_expiry_t)(ide_drive_t *);
628
629typedef struct hwgroup_s {
630 /* irq handler, if active */
631 ide_startstop_t (*handler)(ide_drive_t *);
632 /* irq handler, suspended if active */
633 ide_startstop_t (*handler_save)(ide_drive_t *);
634 /* BOOL: protects all fields below */
635 volatile int busy;
636 /* BOOL: wake us up on timer expiry */
637 unsigned int sleeping : 1;
638 /* BOOL: polling active & poll_timeout field valid */
639 unsigned int polling : 1;
913759ac
AC		 640 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
641 unsigned int resetting : 1;
642
1da177e4
LT		 643 /* current drive */
644 ide_drive_t *drive;
645 /* ptr to current hwif in linked-list */
646 ide_hwif_t *hwif;
647
648 /* for pci chipsets */
649 struct pci_dev *pci_dev;
1da177e4
LT		 650
651 /* current request */
652 struct request *rq;
653 /* failsafe timer */
654 struct timer_list timer;
655 /* local copy of current write rq */
656 struct request wrq;
657 /* timeout value during long polls */
658 unsigned long poll_timeout;
659 /* queried upon timeouts */
660 int (*expiry)(ide_drive_t *);
661 /* ide_system_bus_speed */
662 int pio_clock;
23450319
SS		 663 int req_gen;
664 int req_gen_timer;
1da177e4
LT		 665
666 unsigned char cmd_buf[4];
667} ide_hwgroup_t;
668
7662d046
BZ		 669typedef struct ide_driver_s ide_driver_t;
670
f9383c42 671extern struct mutex ide_setting_mtx;
1da177e4 672
7662d046
BZ		 673int set_io_32bit(ide_drive_t *, int);
674int set_pio_mode(ide_drive_t *, int);
675int set_using_dma(ide_drive_t *, int);
676
677#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 678/*
679 * configurable drive settings
680 */
681
682#define TYPE_INT 0
1497943e
BZ		 683#define TYPE_BYTE 1
684#define TYPE_SHORT 2
1da177e4
LT		 685
686#define SETTING_READ (1 << 0)
687#define SETTING_WRITE (1 << 1)
688#define SETTING_RW (SETTING_READ | SETTING_WRITE)
689
690typedef int (ide_procset_t)(ide_drive_t *, int);
691typedef struct ide_settings_s {
692 char *name;
693 int rw;
1da177e4
LT		 694 int data_type;
695 int min;
696 int max;
697 int mul_factor;
698 int div_factor;
699 void *data;
700 ide_procset_t *set;
701 int auto_remove;
702 struct ide_settings_s *next;
703} ide_settings_t;
704
1497943e 705int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT		 706
707/*
708 * /proc/ide interface
709 */
710typedef struct {
711 const char *name;
712 mode_t mode;
713 read_proc_t *read_proc;
714 write_proc_t *write_proc;
715} ide_proc_entry_t;
716
ecfd80e4
BZ		 717void proc_ide_create(void);
718void proc_ide_destroy(void);
5cbf79cd
BZ		 719void ide_proc_register_port(ide_hwif_t *);
720void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ		 721void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
722void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
723
724void ide_add_generic_settings(ide_drive_t *);
725
1da177e4
LT		 726read_proc_t proc_ide_read_capacity;
727read_proc_t proc_ide_read_geometry;
728
729#ifdef CONFIG_BLK_DEV_IDEPCI
730void ide_pci_create_host_proc(const char *, get_info_t *);
731#endif
732
733/*
734 * Standard exit stuff:
735 */
736#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
737{ \
738 len -= off; \
739 if (len < count) { \
740 *eof = 1; \
741 if (len <= 0) \
742 return 0; \
743 } else \
744 len = count; \
745 *start = page + off; \
746 return len; \
747}
748#else
ecfd80e4
BZ		 749static inline void proc_ide_create(void) { ; }
750static inline void proc_ide_destroy(void) { ; }
5cbf79cd
BZ		 751static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
752static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ		 753static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
754static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
755static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT		 756#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
757#endif
758
759/*
760 * Power Management step value (rq->pm->pm_step).
761 *
762 * The step value starts at 0 (ide_pm_state_start_suspend) for a
763 * suspend operation or 1000 (ide_pm_state_start_resume) for a
764 * resume operation.
765 *
766 * For each step, the core calls the subdriver start_power_step() first.
767 * This can return:
768 * - ide_stopped : In this case, the core calls us back again unless
769 * step have been set to ide_power_state_completed.
770 * - ide_started : In this case, the channel is left busy until an
771 * async event (interrupt) occurs.
772 * Typically, start_power_step() will issue a taskfile request with
773 * do_rw_taskfile().
774 *
775 * Upon reception of the interrupt, the core will call complete_power_step()
776 * with the error code if any. This routine should update the step value
777 * and return. It should not start a new request. The core will call
778 * start_power_step for the new step value, unless step have been set to
779 * ide_power_state_completed.
780 *
781 * Subdrivers are expected to define their own additional power
782 * steps from 1..999 for suspend and from 1001..1999 for resume,
783 * other values are reserved for future use.
784 */
785
786enum {
787 ide_pm_state_completed = -1,
788 ide_pm_state_start_suspend = 0,
789 ide_pm_state_start_resume = 1000,
790};
791
792/*
793 * Subdrivers support.
4ef3b8f4
LR		 794 *
795 * The gendriver.owner field should be set to the module owner of this driver.
796 * The gendriver.name field should be set to the name of this driver
1da177e4 797 */
7662d046 798struct ide_driver_s {
1da177e4
LT		 799 const char *version;
800 u8 media;
1da177e4 801 unsigned supports_dsc_overlap : 1;
1da177e4
LT		 802 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
803 int (*end_request)(ide_drive_t *, int, int);
804 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
805 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 806 struct device_driver gen_driver;
4031bbe4
RK		 807 int (*probe)(ide_drive_t *);
808 void (*remove)(ide_drive_t *);
0d2157f7 809 void (*resume)(ide_drive_t *);
4031bbe4 810 void (*shutdown)(ide_drive_t *);
7662d046
BZ		 811#ifdef CONFIG_IDE_PROC_FS
812 ide_proc_entry_t *proc;
813#endif
814};
1da177e4 815
4031bbe4
RK		 816#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
817
1da177e4
LT		 818int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
819
820/*
821 * ide_hwifs[] is the master data structure used to keep track
822 * of just about everything in ide.c. Whenever possible, routines
823 * should be using pointers to a drive (ide_drive_t *) or
824 * pointers to a hwif (ide_hwif_t *), rather than indexing this
825 * structure directly (the allocation/layout may change!).
826 *
827 */
828#ifndef _IDE_C
829extern ide_hwif_t ide_hwifs[]; /* master data repository */
830#endif
831extern int noautodma;
832
833extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC		 834int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
835 int uptodate, int nr_sectors);
1da177e4 836
1da177e4
LT		 837extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
838
cd2a2d96
BZ		 839void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
840 ide_expiry_t *);
1da177e4
LT		 841
842ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
843
1da177e4
LT		 844ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
845
846ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
847
1da177e4
LT		 848extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
849
850extern void ide_fix_driveid(struct hd_driveid *);
01745112 851
1da177e4
LT		 852extern void ide_fixstring(u8 *, const int, const int);
853
74af21cf 854int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 855
1da177e4
LT		 856extern ide_startstop_t ide_do_reset (ide_drive_t *);
857
1da177e4
LT		 858extern void ide_init_drive_cmd (struct request *rq);
859
1da177e4
LT		 860/*
861 * "action" parameter type for ide_do_drive_cmd() below.
862 */
863typedef enum {
864 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT		 865 ide_preempt, /* insert rq in front of current request */
866 ide_head_wait, /* insert rq in front of current request and wait for it */
867 ide_end /* insert rq at end of list, but don't wait for it */
868} ide_action_t;
869
1da177e4
LT		 870extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
871
1da177e4
LT		 872extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
873
9e42237f
BZ		 874enum {
875 IDE_TFLAG_LBA48 = (1 << 0),
876 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ		 877 IDE_TFLAG_FLAGGED = (1 << 2),
878 IDE_TFLAG_OUT_DATA = (1 << 3),
879 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
880 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
881 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
882 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
883 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
884 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
885 IDE_TFLAG_OUT_HOB_NSECT |
886 IDE_TFLAG_OUT_HOB_LBAL |
887 IDE_TFLAG_OUT_HOB_LBAM |
888 IDE_TFLAG_OUT_HOB_LBAH,
889 IDE_TFLAG_OUT_FEATURE = (1 << 9),
890 IDE_TFLAG_OUT_NSECT = (1 << 10),
891 IDE_TFLAG_OUT_LBAL = (1 << 11),
892 IDE_TFLAG_OUT_LBAM = (1 << 12),
893 IDE_TFLAG_OUT_LBAH = (1 << 13),
894 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
895 IDE_TFLAG_OUT_NSECT |
896 IDE_TFLAG_OUT_LBAL |
897 IDE_TFLAG_OUT_LBAM |
898 IDE_TFLAG_OUT_LBAH,
807e35d6 899 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 900 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ		 901 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
902 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 903 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 904 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ		 905 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
906 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
907 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
908 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
909 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
910 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
911 IDE_TFLAG_IN_HOB_LBAM |
912 IDE_TFLAG_IN_HOB_LBAH,
913 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
914 IDE_TFLAG_IN_HOB_NSECT |
915 IDE_TFLAG_IN_HOB_LBA,
916 IDE_TFLAG_IN_NSECT = (1 << 25),
917 IDE_TFLAG_IN_LBAL = (1 << 26),
918 IDE_TFLAG_IN_LBAM = (1 << 27),
919 IDE_TFLAG_IN_LBAH = (1 << 28),
920 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
921 IDE_TFLAG_IN_LBAM |
922 IDE_TFLAG_IN_LBAH,
923 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
924 IDE_TFLAG_IN_LBA,
925 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ		 926 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
927 IDE_TFLAG_IN_HOB,
928 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
929 IDE_TFLAG_IN_TF,
930 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
931 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH		 932 /* force 16-bit I/O operations */
933 IDE_TFLAG_IO_16BIT = (1 << 30),
9e42237f
BZ		 934};
935
650d841d
BZ		 936struct ide_taskfile {
937 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
938
939 u8 hob_feature; /* 1-5: additional data to support LBA48 */
940 u8 hob_nsect;
941 u8 hob_lbal;
942 u8 hob_lbam;
943 u8 hob_lbah;
944
945 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
946
947 union { /*  7: */
948 u8 error; /* read: error */
949 u8 feature; /* write: feature */
950 };
951
952 u8 nsect; /* 8: number of sectors */
953 u8 lbal; /* 9: LBA low */
954 u8 lbam; /* 10: LBA mid */
955 u8 lbah; /* 11: LBA high */
956
957 u8 device; /* 12: device select */
958
959 union { /* 13: */
960 u8 status; /*  read: status  */
961 u8 command; /* write: command */
962 };
963};
964
1da177e4 965typedef struct ide_task_s {
650d841d
BZ		 966 union {
967 struct ide_taskfile tf;
968 u8 tf_array[14];
969 };
866e2ec9 970 u32 tf_flags;
1da177e4 971 int data_phase;
1da177e4
LT		 972 struct request *rq; /* copy of request */
973 void *special; /* valid_t generally */
974} ide_task_t;
975
9e42237f 976void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 977void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT		 978
979extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 980extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT		 981
982extern int drive_is_ready(ide_drive_t *);
1da177e4 983
2fc57388
BZ		 984void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
985
f6e29e35 986ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 987
4d7a984b
TH		 988void task_end_request(ide_drive_t *, struct request *, u8);
989
ac026ff2 990int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ		 991int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
992
1da177e4
LT		 993int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
994int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
995int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
996
997extern int system_bus_clock(void);
998
999extern int ide_driveid_update(ide_drive_t *);
1000extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1001extern int ide_config_drive_speed(ide_drive_t *, u8);
1002extern u8 eighty_ninty_three (ide_drive_t *);
1003extern int set_transfer(ide_drive_t *, ide_task_t *);
1004extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1005
1006extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1007
1da177e4
LT		 1008extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1009
1010extern int ide_spin_wait_hwgroup(ide_drive_t *);
1011extern void ide_timer_expiry(unsigned long);
7d12e780 1012extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1013extern void do_ide_request(struct request_queue *);
1da177e4
LT		 1014
1015void ide_init_disk(struct gendisk *, ide_drive_t *);
1016
6d208b39 1017#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
ade2daf9 1018extern int ide_scan_direction;
725522b5
GKH		 1019extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1020#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ		 1021#else
1022#define ide_pci_register_driver(d) pci_register_driver(d)
1023#endif
1024
85620436
BZ		 1025void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1026void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4
LT		 1027
1028extern void default_hwif_iops(ide_hwif_t *);
1029extern void default_hwif_mmiops(ide_hwif_t *);
1030extern void default_hwif_transport(ide_hwif_t *);
1031
1da177e4
LT		 1032typedef struct ide_pci_enablebit_s {
1033 u8 reg; /* byte pci reg holding the enable-bit */
1034 u8 mask; /* mask to isolate the enable-bit */
1035 u8 val; /* value of masked reg when "enabled" */
1036} ide_pci_enablebit_t;
1037
1038enum {
1039 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1040 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1041 /* single port device */
a5d8c5c8 1042 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ		 1043 /* don't use legacy PIO blacklist */
1044 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1045 /* don't use conservative PIO "downgrade" */
1046 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ		 1047 /* use PIO8/9 for prefetch off/on */
1048 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1049 /* use PIO6/7 for fast-devsel off/on */
1050 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1051 /* use 100-102 and 200-202 PIO values to set DMA modes */
1052 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ		 1053 /*
1054 * keep DMA setting when programming PIO mode, may be used only
1055 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1056 */
1057 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ		 1058 /* program host for the transfer mode after programming device */
1059 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1060 /* don't program host/device for the transfer mode ("smart" hosts) */
1061 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ		 1062 /* trust BIOS for programming chipset/device for DMA */
1063 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1064 /* host uses VDMA */
1065 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ		 1066 /* ATAPI DMA is unsupported */
1067 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ		 1068 /* set if host is a "bootable" controller */
1069 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ		 1070 /* host doesn't support DMA */
1071 IDE_HFLAG_NO_DMA = (1 << 14),
1072 /* check if host is PCI IDE device before allowing DMA */
1073 IDE_HFLAG_NO_AUTODMA = (1 << 15),
9ffcf364
BZ		 1074 /* host is CS5510/CS5520 */
1075 IDE_HFLAG_CS5520 = (1 << 16),
238e4f14
BZ		 1076 /* no LBA48 */
1077 IDE_HFLAG_NO_LBA48 = (1 << 17),
1078 /* no LBA48 DMA */
1079 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ		 1080 /* data FIFO is cleared by an error */
1081 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ		 1082 /* serialize ports */
1083 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ		 1084 /* use legacy IRQs */
1085 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ		 1086 /* force use of legacy IRQs */
1087 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ		 1088 /* limit LBA48 requests to 256 sectors */
1089 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ		 1090 /* use 32-bit I/O ops */
1091 IDE_HFLAG_IO_32BIT = (1 << 24),
1092 /* unmask IRQs */
1093 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1094 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
8704de8f
BZ		 1095 /* host is CY82C693 */
1096 IDE_HFLAG_CY82C693 = (1 << 27),
8ac2b42a
BZ		 1097 /* force host out of "simplex" mode */
1098 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ		 1099 /* DSC overlap is unsupported */
1100 IDE_HFLAG_NO_DSC = (1 << 29),
1da177e4
LT		 1101};
1102
7cab14a7
BZ		 1103#ifdef CONFIG_BLK_DEV_OFFBOARD
1104# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1105#else
1106# define IDE_HFLAG_OFF_BOARD 0
1107#endif
1108
039788e1 1109struct ide_port_info {
1da177e4 1110 char *name;
1da177e4
LT		 1111 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1112 void (*init_iops)(ide_hwif_t *);
1113 void (*init_hwif)(ide_hwif_t *);
1114 void (*init_dma)(ide_hwif_t *, unsigned long);
1da177e4 1115 ide_pci_enablebit_t enablebits[2];
528a572d 1116 hwif_chipset_t chipset;
3071a9d0 1117 u8 extra;
9ffcf364 1118 u32 host_flags;
4099d143 1119 u8 pio_mask;
5f8b6c34
BZ		 1120 u8 swdma_mask;
1121 u8 mwdma_mask;
18137207 1122 u8 udma_mask;
039788e1 1123};
1da177e4 1124
85620436
BZ		 1125int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1126int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT		 1127
1128void ide_map_sg(ide_drive_t *, struct request *);
1129void ide_init_sg_cmd(ide_drive_t *, struct request *);
1130
1131#define BAD_DMA_DRIVE 0
1132#define GOOD_DMA_DRIVE 1
1133
65e5f2e3
JC		 1134struct drive_list_entry {
1135 const char *id_model;
1136 const char *id_firmware;
1137};
1138
1139int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ		 1140
1141#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1142int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1143int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ		 1144
1145u8 ide_find_dma_mode(ide_drive_t *, u8);
1146
1147static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1148{
1149 return ide_find_dma_mode(drive, XFER_UDMA_6);
1150}
1151
4a546e04 1152void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1153void ide_dma_off(ide_drive_t *);
4a546e04 1154void ide_dma_on(ide_drive_t *);
3608b5d7 1155int ide_set_dma(ide_drive_t *);
1da177e4
LT		 1156ide_startstop_t ide_dma_intr(ide_drive_t *);
1157
1158#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1159extern int ide_build_sglist(ide_drive_t *, struct request *);
1160extern int ide_build_dmatable(ide_drive_t *, struct request *);
1161extern void ide_destroy_dmatable(ide_drive_t *);
1162extern int ide_release_dma(ide_hwif_t *);
ecf32796 1163extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1164
15ce926a 1165void ide_dma_host_set(ide_drive_t *, int);
1da177e4
LT		 1166extern int ide_dma_setup(ide_drive_t *);
1167extern void ide_dma_start(ide_drive_t *);
1168extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1169extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1170extern void ide_dma_timeout(ide_drive_t *);
1da177e4
LT		 1171#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1172
1173#else
3ab7efe8 1174static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1175static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1176static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1177static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1178static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1179static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1180static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1181static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT		 1182#endif /* CONFIG_BLK_DEV_IDEDMA */
1183
1184#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1185static inline void ide_release_dma(ide_hwif_t *drive) {;}
1186#endif
1187
e3a59b4d
HR		 1188#ifdef CONFIG_BLK_DEV_IDEACPI
1189extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1190extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1191extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1192extern void ide_acpi_init(ide_hwif_t *hwif);
5e32132b 1193extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR		 1194#else
1195static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1196static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1197static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1198static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
5e32132b 1199static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR		 1200#endif
1201
1da177e4
LT		 1202extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1203extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1204extern void ide_unregister (unsigned int index);
1205
1206void ide_register_region(struct gendisk *);
1207void ide_unregister_region(struct gendisk *);
1208
f01393e4 1209void ide_undecoded_slave(ide_drive_t *);
1da177e4 1210
b0d5bc27 1211int ide_device_add_all(u8 *idx);
8447d9d5 1212int ide_device_add(u8 idx[4]);
1da177e4
LT		 1213
1214static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1215{
1216 return hwif->hwif_data;
1217}
1218
1219static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1220{
1221 hwif->hwif_data = data;
1222}
1223
3ab7efe8 1224const char *ide_xfer_verbose(u8 mode);
1da177e4
LT		 1225extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1226extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1227
2229833c
BZ		 1228static inline int ide_dev_has_iordy(struct hd_driveid *id)
1229{
1230 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1231}
1232
6c3c22f3
SS		 1233static inline int ide_dev_is_sata(struct hd_driveid *id)
1234{
1235 /*
1236 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1237 * verifying that word 80 by casting it to a signed type --
1238 * this trick allows us to filter out the reserved values of
1239 * 0x0000 and 0xffff along with the earlier ATA revisions...
1240 */
1241 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1242 return 1;
1243 return 0;
1244}
1245
a501633c 1246u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT		 1247u8 ide_dump_status(ide_drive_t *, const char *, u8);
1248
1249typedef struct ide_pio_timings_s {
1250 int setup_time; /* Address setup (ns) minimum */
1251 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS		 1252 int cycle_time; /* Cycle time (ns) minimum = */
1253 /* active + recovery (+ setup for some chips) */
1da177e4
LT		 1254} ide_pio_timings_t;
1255
7dd00083 1256unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1257u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT		 1258extern const ide_pio_timings_t ide_pio_timings[6];
1259
88b2b32b
BZ		 1260int ide_set_pio_mode(ide_drive_t *, u8);
1261int ide_set_dma_mode(ide_drive_t *, u8);
1262
26bcb879
BZ		 1263void ide_set_pio(ide_drive_t *, u8);
1264
1265static inline void ide_set_max_pio(ide_drive_t *drive)
1266{
1267 ide_set_pio(drive, 255);
1268}
1da177e4
LT		 1269
1270extern spinlock_t ide_lock;
ef29888e 1271extern struct mutex ide_cfg_mtx;
1da177e4
LT		 1272/*
1273 * Structure locking:
1274 *
ef29888e 1275 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT		 1276 * ide_hwif_t->{next,hwgroup}
1277 * ide_drive_t->next
1278 *
1279 * ide_hwgroup_t->busy: ide_lock
1280 * ide_hwgroup_t->hwif: ide_lock
1281 * ide_hwif_t->mate: constant, no locking
1282 * ide_drive_t->hwif: constant, no locking
1283 */
1284
366c7f55 1285#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT		 1286
1287extern struct bus_type ide_bus_type;
1288
1289/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1290#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1291
1292/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1293#define ide_id_has_flush_cache_ext(id) \
1294 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1295
7b9f25b5
BZ		 1296static inline void ide_dump_identify(u8 *id)
1297{
1298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1299}
1300
86b37860
CL		 1301static inline int hwif_to_node(ide_hwif_t *hwif)
1302{
36501650 1303 struct pci_dev *dev = to_pci_dev(hwif->dev);
86b37860
CL		 1304 return dev ? pcibus_to_node(dev->bus) : -1;
1305}
1306
1b678347
BH		 1307static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1308{
1309 ide_hwif_t *hwif = HWIF(drive);
1310
1311 return &hwif->drives[(drive->dn ^ 1) & 1];
1312}
1313
81ca6919
BZ		 1314static inline void ide_set_irq(ide_drive_t *drive, int on)
1315{
1316 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1317}
1318
1da177e4 1319#endif /* _IDE_H */
Linux kernel - Deliverables
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