Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
11 | #include <linux/hdreg.h> | |
12 | #include <linux/hdsmart.h> | |
13 | #include <linux/blkdev.h> | |
14 | #include <linux/proc_fs.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/bitops.h> | |
17 | #include <linux/bio.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/pci.h> | |
f36d4024 | 20 | #include <linux/completion.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/semaphore.h> | |
f9383c42 | 28 | #include <asm/mutex.h> |
1da177e4 | 29 | |
1da177e4 LT |
30 | /****************************************************************************** |
31 | * IDE driver configuration options (play with these as desired): | |
32 | * | |
33 | * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary | |
34 | */ | |
35 | #define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */ | |
36 | ||
37 | #ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */ | |
38 | #define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */ | |
39 | #endif | |
40 | #ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */ | |
41 | #define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */ | |
42 | #endif | |
43 | #ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */ | |
44 | #define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */ | |
45 | #endif | |
46 | ||
47 | #ifndef DISABLE_IRQ_NOSYNC | |
48 | #define DISABLE_IRQ_NOSYNC 0 | |
49 | #endif | |
50 | ||
51 | /* | |
52 | * Used to indicate "no IRQ", should be a value that cannot be an IRQ | |
53 | * number. | |
54 | */ | |
55 | ||
56 | #define IDE_NO_IRQ (-1) | |
57 | ||
58 | /* | |
59 | * "No user-serviceable parts" beyond this point :) | |
60 | *****************************************************************************/ | |
61 | ||
62 | typedef unsigned char byte; /* used everywhere */ | |
63 | ||
64 | /* | |
65 | * Probably not wise to fiddle with these | |
66 | */ | |
67 | #define ERROR_MAX 8 /* Max read/write errors per sector */ | |
68 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
69 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
70 | ||
71 | /* | |
72 | * Tune flags | |
73 | */ | |
74 | #define IDE_TUNE_NOAUTO 2 | |
75 | #define IDE_TUNE_AUTO 1 | |
76 | #define IDE_TUNE_DEFAULT 0 | |
77 | ||
78 | /* | |
79 | * state flags | |
80 | */ | |
81 | ||
82 | #define DMA_PIO_RETRY 1 /* retrying in PIO */ | |
83 | ||
84 | #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif)) | |
85 | #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup)) | |
86 | ||
87 | /* | |
88 | * Definitions for accessing IDE controller registers | |
89 | */ | |
90 | #define IDE_NR_PORTS (10) | |
91 | ||
92 | #define IDE_DATA_OFFSET (0) | |
93 | #define IDE_ERROR_OFFSET (1) | |
94 | #define IDE_NSECTOR_OFFSET (2) | |
95 | #define IDE_SECTOR_OFFSET (3) | |
96 | #define IDE_LCYL_OFFSET (4) | |
97 | #define IDE_HCYL_OFFSET (5) | |
98 | #define IDE_SELECT_OFFSET (6) | |
99 | #define IDE_STATUS_OFFSET (7) | |
100 | #define IDE_CONTROL_OFFSET (8) | |
101 | #define IDE_IRQ_OFFSET (9) | |
102 | ||
103 | #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET | |
104 | #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET | |
105 | ||
106 | #define IDE_CONTROL_OFFSET_HOB (7) | |
107 | ||
108 | #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET]) | |
109 | #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET]) | |
110 | #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET]) | |
111 | #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET]) | |
112 | #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET]) | |
113 | #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET]) | |
114 | #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET]) | |
115 | #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET]) | |
116 | #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET]) | |
117 | #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET]) | |
118 | ||
119 | #define IDE_FEATURE_REG IDE_ERROR_REG | |
120 | #define IDE_COMMAND_REG IDE_STATUS_REG | |
121 | #define IDE_ALTSTATUS_REG IDE_CONTROL_REG | |
122 | #define IDE_IREASON_REG IDE_NSECTOR_REG | |
123 | #define IDE_BCOUNTL_REG IDE_LCYL_REG | |
124 | #define IDE_BCOUNTH_REG IDE_HCYL_REG | |
125 | ||
126 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
127 | #define BAD_R_STAT (BUSY_STAT | ERR_STAT) | |
128 | #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT) | |
129 | #define BAD_STAT (BAD_R_STAT | DRQ_STAT) | |
130 | #define DRIVE_READY (READY_STAT | SEEK_STAT) | |
131 | #define DATA_READY (DRQ_STAT) | |
132 | ||
133 | #define BAD_CRC (ABRT_ERR | ICRC_ERR) | |
134 | ||
135 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
136 | ||
137 | #define SATA_STATUS_OFFSET (0) | |
138 | #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET]) | |
139 | #define SATA_ERROR_OFFSET (1) | |
140 | #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET]) | |
141 | #define SATA_CONTROL_OFFSET (2) | |
142 | #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET]) | |
143 | ||
144 | #define SATA_MISC_OFFSET (0) | |
145 | #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET]) | |
146 | #define SATA_PHY_OFFSET (1) | |
147 | #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET]) | |
148 | #define SATA_IEN_OFFSET (2) | |
149 | #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET]) | |
150 | ||
151 | /* | |
152 | * Our Physical Region Descriptor (PRD) table should be large enough | |
153 | * to handle the biggest I/O request we are likely to see. Since requests | |
154 | * can have no more than 256 sectors, and since the typical blocksize is | |
155 | * two or more sectors, we could get by with a limit of 128 entries here for | |
156 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
157 | * further reducing the number of table entries required. | |
158 | * | |
159 | * The driver reverts to PIO mode for individual requests that exceed | |
160 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
161 | * 100% of all crazy scenarios here is not necessary. | |
162 | * | |
163 | * As it turns out though, we must allocate a full 4KB page for this, | |
164 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
165 | * allowing each to have about 256 entries (8 bytes each) from this. | |
166 | */ | |
167 | #define PRD_BYTES 8 | |
168 | #define PRD_ENTRIES 256 | |
169 | ||
170 | /* | |
171 | * Some more useful definitions | |
172 | */ | |
173 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
174 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
175 | #define SECTOR_SIZE 512 | |
176 | #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */ | |
177 | #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t))) | |
178 | ||
179 | /* | |
180 | * Timeouts for various operations: | |
181 | */ | |
182 | #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */ | |
183 | #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */ | |
184 | #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
185 | #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */ | |
186 | #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ | |
187 | #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */ | |
188 | ||
1da177e4 LT |
189 | /* |
190 | * Check for an interrupt and acknowledge the interrupt status | |
191 | */ | |
192 | struct hwif_s; | |
193 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
194 | ||
195 | #ifndef NO_DMA | |
196 | #define NO_DMA 255 | |
197 | #endif | |
198 | ||
199 | /* | |
200 | * hwif_chipset_t is used to keep track of the specific hardware | |
201 | * chipset used by each IDE interface, if known. | |
202 | */ | |
528a572d | 203 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
204 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
205 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
206 | ide_rz1000, ide_trm290, | |
207 | ide_cmd646, ide_cy82c693, ide_4drives, | |
208 | ide_pmac, ide_etrax100, ide_acorn, | |
26a940e2 | 209 | ide_au1xxx, ide_forced |
528a572d BZ |
210 | }; |
211 | ||
212 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
213 | |
214 | /* | |
215 | * Structure to hold all information about the location of this port | |
216 | */ | |
217 | typedef struct hw_regs_s { | |
218 | unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */ | |
219 | int irq; /* our irq number */ | |
220 | int dma; /* our dma entry */ | |
221 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ | |
222 | hwif_chipset_t chipset; | |
4349d5cd | 223 | struct device *dev; |
1da177e4 LT |
224 | } hw_regs_t; |
225 | ||
226 | /* | |
227 | * Register new hardware with ide | |
228 | */ | |
869c56ee BZ |
229 | int ide_register_hw(hw_regs_t *, int, struct hwif_s **); |
230 | int ide_register_hw_with_fixup(hw_regs_t *, int, struct hwif_s **, | |
231 | void (*)(struct hwif_s *)); | |
1da177e4 LT |
232 | |
233 | /* | |
234 | * Set up hw_regs_t structure before calling ide_register_hw (optional) | |
235 | */ | |
236 | void ide_setup_ports( hw_regs_t *hw, | |
237 | unsigned long base, | |
238 | int *offsets, | |
239 | unsigned long ctrl, | |
240 | unsigned long intr, | |
241 | ide_ack_intr_t *ack_intr, | |
242 | #if 0 | |
243 | ide_io_ops_t *iops, | |
244 | #endif | |
245 | int irq); | |
246 | ||
247 | static inline void ide_std_init_ports(hw_regs_t *hw, | |
248 | unsigned long io_addr, | |
249 | unsigned long ctl_addr) | |
250 | { | |
251 | unsigned int i; | |
252 | ||
253 | for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) | |
254 | hw->io_ports[i] = io_addr++; | |
255 | ||
256 | hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr; | |
257 | } | |
258 | ||
259 | #include <asm/ide.h> | |
260 | ||
83d7dbc4 MM |
261 | #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED) |
262 | #undef MAX_HWIFS | |
83ae20c8 BH |
263 | #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS |
264 | #endif | |
265 | ||
1da177e4 LT |
266 | /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */ |
267 | #ifndef IDE_ARCH_OBSOLETE_DEFAULTS | |
268 | # define ide_default_io_base(index) (0) | |
269 | # define ide_default_irq(base) (0) | |
270 | # define ide_init_default_irq(base) (0) | |
271 | #endif | |
272 | ||
273 | /* | |
274 | * ide_init_hwif_ports() is OBSOLETE and will be removed in 2.7 series. | |
275 | * New ports shouldn't define IDE_ARCH_OBSOLETE_INIT in <asm/ide.h>. | |
276 | */ | |
277 | #ifdef IDE_ARCH_OBSOLETE_INIT | |
278 | static inline void ide_init_hwif_ports(hw_regs_t *hw, | |
279 | unsigned long io_addr, | |
280 | unsigned long ctl_addr, | |
281 | int *irq) | |
282 | { | |
283 | if (!ctl_addr) | |
284 | ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr)); | |
285 | else | |
286 | ide_std_init_ports(hw, io_addr, ctl_addr); | |
287 | ||
288 | if (irq) | |
289 | *irq = 0; | |
290 | ||
291 | hw->io_ports[IDE_IRQ_OFFSET] = 0; | |
292 | ||
293 | #ifdef CONFIG_PPC32 | |
294 | if (ppc_ide_md.ide_init_hwif) | |
295 | ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq); | |
296 | #endif | |
297 | } | |
298 | #else | |
299 | static inline void ide_init_hwif_ports(hw_regs_t *hw, | |
300 | unsigned long io_addr, | |
301 | unsigned long ctl_addr, | |
302 | int *irq) | |
303 | { | |
304 | if (io_addr || ctl_addr) | |
305 | printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__); | |
306 | } | |
307 | #endif /* IDE_ARCH_OBSOLETE_INIT */ | |
308 | ||
309 | /* Currently only m68k, apus and m8xx need it */ | |
310 | #ifndef IDE_ARCH_ACK_INTR | |
311 | # define ide_ack_intr(hwif) (1) | |
312 | #endif | |
313 | ||
314 | /* Currently only Atari needs it */ | |
315 | #ifndef IDE_ARCH_LOCK | |
316 | # define ide_release_lock() do {} while (0) | |
317 | # define ide_get_lock(hdlr, data) do {} while (0) | |
318 | #endif /* IDE_ARCH_LOCK */ | |
319 | ||
320 | /* | |
321 | * Now for the data we need to maintain per-drive: ide_drive_t | |
322 | */ | |
323 | ||
324 | #define ide_scsi 0x21 | |
325 | #define ide_disk 0x20 | |
326 | #define ide_optical 0x7 | |
327 | #define ide_cdrom 0x5 | |
328 | #define ide_tape 0x1 | |
329 | #define ide_floppy 0x0 | |
330 | ||
331 | /* | |
332 | * Special Driver Flags | |
333 | * | |
334 | * set_geometry : respecify drive geometry | |
335 | * recalibrate : seek to cyl 0 | |
336 | * set_multmode : set multmode count | |
337 | * set_tune : tune interface for drive | |
338 | * serviced : service command | |
339 | * reserved : unused | |
340 | */ | |
341 | typedef union { | |
342 | unsigned all : 8; | |
343 | struct { | |
344 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
345 | unsigned set_geometry : 1; | |
346 | unsigned recalibrate : 1; | |
347 | unsigned set_multmode : 1; | |
348 | unsigned set_tune : 1; | |
349 | unsigned serviced : 1; | |
350 | unsigned reserved : 3; | |
351 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
352 | unsigned reserved : 3; | |
353 | unsigned serviced : 1; | |
354 | unsigned set_tune : 1; | |
355 | unsigned set_multmode : 1; | |
356 | unsigned recalibrate : 1; | |
357 | unsigned set_geometry : 1; | |
358 | #else | |
359 | #error "Please fix <asm/byteorder.h>" | |
360 | #endif | |
361 | } b; | |
362 | } special_t; | |
363 | ||
364 | /* | |
365 | * ATA DATA Register Special. | |
366 | * ATA NSECTOR Count Register(). | |
367 | * ATAPI Byte Count Register. | |
368 | * Channel index ordering pairs. | |
369 | */ | |
370 | typedef union { | |
371 | unsigned all :16; | |
372 | struct { | |
373 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
374 | unsigned low :8; /* LSB */ | |
375 | unsigned high :8; /* MSB */ | |
376 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
377 | unsigned high :8; /* MSB */ | |
378 | unsigned low :8; /* LSB */ | |
379 | #else | |
380 | #error "Please fix <asm/byteorder.h>" | |
381 | #endif | |
382 | } b; | |
383 | } ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t; | |
384 | ||
1da177e4 LT |
385 | /* |
386 | * ATA-IDE Select Register, aka Device-Head | |
387 | * | |
388 | * head : always zeros here | |
389 | * unit : drive select number: 0/1 | |
390 | * bit5 : always 1 | |
391 | * lba : using LBA instead of CHS | |
392 | * bit7 : always 1 | |
393 | */ | |
394 | typedef union { | |
395 | unsigned all : 8; | |
396 | struct { | |
397 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
398 | unsigned head : 4; | |
399 | unsigned unit : 1; | |
400 | unsigned bit5 : 1; | |
401 | unsigned lba : 1; | |
402 | unsigned bit7 : 1; | |
403 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
404 | unsigned bit7 : 1; | |
405 | unsigned lba : 1; | |
406 | unsigned bit5 : 1; | |
407 | unsigned unit : 1; | |
408 | unsigned head : 4; | |
409 | #else | |
410 | #error "Please fix <asm/byteorder.h>" | |
411 | #endif | |
412 | } b; | |
413 | } select_t, ata_select_t; | |
414 | ||
415 | /* | |
416 | * The ATA-IDE Status Register. | |
417 | * The ATAPI Status Register. | |
418 | * | |
419 | * check : Error occurred | |
420 | * idx : Index Error | |
421 | * corr : Correctable error occurred | |
422 | * drq : Data is request by the device | |
423 | * dsc : Disk Seek Complete : ata | |
424 | * : Media access command finished : atapi | |
425 | * df : Device Fault : ata | |
426 | * : Reserved : atapi | |
427 | * drdy : Ready, Command Mode Capable : ata | |
428 | * : Ignored for ATAPI commands : atapi | |
429 | * bsy : Disk is Busy | |
430 | * : The device has access to the command block | |
431 | */ | |
432 | typedef union { | |
433 | unsigned all :8; | |
434 | struct { | |
435 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
436 | unsigned check :1; | |
437 | unsigned idx :1; | |
438 | unsigned corr :1; | |
439 | unsigned drq :1; | |
440 | unsigned dsc :1; | |
441 | unsigned df :1; | |
442 | unsigned drdy :1; | |
443 | unsigned bsy :1; | |
444 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
445 | unsigned bsy :1; | |
446 | unsigned drdy :1; | |
447 | unsigned df :1; | |
448 | unsigned dsc :1; | |
449 | unsigned drq :1; | |
450 | unsigned corr :1; | |
451 | unsigned idx :1; | |
452 | unsigned check :1; | |
453 | #else | |
454 | #error "Please fix <asm/byteorder.h>" | |
455 | #endif | |
456 | } b; | |
457 | } ata_status_t, atapi_status_t; | |
458 | ||
1da177e4 LT |
459 | /* |
460 | * ATAPI Feature Register | |
461 | * | |
462 | * dma : Using DMA or PIO | |
463 | * reserved321 : Reserved | |
464 | * reserved654 : Reserved (Tag Type) | |
465 | * reserved7 : Reserved | |
466 | */ | |
467 | typedef union { | |
468 | unsigned all :8; | |
469 | struct { | |
470 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
471 | unsigned dma :1; | |
472 | unsigned reserved321 :3; | |
473 | unsigned reserved654 :3; | |
474 | unsigned reserved7 :1; | |
475 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
476 | unsigned reserved7 :1; | |
477 | unsigned reserved654 :3; | |
478 | unsigned reserved321 :3; | |
479 | unsigned dma :1; | |
480 | #else | |
481 | #error "Please fix <asm/byteorder.h>" | |
482 | #endif | |
483 | } b; | |
484 | } atapi_feature_t; | |
485 | ||
486 | /* | |
487 | * ATAPI Interrupt Reason Register. | |
488 | * | |
489 | * cod : Information transferred is command (1) or data (0) | |
490 | * io : The device requests us to read (1) or write (0) | |
491 | * reserved : Reserved | |
492 | */ | |
493 | typedef union { | |
494 | unsigned all :8; | |
495 | struct { | |
496 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
497 | unsigned cod :1; | |
498 | unsigned io :1; | |
499 | unsigned reserved :6; | |
500 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
501 | unsigned reserved :6; | |
502 | unsigned io :1; | |
503 | unsigned cod :1; | |
504 | #else | |
505 | #error "Please fix <asm/byteorder.h>" | |
506 | #endif | |
507 | } b; | |
508 | } atapi_ireason_t; | |
509 | ||
510 | /* | |
511 | * The ATAPI error register. | |
512 | * | |
513 | * ili : Illegal Length Indication | |
514 | * eom : End Of Media Detected | |
515 | * abrt : Aborted command - As defined by ATA | |
516 | * mcr : Media Change Requested - As defined by ATA | |
517 | * sense_key : Sense key of the last failed packet command | |
518 | */ | |
519 | typedef union { | |
520 | unsigned all :8; | |
521 | struct { | |
522 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
523 | unsigned ili :1; | |
524 | unsigned eom :1; | |
525 | unsigned abrt :1; | |
526 | unsigned mcr :1; | |
527 | unsigned sense_key :4; | |
528 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
529 | unsigned sense_key :4; | |
530 | unsigned mcr :1; | |
531 | unsigned abrt :1; | |
532 | unsigned eom :1; | |
533 | unsigned ili :1; | |
534 | #else | |
535 | #error "Please fix <asm/byteorder.h>" | |
536 | #endif | |
537 | } b; | |
538 | } atapi_error_t; | |
539 | ||
1da177e4 LT |
540 | /* |
541 | * Status returned from various ide_ functions | |
542 | */ | |
543 | typedef enum { | |
544 | ide_stopped, /* no drive operation was started */ | |
545 | ide_started, /* a drive operation was started, handler was set */ | |
546 | } ide_startstop_t; | |
547 | ||
548 | struct ide_driver_s; | |
549 | struct ide_settings_s; | |
550 | ||
e3a59b4d HR |
551 | #ifdef CONFIG_BLK_DEV_IDEACPI |
552 | struct ide_acpi_drive_link; | |
553 | struct ide_acpi_hwif_link; | |
554 | #endif | |
555 | ||
1da177e4 LT |
556 | typedef struct ide_drive_s { |
557 | char name[4]; /* drive name, such as "hda" */ | |
558 | char driver_req[10]; /* requests specific driver */ | |
559 | ||
165125e1 | 560 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
561 | |
562 | struct request *rq; /* current request */ | |
563 | struct ide_drive_s *next; /* circular list of hwgroup drives */ | |
1da177e4 LT |
564 | void *driver_data; /* extra driver data */ |
565 | struct hd_driveid *id; /* drive model identification info */ | |
7662d046 | 566 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 LT |
567 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
568 | struct ide_settings_s *settings;/* /proc/ide/ drive settings */ | |
7662d046 | 569 | #endif |
1da177e4 LT |
570 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
571 | ||
572 | unsigned long sleep; /* sleep until this time */ | |
573 | unsigned long service_start; /* time we started last request */ | |
574 | unsigned long service_time; /* service time of last request */ | |
575 | unsigned long timeout; /* max time to wait for irq */ | |
576 | ||
577 | special_t special; /* special action flags */ | |
578 | select_t select; /* basic drive/head select reg value */ | |
579 | ||
580 | u8 keep_settings; /* restore settings after drive reset */ | |
1da177e4 LT |
581 | u8 using_dma; /* disk is using dma for read/write */ |
582 | u8 retry_pio; /* retrying dma capable host in pio */ | |
583 | u8 state; /* retry state */ | |
584 | u8 waiting_for_dma; /* dma currently in progress */ | |
585 | u8 unmask; /* okay to unmask other irqs */ | |
586 | u8 bswap; /* byte swap data */ | |
36193484 | 587 | u8 noflush; /* don't attempt flushes */ |
1da177e4 LT |
588 | u8 dsc_overlap; /* DSC overlap */ |
589 | u8 nice1; /* give potential excess bandwidth */ | |
590 | ||
591 | unsigned present : 1; /* drive is physically present */ | |
592 | unsigned dead : 1; /* device ejected hint */ | |
593 | unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */ | |
594 | unsigned noprobe : 1; /* from: hdx=noprobe */ | |
595 | unsigned removable : 1; /* 1 if need to do check_media_change */ | |
596 | unsigned attach : 1; /* needed for removable devices */ | |
1da177e4 LT |
597 | unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */ |
598 | unsigned no_unmask : 1; /* disallow setting unmask bit */ | |
599 | unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */ | |
600 | unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */ | |
601 | unsigned nice0 : 1; /* give obvious excess bandwidth */ | |
602 | unsigned nice2 : 1; /* give a share in our own bandwidth */ | |
603 | unsigned doorlocking : 1; /* for removable only: door lock/unlock works */ | |
c223701c | 604 | unsigned nodma : 1; /* disallow DMA */ |
1da177e4 LT |
605 | unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */ |
606 | unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */ | |
607 | unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */ | |
608 | unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */ | |
1da177e4 LT |
609 | unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */ |
610 | unsigned sleeping : 1; /* 1=sleeping & sleep field valid */ | |
611 | unsigned post_reset : 1; | |
7f8f48af | 612 | unsigned udma33_warned : 1; |
1da177e4 | 613 | |
1497943e | 614 | u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */ |
1da177e4 LT |
615 | u8 quirk_list; /* considered quirky, set for a specific host */ |
616 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 617 | u8 current_speed; /* current transfer rate set */ |
513daadd | 618 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 LT |
619 | u8 dn; /* now wide spread use */ |
620 | u8 wcache; /* status of write cache */ | |
621 | u8 acoustic; /* acoustic management */ | |
622 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
623 | u8 ctl; /* "normal" value for IDE_CONTROL_REG */ | |
624 | u8 ready_stat; /* min status value for drive ready */ | |
625 | u8 mult_count; /* current multiple sector setting */ | |
626 | u8 mult_req; /* requested multiple sector setting */ | |
627 | u8 tune_req; /* requested drive tuning setting */ | |
628 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ | |
629 | u8 bad_wstat; /* used for ignoring WRERR_STAT */ | |
630 | u8 nowerr; /* used for ignoring WRERR_STAT */ | |
631 | u8 sect0; /* offset of first sector for DM6:DDO */ | |
632 | u8 head; /* "real" number of heads */ | |
633 | u8 sect; /* "real" sectors per track */ | |
634 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
635 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
636 | ||
637 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ | |
638 | unsigned int cyl; /* "real" number of cyls */ | |
26bcb879 | 639 | unsigned int drive_data; /* used by set_pio_mode/selectproc */ |
1da177e4 LT |
640 | unsigned int failures; /* current failure count */ |
641 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 642 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
643 | |
644 | u64 capacity64; /* total number of sectors */ | |
645 | ||
646 | int lun; /* logical unit */ | |
647 | int crc_count; /* crc counter to reduce drive speed */ | |
e3a59b4d HR |
648 | #ifdef CONFIG_BLK_DEV_IDEACPI |
649 | struct ide_acpi_drive_link *acpidata; | |
650 | #endif | |
1da177e4 LT |
651 | struct list_head list; |
652 | struct device gendev; | |
f36d4024 | 653 | struct completion gendev_rel_comp; /* to deal with device release() */ |
1da177e4 LT |
654 | } ide_drive_t; |
655 | ||
8604affd BZ |
656 | #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev) |
657 | ||
1da177e4 LT |
658 | #define IDE_CHIPSET_PCI_MASK \ |
659 | ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx)) | |
660 | #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1) | |
661 | ||
662 | struct ide_pci_device_s; | |
663 | ||
664 | typedef struct hwif_s { | |
665 | struct hwif_s *next; /* for linked-list in ide_hwgroup_t */ | |
666 | struct hwif_s *mate; /* other hwif from same PCI chip */ | |
667 | struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */ | |
668 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ | |
669 | ||
670 | char name[6]; /* name of interface, eg. "ide0" */ | |
671 | ||
672 | /* task file registers for pata and sata */ | |
673 | unsigned long io_ports[IDE_NR_PORTS]; | |
674 | unsigned long sata_scr[SATA_NR_PORTS]; | |
675 | unsigned long sata_misc[SATA_NR_PORTS]; | |
676 | ||
677 | hw_regs_t hw; /* Hardware info */ | |
678 | ide_drive_t drives[MAX_DRIVES]; /* drive info */ | |
679 | ||
680 | u8 major; /* our major number */ | |
681 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
682 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
683 | u8 straight8; /* Alan's straight 8 check */ | |
684 | u8 bus_state; /* power state of the IDE bus */ | |
685 | ||
88b2b32b | 686 | u16 host_flags; |
6a824c92 | 687 | |
4099d143 BZ |
688 | u8 pio_mask; |
689 | ||
1da177e4 LT |
690 | u8 ultra_mask; |
691 | u8 mwdma_mask; | |
692 | u8 swdma_mask; | |
693 | ||
49521f97 BZ |
694 | u8 cbl; /* cable type */ |
695 | ||
1da177e4 LT |
696 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
697 | ||
698 | struct pci_dev *pci_dev; /* for pci chipsets */ | |
699 | struct ide_pci_device_s *cds; /* chipset device struct */ | |
700 | ||
701 | void (*rw_disk)(ide_drive_t *, struct request *); | |
702 | ||
703 | #if 0 | |
704 | ide_hwif_ops_t *hwifops; | |
705 | #else | |
88b2b32b | 706 | /* routine to program host for PIO mode */ |
26bcb879 | 707 | void (*set_pio_mode)(ide_drive_t *, const u8); |
88b2b32b BZ |
708 | /* routine to program host for DMA mode */ |
709 | void (*set_dma_mode)(ide_drive_t *, const u8); | |
1da177e4 LT |
710 | /* tweaks hardware to select drive */ |
711 | void (*selectproc)(ide_drive_t *); | |
712 | /* chipset polling based on hba specifics */ | |
713 | int (*reset_poll)(ide_drive_t *); | |
714 | /* chipset specific changes to default for device-hba resets */ | |
715 | void (*pre_reset)(ide_drive_t *); | |
716 | /* routine to reset controller after a disk reset */ | |
717 | void (*resetproc)(ide_drive_t *); | |
718 | /* special interrupt handling for shared pci interrupts */ | |
719 | void (*intrproc)(ide_drive_t *); | |
720 | /* special host masking for drive selection */ | |
721 | void (*maskproc)(ide_drive_t *, int); | |
722 | /* check host's drive quirk list */ | |
723 | int (*quirkproc)(ide_drive_t *); | |
724 | /* driver soft-power interface */ | |
725 | int (*busproc)(ide_drive_t *, int); | |
1da177e4 | 726 | #endif |
b4e44369 | 727 | u8 (*mdma_filter)(ide_drive_t *); |
2d5eaa6d | 728 | u8 (*udma_filter)(ide_drive_t *); |
1da177e4 LT |
729 | |
730 | void (*ata_input_data)(ide_drive_t *, void *, u32); | |
731 | void (*ata_output_data)(ide_drive_t *, void *, u32); | |
732 | ||
733 | void (*atapi_input_bytes)(ide_drive_t *, void *, u32); | |
734 | void (*atapi_output_bytes)(ide_drive_t *, void *, u32); | |
735 | ||
736 | int (*dma_setup)(ide_drive_t *); | |
737 | void (*dma_exec_cmd)(ide_drive_t *, u8); | |
738 | void (*dma_start)(ide_drive_t *); | |
739 | int (*ide_dma_end)(ide_drive_t *drive); | |
1da177e4 | 740 | int (*ide_dma_on)(ide_drive_t *drive); |
7469aaf6 | 741 | void (*dma_off_quietly)(ide_drive_t *drive); |
1da177e4 | 742 | int (*ide_dma_test_irq)(ide_drive_t *drive); |
f0dd8712 | 743 | void (*ide_dma_clear_irq)(ide_drive_t *drive); |
ccf35289 | 744 | void (*dma_host_on)(ide_drive_t *drive); |
7469aaf6 | 745 | void (*dma_host_off)(ide_drive_t *drive); |
841d2a9b | 746 | void (*dma_lost_irq)(ide_drive_t *drive); |
c283f5db | 747 | void (*dma_timeout)(ide_drive_t *drive); |
1da177e4 LT |
748 | |
749 | void (*OUTB)(u8 addr, unsigned long port); | |
750 | void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); | |
751 | void (*OUTW)(u16 addr, unsigned long port); | |
1da177e4 LT |
752 | void (*OUTSW)(unsigned long port, void *addr, u32 count); |
753 | void (*OUTSL)(unsigned long port, void *addr, u32 count); | |
754 | ||
755 | u8 (*INB)(unsigned long port); | |
756 | u16 (*INW)(unsigned long port); | |
1da177e4 LT |
757 | void (*INSW)(unsigned long port, void *addr, u32 count); |
758 | void (*INSL)(unsigned long port, void *addr, u32 count); | |
759 | ||
760 | /* dma physical region descriptor table (cpu view) */ | |
761 | unsigned int *dmatable_cpu; | |
762 | /* dma physical region descriptor table (dma view) */ | |
763 | dma_addr_t dmatable_dma; | |
764 | /* Scatter-gather list used to build the above */ | |
765 | struct scatterlist *sg_table; | |
766 | int sg_max_nents; /* Maximum number of entries in it */ | |
767 | int sg_nents; /* Current number of entries in it */ | |
768 | int sg_dma_direction; /* dma transfer direction */ | |
769 | ||
770 | /* data phase of the active command (currently only valid for PIO/DMA) */ | |
771 | int data_phase; | |
772 | ||
773 | unsigned int nsect; | |
774 | unsigned int nleft; | |
55c16a70 | 775 | struct scatterlist *cursg; |
1da177e4 LT |
776 | unsigned int cursg_ofs; |
777 | ||
1da177e4 LT |
778 | int rqsize; /* max sectors per request */ |
779 | int irq; /* our irq number */ | |
780 | ||
781 | unsigned long dma_master; /* reference base addr dmabase */ | |
782 | unsigned long dma_base; /* base addr for dma ports */ | |
783 | unsigned long dma_command; /* dma command register */ | |
784 | unsigned long dma_vendor1; /* dma vendor 1 register */ | |
785 | unsigned long dma_status; /* dma status register */ | |
786 | unsigned long dma_vendor3; /* dma vendor 3 register */ | |
787 | unsigned long dma_prdtable; /* actual prd table address */ | |
1da177e4 | 788 | |
1da177e4 LT |
789 | unsigned long config_data; /* for use by chipset-specific code */ |
790 | unsigned long select_data; /* for use by chipset-specific code */ | |
791 | ||
020e322d SS |
792 | unsigned long extra_base; /* extra addr for dma ports */ |
793 | unsigned extra_ports; /* number of extra dma ports */ | |
794 | ||
1da177e4 LT |
795 | unsigned noprobe : 1; /* don't probe for this interface */ |
796 | unsigned present : 1; /* this interface exists */ | |
797 | unsigned hold : 1; /* this interface is always present */ | |
798 | unsigned serialized : 1; /* serialized all channel operation */ | |
799 | unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ | |
800 | unsigned reset : 1; /* reset after probe */ | |
1da177e4 LT |
801 | unsigned auto_poll : 1; /* supports nop auto-poll */ |
802 | unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ | |
208a08f7 | 803 | unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */ |
2ad1e558 | 804 | unsigned mmio : 1; /* host uses MMIO */ |
1da177e4 LT |
805 | |
806 | struct device gendev; | |
f36d4024 | 807 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
808 | |
809 | void *hwif_data; /* extra hwif data */ | |
810 | ||
811 | unsigned dma; | |
e3a59b4d HR |
812 | |
813 | #ifdef CONFIG_BLK_DEV_IDEACPI | |
814 | struct ide_acpi_hwif_link *acpidata; | |
815 | #endif | |
22fc6ecc | 816 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 LT |
817 | |
818 | /* | |
819 | * internal ide interrupt handler type | |
820 | */ | |
821 | typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *); | |
822 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); | |
823 | typedef int (ide_expiry_t)(ide_drive_t *); | |
824 | ||
825 | typedef struct hwgroup_s { | |
826 | /* irq handler, if active */ | |
827 | ide_startstop_t (*handler)(ide_drive_t *); | |
828 | /* irq handler, suspended if active */ | |
829 | ide_startstop_t (*handler_save)(ide_drive_t *); | |
830 | /* BOOL: protects all fields below */ | |
831 | volatile int busy; | |
832 | /* BOOL: wake us up on timer expiry */ | |
833 | unsigned int sleeping : 1; | |
834 | /* BOOL: polling active & poll_timeout field valid */ | |
835 | unsigned int polling : 1; | |
913759ac AC |
836 | /* BOOL: in a polling reset situation. Must not trigger another reset yet */ |
837 | unsigned int resetting : 1; | |
838 | ||
1da177e4 LT |
839 | /* current drive */ |
840 | ide_drive_t *drive; | |
841 | /* ptr to current hwif in linked-list */ | |
842 | ide_hwif_t *hwif; | |
843 | ||
844 | /* for pci chipsets */ | |
845 | struct pci_dev *pci_dev; | |
846 | /* chipset device struct */ | |
847 | struct ide_pci_device_s *cds; | |
848 | ||
849 | /* current request */ | |
850 | struct request *rq; | |
851 | /* failsafe timer */ | |
852 | struct timer_list timer; | |
853 | /* local copy of current write rq */ | |
854 | struct request wrq; | |
855 | /* timeout value during long polls */ | |
856 | unsigned long poll_timeout; | |
857 | /* queried upon timeouts */ | |
858 | int (*expiry)(ide_drive_t *); | |
859 | /* ide_system_bus_speed */ | |
860 | int pio_clock; | |
23450319 SS |
861 | int req_gen; |
862 | int req_gen_timer; | |
1da177e4 LT |
863 | |
864 | unsigned char cmd_buf[4]; | |
865 | } ide_hwgroup_t; | |
866 | ||
7662d046 BZ |
867 | typedef struct ide_driver_s ide_driver_t; |
868 | ||
f9383c42 | 869 | extern struct mutex ide_setting_mtx; |
1da177e4 | 870 | |
7662d046 BZ |
871 | int set_io_32bit(ide_drive_t *, int); |
872 | int set_pio_mode(ide_drive_t *, int); | |
873 | int set_using_dma(ide_drive_t *, int); | |
874 | ||
875 | #ifdef CONFIG_IDE_PROC_FS | |
1da177e4 LT |
876 | /* |
877 | * configurable drive settings | |
878 | */ | |
879 | ||
880 | #define TYPE_INT 0 | |
1497943e BZ |
881 | #define TYPE_BYTE 1 |
882 | #define TYPE_SHORT 2 | |
1da177e4 LT |
883 | |
884 | #define SETTING_READ (1 << 0) | |
885 | #define SETTING_WRITE (1 << 1) | |
886 | #define SETTING_RW (SETTING_READ | SETTING_WRITE) | |
887 | ||
888 | typedef int (ide_procset_t)(ide_drive_t *, int); | |
889 | typedef struct ide_settings_s { | |
890 | char *name; | |
891 | int rw; | |
1da177e4 LT |
892 | int data_type; |
893 | int min; | |
894 | int max; | |
895 | int mul_factor; | |
896 | int div_factor; | |
897 | void *data; | |
898 | ide_procset_t *set; | |
899 | int auto_remove; | |
900 | struct ide_settings_s *next; | |
901 | } ide_settings_t; | |
902 | ||
1497943e | 903 | int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set); |
1da177e4 LT |
904 | |
905 | /* | |
906 | * /proc/ide interface | |
907 | */ | |
908 | typedef struct { | |
909 | const char *name; | |
910 | mode_t mode; | |
911 | read_proc_t *read_proc; | |
912 | write_proc_t *write_proc; | |
913 | } ide_proc_entry_t; | |
914 | ||
ecfd80e4 BZ |
915 | void proc_ide_create(void); |
916 | void proc_ide_destroy(void); | |
5cbf79cd BZ |
917 | void ide_proc_register_port(ide_hwif_t *); |
918 | void ide_proc_unregister_port(ide_hwif_t *); | |
7662d046 BZ |
919 | void ide_proc_register_driver(ide_drive_t *, ide_driver_t *); |
920 | void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *); | |
921 | ||
922 | void ide_add_generic_settings(ide_drive_t *); | |
923 | ||
1da177e4 LT |
924 | read_proc_t proc_ide_read_capacity; |
925 | read_proc_t proc_ide_read_geometry; | |
926 | ||
927 | #ifdef CONFIG_BLK_DEV_IDEPCI | |
928 | void ide_pci_create_host_proc(const char *, get_info_t *); | |
929 | #endif | |
930 | ||
931 | /* | |
932 | * Standard exit stuff: | |
933 | */ | |
934 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
935 | { \ | |
936 | len -= off; \ | |
937 | if (len < count) { \ | |
938 | *eof = 1; \ | |
939 | if (len <= 0) \ | |
940 | return 0; \ | |
941 | } else \ | |
942 | len = count; \ | |
943 | *start = page + off; \ | |
944 | return len; \ | |
945 | } | |
946 | #else | |
ecfd80e4 BZ |
947 | static inline void proc_ide_create(void) { ; } |
948 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd BZ |
949 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
950 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } | |
7662d046 BZ |
951 | static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } |
952 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } | |
953 | static inline void ide_add_generic_settings(ide_drive_t *drive) { ; } | |
1da177e4 LT |
954 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
955 | #endif | |
956 | ||
957 | /* | |
958 | * Power Management step value (rq->pm->pm_step). | |
959 | * | |
960 | * The step value starts at 0 (ide_pm_state_start_suspend) for a | |
961 | * suspend operation or 1000 (ide_pm_state_start_resume) for a | |
962 | * resume operation. | |
963 | * | |
964 | * For each step, the core calls the subdriver start_power_step() first. | |
965 | * This can return: | |
966 | * - ide_stopped : In this case, the core calls us back again unless | |
967 | * step have been set to ide_power_state_completed. | |
968 | * - ide_started : In this case, the channel is left busy until an | |
969 | * async event (interrupt) occurs. | |
970 | * Typically, start_power_step() will issue a taskfile request with | |
971 | * do_rw_taskfile(). | |
972 | * | |
973 | * Upon reception of the interrupt, the core will call complete_power_step() | |
974 | * with the error code if any. This routine should update the step value | |
975 | * and return. It should not start a new request. The core will call | |
976 | * start_power_step for the new step value, unless step have been set to | |
977 | * ide_power_state_completed. | |
978 | * | |
979 | * Subdrivers are expected to define their own additional power | |
980 | * steps from 1..999 for suspend and from 1001..1999 for resume, | |
981 | * other values are reserved for future use. | |
982 | */ | |
983 | ||
984 | enum { | |
985 | ide_pm_state_completed = -1, | |
986 | ide_pm_state_start_suspend = 0, | |
987 | ide_pm_state_start_resume = 1000, | |
988 | }; | |
989 | ||
990 | /* | |
991 | * Subdrivers support. | |
4ef3b8f4 LR |
992 | * |
993 | * The gendriver.owner field should be set to the module owner of this driver. | |
994 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 995 | */ |
7662d046 | 996 | struct ide_driver_s { |
1da177e4 LT |
997 | const char *version; |
998 | u8 media; | |
1da177e4 | 999 | unsigned supports_dsc_overlap : 1; |
1da177e4 LT |
1000 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
1001 | int (*end_request)(ide_drive_t *, int, int); | |
1002 | ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8); | |
1003 | ide_startstop_t (*abort)(ide_drive_t *, struct request *rq); | |
1da177e4 | 1004 | struct device_driver gen_driver; |
4031bbe4 RK |
1005 | int (*probe)(ide_drive_t *); |
1006 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 1007 | void (*resume)(ide_drive_t *); |
4031bbe4 | 1008 | void (*shutdown)(ide_drive_t *); |
7662d046 BZ |
1009 | #ifdef CONFIG_IDE_PROC_FS |
1010 | ide_proc_entry_t *proc; | |
1011 | #endif | |
1012 | }; | |
1da177e4 | 1013 | |
4031bbe4 RK |
1014 | #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver) |
1015 | ||
1da177e4 LT |
1016 | int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long); |
1017 | ||
1018 | /* | |
1019 | * ide_hwifs[] is the master data structure used to keep track | |
1020 | * of just about everything in ide.c. Whenever possible, routines | |
1021 | * should be using pointers to a drive (ide_drive_t *) or | |
1022 | * pointers to a hwif (ide_hwif_t *), rather than indexing this | |
1023 | * structure directly (the allocation/layout may change!). | |
1024 | * | |
1025 | */ | |
1026 | #ifndef _IDE_C | |
1027 | extern ide_hwif_t ide_hwifs[]; /* master data repository */ | |
1028 | #endif | |
1029 | extern int noautodma; | |
1030 | ||
1031 | extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); | |
dbe217af AC |
1032 | int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, |
1033 | int uptodate, int nr_sectors); | |
1da177e4 LT |
1034 | |
1035 | /* | |
1036 | * This is used on exit from the driver to designate the next irq handler | |
1037 | * and also to start the safety timer. | |
1038 | */ | |
1039 | extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); | |
1040 | ||
1041 | /* | |
1042 | * This is used on exit from the driver to designate the next irq handler | |
1043 | * and start the safety time safely and atomically from the IRQ handler | |
1044 | * with respect to the command issue (which it also does) | |
1045 | */ | |
1046 | extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *); | |
1047 | ||
1048 | ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8); | |
1049 | ||
1050 | /* | |
1051 | * ide_error() takes action based on the error returned by the controller. | |
1052 | * The caller should return immediately after invoking this. | |
1053 | * | |
1054 | * (drive, msg, status) | |
1055 | */ | |
1056 | ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat); | |
1057 | ||
1058 | ide_startstop_t __ide_abort(ide_drive_t *, struct request *); | |
1059 | ||
1060 | /* | |
1061 | * Abort a running command on the controller triggering the abort | |
1062 | * from a host side, non error situation | |
1063 | * (drive, msg) | |
1064 | */ | |
1065 | extern ide_startstop_t ide_abort(ide_drive_t *, const char *); | |
1066 | ||
1067 | extern void ide_fix_driveid(struct hd_driveid *); | |
1068 | /* | |
1069 | * ide_fixstring() cleans up and (optionally) byte-swaps a text string, | |
1070 | * removing leading/trailing blanks and compressing internal blanks. | |
1071 | * It is primarily used to tidy up the model name/number fields as | |
1072 | * returned by the WIN_[P]IDENTIFY commands. | |
1073 | * | |
1074 | * (s, bytecount, byteswap) | |
1075 | */ | |
1076 | extern void ide_fixstring(u8 *, const int, const int); | |
1077 | ||
74af21cf | 1078 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 LT |
1079 | |
1080 | /* | |
1081 | * Start a reset operation for an IDE interface. | |
1082 | * The caller should return immediately after invoking this. | |
1083 | */ | |
1084 | extern ide_startstop_t ide_do_reset (ide_drive_t *); | |
1085 | ||
1086 | /* | |
1087 | * This function is intended to be used prior to invoking ide_do_drive_cmd(). | |
1088 | */ | |
1089 | extern void ide_init_drive_cmd (struct request *rq); | |
1090 | ||
1da177e4 LT |
1091 | /* |
1092 | * "action" parameter type for ide_do_drive_cmd() below. | |
1093 | */ | |
1094 | typedef enum { | |
1095 | ide_wait, /* insert rq at end of list, and wait for it */ | |
1da177e4 LT |
1096 | ide_preempt, /* insert rq in front of current request */ |
1097 | ide_head_wait, /* insert rq in front of current request and wait for it */ | |
1098 | ide_end /* insert rq at end of list, but don't wait for it */ | |
1099 | } ide_action_t; | |
1100 | ||
1da177e4 LT |
1101 | extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); |
1102 | ||
1103 | /* | |
1104 | * Clean up after success/failure of an explicit drive cmd. | |
1105 | * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_CMD). | |
1106 | * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASK_MASK). | |
1107 | * | |
1108 | * (ide_drive_t *drive, u8 stat, u8 err) | |
1109 | */ | |
1110 | extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); | |
1111 | ||
1112 | /* | |
1113 | * Issue ATA command and wait for completion. | |
1114 | * Use for implementing commands in kernel | |
1115 | * | |
1116 | * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf) | |
1117 | */ | |
1118 | extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *); | |
1119 | ||
1120 | typedef struct ide_task_s { | |
1121 | /* | |
1122 | * struct hd_drive_task_hdr tf; | |
1123 | * task_struct_t tf; | |
1124 | * struct hd_drive_hob_hdr hobf; | |
1125 | * hob_struct_t hobf; | |
1126 | */ | |
1127 | task_ioreg_t tfRegister[8]; | |
1128 | task_ioreg_t hobRegister[8]; | |
1129 | ide_reg_valid_t tf_out_flags; | |
1130 | ide_reg_valid_t tf_in_flags; | |
1131 | int data_phase; | |
1132 | int command_type; | |
1133 | ide_pre_handler_t *prehandler; | |
1134 | ide_handler_t *handler; | |
1135 | struct request *rq; /* copy of request */ | |
1136 | void *special; /* valid_t generally */ | |
1137 | } ide_task_t; | |
1138 | ||
1139 | extern u32 ide_read_24(ide_drive_t *); | |
1140 | ||
1141 | extern void SELECT_DRIVE(ide_drive_t *); | |
1142 | extern void SELECT_INTERRUPT(ide_drive_t *); | |
1143 | extern void SELECT_MASK(ide_drive_t *, int); | |
1144 | extern void QUIRK_LIST(ide_drive_t *); | |
1145 | ||
1146 | extern int drive_is_ready(ide_drive_t *); | |
1da177e4 LT |
1147 | |
1148 | /* | |
1149 | * taskfile io for disks for now...and builds request from ide_ioctl | |
1150 | */ | |
1151 | extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); | |
1152 | ||
1153 | /* | |
1154 | * Special Flagged Register Validation Caller | |
1155 | */ | |
1156 | extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *); | |
1157 | ||
1158 | extern ide_startstop_t set_multmode_intr(ide_drive_t *); | |
1159 | extern ide_startstop_t set_geometry_intr(ide_drive_t *); | |
1160 | extern ide_startstop_t recal_intr(ide_drive_t *); | |
1161 | extern ide_startstop_t task_no_data_intr(ide_drive_t *); | |
1162 | extern ide_startstop_t task_in_intr(ide_drive_t *); | |
1163 | extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *); | |
1164 | ||
1165 | extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *); | |
1166 | ||
1167 | int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1168 | int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1169 | int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
1170 | ||
1171 | extern int system_bus_clock(void); | |
1172 | ||
1173 | extern int ide_driveid_update(ide_drive_t *); | |
1174 | extern int ide_ata66_check(ide_drive_t *, ide_task_t *); | |
1175 | extern int ide_config_drive_speed(ide_drive_t *, u8); | |
1176 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1177 | extern int set_transfer(ide_drive_t *, ide_task_t *); | |
1178 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); | |
1179 | ||
1180 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1181 | ||
1182 | /* | |
1183 | * ide_stall_queue() can be used by a drive to give excess bandwidth back | |
1184 | * to the hwgroup by sleeping for timeout jiffies. | |
1185 | */ | |
1186 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); | |
1187 | ||
1188 | extern int ide_spin_wait_hwgroup(ide_drive_t *); | |
1189 | extern void ide_timer_expiry(unsigned long); | |
7d12e780 | 1190 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1191 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1192 | |
1193 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1194 | ||
1da177e4 LT |
1195 | extern int ideprobe_init(void); |
1196 | ||
6d208b39 | 1197 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
1da177e4 | 1198 | extern void ide_scan_pcibus(int scan_direction) __init; |
725522b5 GKH |
1199 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1200 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1201 | #else |
1202 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1203 | #endif | |
1204 | ||
1da177e4 LT |
1205 | void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *); |
1206 | extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d); | |
1207 | ||
1208 | extern void default_hwif_iops(ide_hwif_t *); | |
1209 | extern void default_hwif_mmiops(ide_hwif_t *); | |
1210 | extern void default_hwif_transport(ide_hwif_t *); | |
1211 | ||
1da177e4 LT |
1212 | typedef struct ide_pci_enablebit_s { |
1213 | u8 reg; /* byte pci reg holding the enable-bit */ | |
1214 | u8 mask; /* mask to isolate the enable-bit */ | |
1215 | u8 val; /* value of masked reg when "enabled" */ | |
1216 | } ide_pci_enablebit_t; | |
1217 | ||
1218 | enum { | |
1219 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1220 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1221 | /* single port device */ |
a5d8c5c8 | 1222 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1223 | /* don't use legacy PIO blacklist */ |
1224 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
1225 | /* don't use conservative PIO "downgrade" */ | |
1226 | IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3), | |
26bcb879 BZ |
1227 | /* use PIO8/9 for prefetch off/on */ |
1228 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1229 | /* use PIO6/7 for fast-devsel off/on */ | |
1230 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1231 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1232 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1233 | /* |
1234 | * keep DMA setting when programming PIO mode, may be used only | |
1235 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1236 | */ | |
1237 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1238 | /* program host for the transfer mode after programming device */ |
1239 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1240 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1241 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1242 | /* trust BIOS for programming chipset/device for DMA */ |
1243 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
1244 | /* host uses VDMA */ | |
1245 | IDE_HFLAG_VDMA = (1 << 11), | |
33c1002e BZ |
1246 | /* ATAPI DMA is unsupported */ |
1247 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
7cab14a7 BZ |
1248 | /* set if host is a "bootable" controller */ |
1249 | IDE_HFLAG_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1250 | /* host doesn't support DMA */ |
1251 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1252 | /* check if host is PCI IDE device before allowing DMA */ | |
1253 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
9ffcf364 BZ |
1254 | /* host is CS5510/CS5520 */ |
1255 | IDE_HFLAG_CS5520 = (1 << 16), | |
238e4f14 BZ |
1256 | /* no LBA48 */ |
1257 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1258 | /* no LBA48 DMA */ | |
1259 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1260 | /* data FIFO is cleared by an error */ |
1261 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1262 | /* serialize ports */ |
1263 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
3985ee3b BZ |
1264 | /* use legacy IRQs */ |
1265 | IDE_HFLAG_LEGACY_IRQS = (1 << 21), | |
8acf28c0 BZ |
1266 | /* force use of legacy IRQs */ |
1267 | IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), | |
272a3709 BZ |
1268 | /* limit LBA48 requests to 256 sectors */ |
1269 | IDE_HFLAG_RQSIZE_256 = (1 << 23), | |
caea7602 BZ |
1270 | /* use 32-bit I/O ops */ |
1271 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1272 | /* unmask IRQs */ | |
1273 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
1da177e4 LT |
1274 | }; |
1275 | ||
7cab14a7 BZ |
1276 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
1277 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE | |
1278 | #else | |
1279 | # define IDE_HFLAG_OFF_BOARD 0 | |
1280 | #endif | |
1281 | ||
1da177e4 LT |
1282 | typedef struct ide_pci_device_s { |
1283 | char *name; | |
1da177e4 LT |
1284 | unsigned int (*init_chipset)(struct pci_dev *, const char *); |
1285 | void (*init_iops)(ide_hwif_t *); | |
1286 | void (*init_hwif)(ide_hwif_t *); | |
1287 | void (*init_dma)(ide_hwif_t *, unsigned long); | |
1288 | void (*fixup)(ide_hwif_t *); | |
1da177e4 | 1289 | ide_pci_enablebit_t enablebits[2]; |
528a572d | 1290 | hwif_chipset_t chipset; |
1da177e4 | 1291 | unsigned int extra; |
9ffcf364 | 1292 | u32 host_flags; |
4099d143 | 1293 | u8 pio_mask; |
5f8b6c34 BZ |
1294 | u8 swdma_mask; |
1295 | u8 mwdma_mask; | |
18137207 | 1296 | u8 udma_mask; |
1da177e4 LT |
1297 | } ide_pci_device_t; |
1298 | ||
1299 | extern int ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *); | |
1300 | extern int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, ide_pci_device_t *); | |
1301 | ||
1302 | void ide_map_sg(ide_drive_t *, struct request *); | |
1303 | void ide_init_sg_cmd(ide_drive_t *, struct request *); | |
1304 | ||
1305 | #define BAD_DMA_DRIVE 0 | |
1306 | #define GOOD_DMA_DRIVE 1 | |
1307 | ||
65e5f2e3 JC |
1308 | struct drive_list_entry { |
1309 | const char *id_model; | |
1310 | const char *id_firmware; | |
1311 | }; | |
1312 | ||
1313 | int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *); | |
a5b7e70d BZ |
1314 | |
1315 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
1da177e4 | 1316 | int __ide_dma_bad_drive(ide_drive_t *); |
7670df73 BZ |
1317 | |
1318 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1319 | ||
1320 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1321 | { | |
1322 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1323 | } | |
1324 | ||
7469aaf6 | 1325 | void ide_dma_off(ide_drive_t *); |
1da177e4 | 1326 | void ide_dma_verbose(ide_drive_t *); |
3608b5d7 | 1327 | int ide_set_dma(ide_drive_t *); |
1da177e4 LT |
1328 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1329 | ||
1330 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
1331 | extern int ide_build_sglist(ide_drive_t *, struct request *); | |
1332 | extern int ide_build_dmatable(ide_drive_t *, struct request *); | |
1333 | extern void ide_destroy_dmatable(ide_drive_t *); | |
1334 | extern int ide_release_dma(ide_hwif_t *); | |
1335 | extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int); | |
1336 | ||
7469aaf6 BZ |
1337 | void ide_dma_host_off(ide_drive_t *); |
1338 | void ide_dma_off_quietly(ide_drive_t *); | |
ccf35289 | 1339 | void ide_dma_host_on(ide_drive_t *); |
1da177e4 | 1340 | extern int __ide_dma_on(ide_drive_t *); |
1da177e4 LT |
1341 | extern int ide_dma_setup(ide_drive_t *); |
1342 | extern void ide_dma_start(ide_drive_t *); | |
1343 | extern int __ide_dma_end(ide_drive_t *); | |
841d2a9b | 1344 | extern void ide_dma_lost_irq(ide_drive_t *); |
c283f5db | 1345 | extern void ide_dma_timeout(ide_drive_t *); |
1da177e4 LT |
1346 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
1347 | ||
1348 | #else | |
7670df73 | 1349 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1350 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
7469aaf6 | 1351 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
1da177e4 | 1352 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1353 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
1da177e4 LT |
1354 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1355 | ||
1356 | #ifndef CONFIG_BLK_DEV_IDEDMA_PCI | |
1357 | static inline void ide_release_dma(ide_hwif_t *drive) {;} | |
1358 | #endif | |
1359 | ||
e3a59b4d HR |
1360 | #ifdef CONFIG_BLK_DEV_IDEACPI |
1361 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); | |
1362 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1363 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
1364 | extern void ide_acpi_init(ide_hwif_t *hwif); | |
5e32132b | 1365 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d HR |
1366 | #else |
1367 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } | |
1368 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1369 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
1370 | static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } | |
5e32132b | 1371 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1372 | #endif |
1373 | ||
1da177e4 LT |
1374 | extern int ide_hwif_request_regions(ide_hwif_t *hwif); |
1375 | extern void ide_hwif_release_regions(ide_hwif_t* hwif); | |
1376 | extern void ide_unregister (unsigned int index); | |
1377 | ||
1378 | void ide_register_region(struct gendisk *); | |
1379 | void ide_unregister_region(struct gendisk *); | |
1380 | ||
1381 | void ide_undecoded_slave(ide_hwif_t *); | |
1382 | ||
1383 | int probe_hwif_init_with_fixup(ide_hwif_t *, void (*)(ide_hwif_t *)); | |
1384 | extern int probe_hwif_init(ide_hwif_t *); | |
1385 | ||
1386 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1387 | { | |
1388 | return hwif->hwif_data; | |
1389 | } | |
1390 | ||
1391 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1392 | { | |
1393 | hwif->hwif_data = data; | |
1394 | } | |
1395 | ||
1396 | /* ide-lib.c */ | |
1da177e4 LT |
1397 | extern char *ide_xfer_verbose(u8 xfer_rate); |
1398 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); | |
1399 | extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); | |
1400 | ||
2229833c BZ |
1401 | static inline int ide_dev_has_iordy(struct hd_driveid *id) |
1402 | { | |
1403 | return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0; | |
1404 | } | |
1405 | ||
6c3c22f3 SS |
1406 | static inline int ide_dev_is_sata(struct hd_driveid *id) |
1407 | { | |
1408 | /* | |
1409 | * See if word 93 is 0 AND drive is at least ATA-5 compatible | |
1410 | * verifying that word 80 by casting it to a signed type -- | |
1411 | * this trick allows us to filter out the reserved values of | |
1412 | * 0x0000 and 0xffff along with the earlier ATA revisions... | |
1413 | */ | |
1414 | if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020) | |
1415 | return 1; | |
1416 | return 0; | |
1417 | } | |
1418 | ||
1da177e4 LT |
1419 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1420 | ||
1421 | typedef struct ide_pio_timings_s { | |
1422 | int setup_time; /* Address setup (ns) minimum */ | |
1423 | int active_time; /* Active pulse (ns) minimum */ | |
81d368e0 SS |
1424 | int cycle_time; /* Cycle time (ns) minimum = */ |
1425 | /* active + recovery (+ setup for some chips) */ | |
1da177e4 LT |
1426 | } ide_pio_timings_t; |
1427 | ||
7dd00083 | 1428 | unsigned int ide_pio_cycle_time(ide_drive_t *, u8); |
2134758d | 1429 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
1da177e4 LT |
1430 | extern const ide_pio_timings_t ide_pio_timings[6]; |
1431 | ||
88b2b32b BZ |
1432 | int ide_set_pio_mode(ide_drive_t *, u8); |
1433 | int ide_set_dma_mode(ide_drive_t *, u8); | |
1434 | ||
26bcb879 BZ |
1435 | void ide_set_pio(ide_drive_t *, u8); |
1436 | ||
1437 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1438 | { | |
1439 | ide_set_pio(drive, 255); | |
1440 | } | |
1da177e4 LT |
1441 | |
1442 | extern spinlock_t ide_lock; | |
ef29888e | 1443 | extern struct mutex ide_cfg_mtx; |
1da177e4 LT |
1444 | /* |
1445 | * Structure locking: | |
1446 | * | |
ef29888e | 1447 | * ide_cfg_mtx and ide_lock together protect changes to |
1da177e4 LT |
1448 | * ide_hwif_t->{next,hwgroup} |
1449 | * ide_drive_t->next | |
1450 | * | |
1451 | * ide_hwgroup_t->busy: ide_lock | |
1452 | * ide_hwgroup_t->hwif: ide_lock | |
1453 | * ide_hwif_t->mate: constant, no locking | |
1454 | * ide_drive_t->hwif: constant, no locking | |
1455 | */ | |
1456 | ||
366c7f55 | 1457 | #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0) |
1da177e4 LT |
1458 | |
1459 | extern struct bus_type ide_bus_type; | |
1460 | ||
1461 | /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */ | |
1462 | #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000) | |
1463 | ||
1464 | /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */ | |
1465 | #define ide_id_has_flush_cache_ext(id) \ | |
1466 | (((id)->cfs_enable_2 & 0x2400) == 0x2400) | |
1467 | ||
86b37860 CL |
1468 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1469 | { | |
1470 | struct pci_dev *dev = hwif->pci_dev; | |
1471 | return dev ? pcibus_to_node(dev->bus) : -1; | |
1472 | } | |
1473 | ||
1b678347 BH |
1474 | static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive) |
1475 | { | |
1476 | ide_hwif_t *hwif = HWIF(drive); | |
1477 | ||
1478 | return &hwif->drives[(drive->dn ^ 1) & 1]; | |
1479 | } | |
1480 | ||
1da177e4 | 1481 | #endif /* _IDE_H */ |