Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
11 | #include <linux/hdreg.h> | |
1da177e4 LT |
12 | #include <linux/blkdev.h> |
13 | #include <linux/proc_fs.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/bitops.h> | |
16 | #include <linux/bio.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/pci.h> | |
f36d4024 | 19 | #include <linux/completion.h> |
e3a59b4d HR |
20 | #ifdef CONFIG_BLK_DEV_IDEACPI |
21 | #include <acpi/acpi.h> | |
22 | #endif | |
1da177e4 LT |
23 | #include <asm/byteorder.h> |
24 | #include <asm/system.h> | |
25 | #include <asm/io.h> | |
f9383c42 | 26 | #include <asm/mutex.h> |
1da177e4 | 27 | |
729d4de9 | 28 | #if defined(CONFIG_CRIS) || defined(CONFIG_FRV) |
4ee06b7e BZ |
29 | # define SUPPORT_VLB_SYNC 0 |
30 | #else | |
31 | # define SUPPORT_VLB_SYNC 1 | |
1da177e4 LT |
32 | #endif |
33 | ||
34 | /* | |
35 | * Used to indicate "no IRQ", should be a value that cannot be an IRQ | |
36 | * number. | |
37 | */ | |
38 | ||
39 | #define IDE_NO_IRQ (-1) | |
40 | ||
1da177e4 LT |
41 | typedef unsigned char byte; /* used everywhere */ |
42 | ||
43 | /* | |
44 | * Probably not wise to fiddle with these | |
45 | */ | |
46 | #define ERROR_MAX 8 /* Max read/write errors per sector */ | |
47 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
48 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
49 | ||
50 | /* | |
51 | * Tune flags | |
52 | */ | |
53 | #define IDE_TUNE_NOAUTO 2 | |
54 | #define IDE_TUNE_AUTO 1 | |
55 | #define IDE_TUNE_DEFAULT 0 | |
56 | ||
57 | /* | |
58 | * state flags | |
59 | */ | |
60 | ||
61 | #define DMA_PIO_RETRY 1 /* retrying in PIO */ | |
62 | ||
63 | #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif)) | |
64 | #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup)) | |
65 | ||
66 | /* | |
67 | * Definitions for accessing IDE controller registers | |
68 | */ | |
69 | #define IDE_NR_PORTS (10) | |
70 | ||
71 | #define IDE_DATA_OFFSET (0) | |
72 | #define IDE_ERROR_OFFSET (1) | |
73 | #define IDE_NSECTOR_OFFSET (2) | |
74 | #define IDE_SECTOR_OFFSET (3) | |
75 | #define IDE_LCYL_OFFSET (4) | |
76 | #define IDE_HCYL_OFFSET (5) | |
77 | #define IDE_SELECT_OFFSET (6) | |
78 | #define IDE_STATUS_OFFSET (7) | |
79 | #define IDE_CONTROL_OFFSET (8) | |
80 | #define IDE_IRQ_OFFSET (9) | |
81 | ||
82 | #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET | |
83 | #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET | |
23579a2a BZ |
84 | #define IDE_ALTSTATUS_OFFSET IDE_CONTROL_OFFSET |
85 | #define IDE_IREASON_OFFSET IDE_NSECTOR_OFFSET | |
86 | #define IDE_BCOUNTL_OFFSET IDE_LCYL_OFFSET | |
87 | #define IDE_BCOUNTH_OFFSET IDE_HCYL_OFFSET | |
1da177e4 LT |
88 | |
89 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
90 | #define BAD_R_STAT (BUSY_STAT | ERR_STAT) | |
91 | #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT) | |
92 | #define BAD_STAT (BAD_R_STAT | DRQ_STAT) | |
93 | #define DRIVE_READY (READY_STAT | SEEK_STAT) | |
1da177e4 LT |
94 | |
95 | #define BAD_CRC (ABRT_ERR | ICRC_ERR) | |
96 | ||
97 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
98 | ||
99 | #define SATA_STATUS_OFFSET (0) | |
1da177e4 | 100 | #define SATA_ERROR_OFFSET (1) |
1da177e4 | 101 | #define SATA_CONTROL_OFFSET (2) |
1da177e4 | 102 | |
1da177e4 LT |
103 | /* |
104 | * Our Physical Region Descriptor (PRD) table should be large enough | |
105 | * to handle the biggest I/O request we are likely to see. Since requests | |
106 | * can have no more than 256 sectors, and since the typical blocksize is | |
107 | * two or more sectors, we could get by with a limit of 128 entries here for | |
108 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
109 | * further reducing the number of table entries required. | |
110 | * | |
111 | * The driver reverts to PIO mode for individual requests that exceed | |
112 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
113 | * 100% of all crazy scenarios here is not necessary. | |
114 | * | |
115 | * As it turns out though, we must allocate a full 4KB page for this, | |
116 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
117 | * allowing each to have about 256 entries (8 bytes each) from this. | |
118 | */ | |
119 | #define PRD_BYTES 8 | |
120 | #define PRD_ENTRIES 256 | |
121 | ||
122 | /* | |
123 | * Some more useful definitions | |
124 | */ | |
125 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
126 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
127 | #define SECTOR_SIZE 512 | |
128 | #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */ | |
129 | #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t))) | |
130 | ||
131 | /* | |
132 | * Timeouts for various operations: | |
133 | */ | |
134 | #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */ | |
135 | #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */ | |
136 | #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
137 | #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */ | |
138 | #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ | |
139 | #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */ | |
140 | ||
1da177e4 LT |
141 | /* |
142 | * Check for an interrupt and acknowledge the interrupt status | |
143 | */ | |
144 | struct hwif_s; | |
145 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
146 | ||
1da177e4 LT |
147 | /* |
148 | * hwif_chipset_t is used to keep track of the specific hardware | |
149 | * chipset used by each IDE interface, if known. | |
150 | */ | |
528a572d | 151 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
152 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
153 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
154 | ide_rz1000, ide_trm290, | |
155 | ide_cmd646, ide_cy82c693, ide_4drives, | |
156 | ide_pmac, ide_etrax100, ide_acorn, | |
9a0e77f2 | 157 | ide_au1xxx, ide_palm3710 |
528a572d BZ |
158 | }; |
159 | ||
160 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
161 | |
162 | /* | |
163 | * Structure to hold all information about the location of this port | |
164 | */ | |
165 | typedef struct hw_regs_s { | |
166 | unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */ | |
167 | int irq; /* our irq number */ | |
1da177e4 LT |
168 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
169 | hwif_chipset_t chipset; | |
4349d5cd | 170 | struct device *dev; |
1da177e4 LT |
171 | } hw_regs_t; |
172 | ||
cbb010c1 | 173 | void ide_init_port_data(struct hwif_s *, unsigned int); |
57c802e8 | 174 | void ide_init_port_hw(struct hwif_s *, hw_regs_t *); |
baa8f3e9 | 175 | |
1da177e4 LT |
176 | static inline void ide_std_init_ports(hw_regs_t *hw, |
177 | unsigned long io_addr, | |
178 | unsigned long ctl_addr) | |
179 | { | |
180 | unsigned int i; | |
181 | ||
182 | for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) | |
183 | hw->io_ports[i] = io_addr++; | |
184 | ||
185 | hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr; | |
186 | } | |
187 | ||
188 | #include <asm/ide.h> | |
189 | ||
83d7dbc4 MM |
190 | #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED) |
191 | #undef MAX_HWIFS | |
83ae20c8 BH |
192 | #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS |
193 | #endif | |
194 | ||
1da177e4 LT |
195 | /* Currently only m68k, apus and m8xx need it */ |
196 | #ifndef IDE_ARCH_ACK_INTR | |
197 | # define ide_ack_intr(hwif) (1) | |
198 | #endif | |
199 | ||
200 | /* Currently only Atari needs it */ | |
201 | #ifndef IDE_ARCH_LOCK | |
202 | # define ide_release_lock() do {} while (0) | |
203 | # define ide_get_lock(hdlr, data) do {} while (0) | |
204 | #endif /* IDE_ARCH_LOCK */ | |
205 | ||
206 | /* | |
207 | * Now for the data we need to maintain per-drive: ide_drive_t | |
208 | */ | |
209 | ||
210 | #define ide_scsi 0x21 | |
211 | #define ide_disk 0x20 | |
212 | #define ide_optical 0x7 | |
213 | #define ide_cdrom 0x5 | |
214 | #define ide_tape 0x1 | |
215 | #define ide_floppy 0x0 | |
216 | ||
217 | /* | |
218 | * Special Driver Flags | |
219 | * | |
220 | * set_geometry : respecify drive geometry | |
221 | * recalibrate : seek to cyl 0 | |
222 | * set_multmode : set multmode count | |
223 | * set_tune : tune interface for drive | |
224 | * serviced : service command | |
225 | * reserved : unused | |
226 | */ | |
227 | typedef union { | |
228 | unsigned all : 8; | |
229 | struct { | |
1da177e4 LT |
230 | unsigned set_geometry : 1; |
231 | unsigned recalibrate : 1; | |
232 | unsigned set_multmode : 1; | |
233 | unsigned set_tune : 1; | |
234 | unsigned serviced : 1; | |
235 | unsigned reserved : 3; | |
1da177e4 LT |
236 | } b; |
237 | } special_t; | |
238 | ||
1da177e4 LT |
239 | /* |
240 | * ATA-IDE Select Register, aka Device-Head | |
241 | * | |
242 | * head : always zeros here | |
243 | * unit : drive select number: 0/1 | |
244 | * bit5 : always 1 | |
245 | * lba : using LBA instead of CHS | |
246 | * bit7 : always 1 | |
247 | */ | |
248 | typedef union { | |
249 | unsigned all : 8; | |
250 | struct { | |
251 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
252 | unsigned head : 4; | |
253 | unsigned unit : 1; | |
254 | unsigned bit5 : 1; | |
255 | unsigned lba : 1; | |
256 | unsigned bit7 : 1; | |
257 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
258 | unsigned bit7 : 1; | |
259 | unsigned lba : 1; | |
260 | unsigned bit5 : 1; | |
261 | unsigned unit : 1; | |
262 | unsigned head : 4; | |
263 | #else | |
264 | #error "Please fix <asm/byteorder.h>" | |
265 | #endif | |
266 | } b; | |
267 | } select_t, ata_select_t; | |
268 | ||
1da177e4 LT |
269 | /* |
270 | * Status returned from various ide_ functions | |
271 | */ | |
272 | typedef enum { | |
273 | ide_stopped, /* no drive operation was started */ | |
274 | ide_started, /* a drive operation was started, handler was set */ | |
275 | } ide_startstop_t; | |
276 | ||
277 | struct ide_driver_s; | |
278 | struct ide_settings_s; | |
279 | ||
e3a59b4d HR |
280 | #ifdef CONFIG_BLK_DEV_IDEACPI |
281 | struct ide_acpi_drive_link; | |
282 | struct ide_acpi_hwif_link; | |
283 | #endif | |
284 | ||
1da177e4 LT |
285 | typedef struct ide_drive_s { |
286 | char name[4]; /* drive name, such as "hda" */ | |
287 | char driver_req[10]; /* requests specific driver */ | |
288 | ||
165125e1 | 289 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
290 | |
291 | struct request *rq; /* current request */ | |
292 | struct ide_drive_s *next; /* circular list of hwgroup drives */ | |
1da177e4 LT |
293 | void *driver_data; /* extra driver data */ |
294 | struct hd_driveid *id; /* drive model identification info */ | |
7662d046 | 295 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 LT |
296 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
297 | struct ide_settings_s *settings;/* /proc/ide/ drive settings */ | |
7662d046 | 298 | #endif |
1da177e4 LT |
299 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
300 | ||
301 | unsigned long sleep; /* sleep until this time */ | |
302 | unsigned long service_start; /* time we started last request */ | |
303 | unsigned long service_time; /* service time of last request */ | |
304 | unsigned long timeout; /* max time to wait for irq */ | |
305 | ||
306 | special_t special; /* special action flags */ | |
307 | select_t select; /* basic drive/head select reg value */ | |
308 | ||
309 | u8 keep_settings; /* restore settings after drive reset */ | |
1da177e4 LT |
310 | u8 using_dma; /* disk is using dma for read/write */ |
311 | u8 retry_pio; /* retrying dma capable host in pio */ | |
312 | u8 state; /* retry state */ | |
313 | u8 waiting_for_dma; /* dma currently in progress */ | |
314 | u8 unmask; /* okay to unmask other irqs */ | |
36193484 | 315 | u8 noflush; /* don't attempt flushes */ |
1da177e4 LT |
316 | u8 dsc_overlap; /* DSC overlap */ |
317 | u8 nice1; /* give potential excess bandwidth */ | |
318 | ||
319 | unsigned present : 1; /* drive is physically present */ | |
320 | unsigned dead : 1; /* device ejected hint */ | |
321 | unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */ | |
322 | unsigned noprobe : 1; /* from: hdx=noprobe */ | |
323 | unsigned removable : 1; /* 1 if need to do check_media_change */ | |
324 | unsigned attach : 1; /* needed for removable devices */ | |
1da177e4 LT |
325 | unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */ |
326 | unsigned no_unmask : 1; /* disallow setting unmask bit */ | |
327 | unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */ | |
328 | unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */ | |
1da177e4 | 329 | unsigned doorlocking : 1; /* for removable only: door lock/unlock works */ |
c223701c | 330 | unsigned nodma : 1; /* disallow DMA */ |
1da177e4 LT |
331 | unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */ |
332 | unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */ | |
333 | unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */ | |
334 | unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */ | |
1da177e4 LT |
335 | unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */ |
336 | unsigned sleeping : 1; /* 1=sleeping & sleep field valid */ | |
337 | unsigned post_reset : 1; | |
7f8f48af | 338 | unsigned udma33_warned : 1; |
1da177e4 | 339 | |
1497943e | 340 | u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */ |
1da177e4 LT |
341 | u8 quirk_list; /* considered quirky, set for a specific host */ |
342 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 343 | u8 current_speed; /* current transfer rate set */ |
513daadd | 344 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 LT |
345 | u8 dn; /* now wide spread use */ |
346 | u8 wcache; /* status of write cache */ | |
347 | u8 acoustic; /* acoustic management */ | |
348 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
23579a2a | 349 | u8 ctl; /* "normal" value for Control register */ |
1da177e4 LT |
350 | u8 ready_stat; /* min status value for drive ready */ |
351 | u8 mult_count; /* current multiple sector setting */ | |
352 | u8 mult_req; /* requested multiple sector setting */ | |
353 | u8 tune_req; /* requested drive tuning setting */ | |
354 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ | |
355 | u8 bad_wstat; /* used for ignoring WRERR_STAT */ | |
356 | u8 nowerr; /* used for ignoring WRERR_STAT */ | |
357 | u8 sect0; /* offset of first sector for DM6:DDO */ | |
358 | u8 head; /* "real" number of heads */ | |
359 | u8 sect; /* "real" sectors per track */ | |
360 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
361 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
362 | ||
363 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ | |
364 | unsigned int cyl; /* "real" number of cyls */ | |
26bcb879 | 365 | unsigned int drive_data; /* used by set_pio_mode/selectproc */ |
1da177e4 LT |
366 | unsigned int failures; /* current failure count */ |
367 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 368 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
369 | |
370 | u64 capacity64; /* total number of sectors */ | |
371 | ||
372 | int lun; /* logical unit */ | |
373 | int crc_count; /* crc counter to reduce drive speed */ | |
e3a59b4d HR |
374 | #ifdef CONFIG_BLK_DEV_IDEACPI |
375 | struct ide_acpi_drive_link *acpidata; | |
376 | #endif | |
1da177e4 LT |
377 | struct list_head list; |
378 | struct device gendev; | |
f36d4024 | 379 | struct completion gendev_rel_comp; /* to deal with device release() */ |
1da177e4 LT |
380 | } ide_drive_t; |
381 | ||
8604affd BZ |
382 | #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev) |
383 | ||
1da177e4 LT |
384 | #define IDE_CHIPSET_PCI_MASK \ |
385 | ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx)) | |
386 | #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1) | |
387 | ||
039788e1 | 388 | struct ide_port_info; |
1da177e4 LT |
389 | |
390 | typedef struct hwif_s { | |
391 | struct hwif_s *next; /* for linked-list in ide_hwgroup_t */ | |
392 | struct hwif_s *mate; /* other hwif from same PCI chip */ | |
393 | struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */ | |
394 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ | |
395 | ||
396 | char name[6]; /* name of interface, eg. "ide0" */ | |
397 | ||
398 | /* task file registers for pata and sata */ | |
399 | unsigned long io_ports[IDE_NR_PORTS]; | |
400 | unsigned long sata_scr[SATA_NR_PORTS]; | |
1da177e4 | 401 | |
1da177e4 LT |
402 | ide_drive_t drives[MAX_DRIVES]; /* drive info */ |
403 | ||
404 | u8 major; /* our major number */ | |
405 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
406 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
1da177e4 LT |
407 | u8 bus_state; /* power state of the IDE bus */ |
408 | ||
e95d9c6b | 409 | u32 host_flags; |
6a824c92 | 410 | |
4099d143 BZ |
411 | u8 pio_mask; |
412 | ||
1da177e4 LT |
413 | u8 ultra_mask; |
414 | u8 mwdma_mask; | |
415 | u8 swdma_mask; | |
416 | ||
49521f97 BZ |
417 | u8 cbl; /* cable type */ |
418 | ||
1da177e4 LT |
419 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
420 | ||
36501650 BZ |
421 | struct device *dev; |
422 | ||
85620436 | 423 | const struct ide_port_info *cds; /* chipset device struct */ |
1da177e4 | 424 | |
18e181fe BZ |
425 | ide_ack_intr_t *ack_intr; |
426 | ||
1da177e4 LT |
427 | void (*rw_disk)(ide_drive_t *, struct request *); |
428 | ||
429 | #if 0 | |
430 | ide_hwif_ops_t *hwifops; | |
431 | #else | |
1f2cf8b0 BZ |
432 | /* host specific initialization of devices on a port */ |
433 | void (*port_init_devs)(struct hwif_s *); | |
88b2b32b | 434 | /* routine to program host for PIO mode */ |
26bcb879 | 435 | void (*set_pio_mode)(ide_drive_t *, const u8); |
88b2b32b BZ |
436 | /* routine to program host for DMA mode */ |
437 | void (*set_dma_mode)(ide_drive_t *, const u8); | |
1da177e4 LT |
438 | /* tweaks hardware to select drive */ |
439 | void (*selectproc)(ide_drive_t *); | |
440 | /* chipset polling based on hba specifics */ | |
441 | int (*reset_poll)(ide_drive_t *); | |
442 | /* chipset specific changes to default for device-hba resets */ | |
443 | void (*pre_reset)(ide_drive_t *); | |
444 | /* routine to reset controller after a disk reset */ | |
445 | void (*resetproc)(ide_drive_t *); | |
1da177e4 LT |
446 | /* special host masking for drive selection */ |
447 | void (*maskproc)(ide_drive_t *, int); | |
448 | /* check host's drive quirk list */ | |
f01393e4 | 449 | void (*quirkproc)(ide_drive_t *); |
1da177e4 | 450 | #endif |
b4e44369 | 451 | u8 (*mdma_filter)(ide_drive_t *); |
2d5eaa6d | 452 | u8 (*udma_filter)(ide_drive_t *); |
1da177e4 | 453 | |
bfa14b42 BZ |
454 | u8 (*cable_detect)(struct hwif_s *); |
455 | ||
1da177e4 LT |
456 | void (*ata_input_data)(ide_drive_t *, void *, u32); |
457 | void (*ata_output_data)(ide_drive_t *, void *, u32); | |
458 | ||
459 | void (*atapi_input_bytes)(ide_drive_t *, void *, u32); | |
460 | void (*atapi_output_bytes)(ide_drive_t *, void *, u32); | |
461 | ||
15ce926a | 462 | void (*dma_host_set)(ide_drive_t *, int); |
1da177e4 LT |
463 | int (*dma_setup)(ide_drive_t *); |
464 | void (*dma_exec_cmd)(ide_drive_t *, u8); | |
465 | void (*dma_start)(ide_drive_t *); | |
466 | int (*ide_dma_end)(ide_drive_t *drive); | |
1da177e4 | 467 | int (*ide_dma_test_irq)(ide_drive_t *drive); |
f0dd8712 | 468 | void (*ide_dma_clear_irq)(ide_drive_t *drive); |
841d2a9b | 469 | void (*dma_lost_irq)(ide_drive_t *drive); |
c283f5db | 470 | void (*dma_timeout)(ide_drive_t *drive); |
1da177e4 LT |
471 | |
472 | void (*OUTB)(u8 addr, unsigned long port); | |
473 | void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); | |
474 | void (*OUTW)(u16 addr, unsigned long port); | |
1da177e4 LT |
475 | void (*OUTSW)(unsigned long port, void *addr, u32 count); |
476 | void (*OUTSL)(unsigned long port, void *addr, u32 count); | |
477 | ||
478 | u8 (*INB)(unsigned long port); | |
479 | u16 (*INW)(unsigned long port); | |
1da177e4 LT |
480 | void (*INSW)(unsigned long port, void *addr, u32 count); |
481 | void (*INSL)(unsigned long port, void *addr, u32 count); | |
482 | ||
483 | /* dma physical region descriptor table (cpu view) */ | |
484 | unsigned int *dmatable_cpu; | |
485 | /* dma physical region descriptor table (dma view) */ | |
486 | dma_addr_t dmatable_dma; | |
487 | /* Scatter-gather list used to build the above */ | |
488 | struct scatterlist *sg_table; | |
489 | int sg_max_nents; /* Maximum number of entries in it */ | |
490 | int sg_nents; /* Current number of entries in it */ | |
491 | int sg_dma_direction; /* dma transfer direction */ | |
492 | ||
493 | /* data phase of the active command (currently only valid for PIO/DMA) */ | |
494 | int data_phase; | |
495 | ||
496 | unsigned int nsect; | |
497 | unsigned int nleft; | |
55c16a70 | 498 | struct scatterlist *cursg; |
1da177e4 LT |
499 | unsigned int cursg_ofs; |
500 | ||
1da177e4 LT |
501 | int rqsize; /* max sectors per request */ |
502 | int irq; /* our irq number */ | |
503 | ||
1da177e4 LT |
504 | unsigned long dma_base; /* base addr for dma ports */ |
505 | unsigned long dma_command; /* dma command register */ | |
506 | unsigned long dma_vendor1; /* dma vendor 1 register */ | |
507 | unsigned long dma_status; /* dma status register */ | |
508 | unsigned long dma_vendor3; /* dma vendor 3 register */ | |
509 | unsigned long dma_prdtable; /* actual prd table address */ | |
1da177e4 | 510 | |
1da177e4 LT |
511 | unsigned long config_data; /* for use by chipset-specific code */ |
512 | unsigned long select_data; /* for use by chipset-specific code */ | |
513 | ||
020e322d SS |
514 | unsigned long extra_base; /* extra addr for dma ports */ |
515 | unsigned extra_ports; /* number of extra dma ports */ | |
516 | ||
1da177e4 LT |
517 | unsigned noprobe : 1; /* don't probe for this interface */ |
518 | unsigned present : 1; /* this interface exists */ | |
1da177e4 LT |
519 | unsigned serialized : 1; /* serialized all channel operation */ |
520 | unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ | |
521 | unsigned reset : 1; /* reset after probe */ | |
1da177e4 | 522 | unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ |
2ad1e558 | 523 | unsigned mmio : 1; /* host uses MMIO */ |
1da177e4 | 524 | |
f74c9141 BZ |
525 | struct device gendev; |
526 | struct device *portdev; | |
527 | ||
f36d4024 | 528 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
529 | |
530 | void *hwif_data; /* extra hwif data */ | |
531 | ||
532 | unsigned dma; | |
e3a59b4d HR |
533 | |
534 | #ifdef CONFIG_BLK_DEV_IDEACPI | |
535 | struct ide_acpi_hwif_link *acpidata; | |
536 | #endif | |
22fc6ecc | 537 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 LT |
538 | |
539 | /* | |
540 | * internal ide interrupt handler type | |
541 | */ | |
1da177e4 LT |
542 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); |
543 | typedef int (ide_expiry_t)(ide_drive_t *); | |
544 | ||
0eea6458 BP |
545 | /* used by ide-cd, ide-floppy, etc. */ |
546 | typedef void (xfer_func_t)(ide_drive_t *, void *, u32); | |
547 | ||
1da177e4 LT |
548 | typedef struct hwgroup_s { |
549 | /* irq handler, if active */ | |
550 | ide_startstop_t (*handler)(ide_drive_t *); | |
a6fbb1c8 | 551 | |
1da177e4 LT |
552 | /* BOOL: protects all fields below */ |
553 | volatile int busy; | |
554 | /* BOOL: wake us up on timer expiry */ | |
555 | unsigned int sleeping : 1; | |
556 | /* BOOL: polling active & poll_timeout field valid */ | |
557 | unsigned int polling : 1; | |
913759ac AC |
558 | /* BOOL: in a polling reset situation. Must not trigger another reset yet */ |
559 | unsigned int resetting : 1; | |
560 | ||
1da177e4 LT |
561 | /* current drive */ |
562 | ide_drive_t *drive; | |
563 | /* ptr to current hwif in linked-list */ | |
564 | ide_hwif_t *hwif; | |
565 | ||
1da177e4 LT |
566 | /* current request */ |
567 | struct request *rq; | |
a6fbb1c8 | 568 | |
1da177e4 LT |
569 | /* failsafe timer */ |
570 | struct timer_list timer; | |
1da177e4 LT |
571 | /* timeout value during long polls */ |
572 | unsigned long poll_timeout; | |
573 | /* queried upon timeouts */ | |
574 | int (*expiry)(ide_drive_t *); | |
a6fbb1c8 | 575 | |
23450319 SS |
576 | int req_gen; |
577 | int req_gen_timer; | |
1da177e4 LT |
578 | } ide_hwgroup_t; |
579 | ||
7662d046 BZ |
580 | typedef struct ide_driver_s ide_driver_t; |
581 | ||
f9383c42 | 582 | extern struct mutex ide_setting_mtx; |
1da177e4 | 583 | |
7662d046 BZ |
584 | int set_io_32bit(ide_drive_t *, int); |
585 | int set_pio_mode(ide_drive_t *, int); | |
586 | int set_using_dma(ide_drive_t *, int); | |
587 | ||
eaec3e7d BP |
588 | /* ATAPI packet command flags */ |
589 | enum { | |
590 | /* set when an error is considered normal - no retry (ide-tape) */ | |
591 | PC_FLAG_ABORT = (1 << 0), | |
592 | PC_FLAG_SUPPRESS_ERROR = (1 << 1), | |
593 | PC_FLAG_WAIT_FOR_DSC = (1 << 2), | |
594 | PC_FLAG_DMA_OK = (1 << 3), | |
595 | PC_FLAG_DMA_RECOMMENDED = (1 << 4), | |
596 | PC_FLAG_DMA_IN_PROGRESS = (1 << 5), | |
597 | PC_FLAG_DMA_ERROR = (1 << 6), | |
598 | PC_FLAG_WRITING = (1 << 7), | |
599 | /* command timed out */ | |
600 | PC_FLAG_TIMEDOUT = (1 << 8), | |
601 | }; | |
602 | ||
8303b46e BP |
603 | struct ide_atapi_pc { |
604 | /* actual packet bytes */ | |
605 | u8 c[12]; | |
606 | /* incremented on each retry */ | |
607 | int retries; | |
608 | int error; | |
609 | ||
610 | /* bytes to transfer */ | |
611 | int req_xfer; | |
612 | /* bytes actually transferred */ | |
613 | int xferred; | |
614 | ||
615 | /* data buffer */ | |
616 | u8 *buf; | |
617 | /* current buffer position */ | |
618 | u8 *cur_pos; | |
619 | int buf_size; | |
620 | /* missing/available data on the current buffer */ | |
621 | int b_count; | |
622 | ||
623 | /* the corresponding request */ | |
624 | struct request *rq; | |
625 | ||
626 | unsigned long flags; | |
627 | ||
628 | /* | |
629 | * those are more or less driver-specific and some of them are subject | |
630 | * to change/removal later. | |
631 | */ | |
632 | u8 pc_buf[256]; | |
633 | void (*idefloppy_callback) (ide_drive_t *); | |
634 | ide_startstop_t (*idetape_callback) (ide_drive_t *); | |
635 | ||
636 | /* idetape only */ | |
637 | struct idetape_bh *bh; | |
638 | char *b_data; | |
639 | ||
640 | /* idescsi only for now */ | |
641 | struct scatterlist *sg; | |
642 | unsigned int sg_cnt; | |
643 | ||
644 | struct scsi_cmnd *scsi_cmd; | |
645 | void (*done) (struct scsi_cmnd *); | |
646 | ||
647 | unsigned long timeout; | |
648 | }; | |
649 | ||
7662d046 | 650 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 LT |
651 | /* |
652 | * configurable drive settings | |
653 | */ | |
654 | ||
655 | #define TYPE_INT 0 | |
1497943e BZ |
656 | #define TYPE_BYTE 1 |
657 | #define TYPE_SHORT 2 | |
1da177e4 LT |
658 | |
659 | #define SETTING_READ (1 << 0) | |
660 | #define SETTING_WRITE (1 << 1) | |
661 | #define SETTING_RW (SETTING_READ | SETTING_WRITE) | |
662 | ||
663 | typedef int (ide_procset_t)(ide_drive_t *, int); | |
664 | typedef struct ide_settings_s { | |
665 | char *name; | |
666 | int rw; | |
1da177e4 LT |
667 | int data_type; |
668 | int min; | |
669 | int max; | |
670 | int mul_factor; | |
671 | int div_factor; | |
672 | void *data; | |
673 | ide_procset_t *set; | |
674 | int auto_remove; | |
675 | struct ide_settings_s *next; | |
676 | } ide_settings_t; | |
677 | ||
1497943e | 678 | int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set); |
1da177e4 LT |
679 | |
680 | /* | |
681 | * /proc/ide interface | |
682 | */ | |
683 | typedef struct { | |
684 | const char *name; | |
685 | mode_t mode; | |
686 | read_proc_t *read_proc; | |
687 | write_proc_t *write_proc; | |
688 | } ide_proc_entry_t; | |
689 | ||
ecfd80e4 BZ |
690 | void proc_ide_create(void); |
691 | void proc_ide_destroy(void); | |
5cbf79cd | 692 | void ide_proc_register_port(ide_hwif_t *); |
d9270a3f | 693 | void ide_proc_port_register_devices(ide_hwif_t *); |
5b0c4b30 | 694 | void ide_proc_unregister_device(ide_drive_t *); |
5cbf79cd | 695 | void ide_proc_unregister_port(ide_hwif_t *); |
7662d046 BZ |
696 | void ide_proc_register_driver(ide_drive_t *, ide_driver_t *); |
697 | void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *); | |
698 | ||
699 | void ide_add_generic_settings(ide_drive_t *); | |
700 | ||
1da177e4 LT |
701 | read_proc_t proc_ide_read_capacity; |
702 | read_proc_t proc_ide_read_geometry; | |
703 | ||
704 | #ifdef CONFIG_BLK_DEV_IDEPCI | |
705 | void ide_pci_create_host_proc(const char *, get_info_t *); | |
706 | #endif | |
707 | ||
708 | /* | |
709 | * Standard exit stuff: | |
710 | */ | |
711 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
712 | { \ | |
713 | len -= off; \ | |
714 | if (len < count) { \ | |
715 | *eof = 1; \ | |
716 | if (len <= 0) \ | |
717 | return 0; \ | |
718 | } else \ | |
719 | len = count; \ | |
720 | *start = page + off; \ | |
721 | return len; \ | |
722 | } | |
723 | #else | |
ecfd80e4 BZ |
724 | static inline void proc_ide_create(void) { ; } |
725 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd | 726 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
d9270a3f | 727 | static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } |
5b0c4b30 | 728 | static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } |
5cbf79cd | 729 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } |
7662d046 BZ |
730 | static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } |
731 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } | |
732 | static inline void ide_add_generic_settings(ide_drive_t *drive) { ; } | |
1da177e4 LT |
733 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
734 | #endif | |
735 | ||
736 | /* | |
737 | * Power Management step value (rq->pm->pm_step). | |
738 | * | |
739 | * The step value starts at 0 (ide_pm_state_start_suspend) for a | |
740 | * suspend operation or 1000 (ide_pm_state_start_resume) for a | |
741 | * resume operation. | |
742 | * | |
743 | * For each step, the core calls the subdriver start_power_step() first. | |
744 | * This can return: | |
745 | * - ide_stopped : In this case, the core calls us back again unless | |
746 | * step have been set to ide_power_state_completed. | |
747 | * - ide_started : In this case, the channel is left busy until an | |
748 | * async event (interrupt) occurs. | |
749 | * Typically, start_power_step() will issue a taskfile request with | |
750 | * do_rw_taskfile(). | |
751 | * | |
752 | * Upon reception of the interrupt, the core will call complete_power_step() | |
753 | * with the error code if any. This routine should update the step value | |
754 | * and return. It should not start a new request. The core will call | |
755 | * start_power_step for the new step value, unless step have been set to | |
756 | * ide_power_state_completed. | |
757 | * | |
758 | * Subdrivers are expected to define their own additional power | |
759 | * steps from 1..999 for suspend and from 1001..1999 for resume, | |
760 | * other values are reserved for future use. | |
761 | */ | |
762 | ||
763 | enum { | |
764 | ide_pm_state_completed = -1, | |
765 | ide_pm_state_start_suspend = 0, | |
766 | ide_pm_state_start_resume = 1000, | |
767 | }; | |
768 | ||
769 | /* | |
770 | * Subdrivers support. | |
4ef3b8f4 LR |
771 | * |
772 | * The gendriver.owner field should be set to the module owner of this driver. | |
773 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 774 | */ |
7662d046 | 775 | struct ide_driver_s { |
1da177e4 LT |
776 | const char *version; |
777 | u8 media; | |
1da177e4 | 778 | unsigned supports_dsc_overlap : 1; |
1da177e4 LT |
779 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
780 | int (*end_request)(ide_drive_t *, int, int); | |
781 | ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8); | |
782 | ide_startstop_t (*abort)(ide_drive_t *, struct request *rq); | |
1da177e4 | 783 | struct device_driver gen_driver; |
4031bbe4 RK |
784 | int (*probe)(ide_drive_t *); |
785 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 786 | void (*resume)(ide_drive_t *); |
4031bbe4 | 787 | void (*shutdown)(ide_drive_t *); |
7662d046 BZ |
788 | #ifdef CONFIG_IDE_PROC_FS |
789 | ide_proc_entry_t *proc; | |
790 | #endif | |
791 | }; | |
1da177e4 | 792 | |
4031bbe4 RK |
793 | #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver) |
794 | ||
1da177e4 LT |
795 | int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long); |
796 | ||
797 | /* | |
798 | * ide_hwifs[] is the master data structure used to keep track | |
799 | * of just about everything in ide.c. Whenever possible, routines | |
800 | * should be using pointers to a drive (ide_drive_t *) or | |
801 | * pointers to a hwif (ide_hwif_t *), rather than indexing this | |
802 | * structure directly (the allocation/layout may change!). | |
803 | * | |
804 | */ | |
805 | #ifndef _IDE_C | |
806 | extern ide_hwif_t ide_hwifs[]; /* master data repository */ | |
807 | #endif | |
808 | extern int noautodma; | |
809 | ||
fe80b937 BZ |
810 | ide_hwif_t *ide_find_port_slot(const struct ide_port_info *); |
811 | ||
812 | static inline ide_hwif_t *ide_find_port(void) | |
813 | { | |
814 | return ide_find_port_slot(NULL); | |
815 | } | |
816 | ||
1da177e4 | 817 | extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); |
dbe217af AC |
818 | int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, |
819 | int uptodate, int nr_sectors); | |
1da177e4 | 820 | |
1da177e4 LT |
821 | extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); |
822 | ||
cd2a2d96 BZ |
823 | void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int, |
824 | ide_expiry_t *); | |
1da177e4 LT |
825 | |
826 | ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8); | |
827 | ||
1da177e4 LT |
828 | ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat); |
829 | ||
830 | ide_startstop_t __ide_abort(ide_drive_t *, struct request *); | |
831 | ||
1da177e4 LT |
832 | extern ide_startstop_t ide_abort(ide_drive_t *, const char *); |
833 | ||
834 | extern void ide_fix_driveid(struct hd_driveid *); | |
01745112 | 835 | |
1da177e4 LT |
836 | extern void ide_fixstring(u8 *, const int, const int); |
837 | ||
74af21cf | 838 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 839 | |
1da177e4 LT |
840 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
841 | ||
1da177e4 LT |
842 | extern void ide_init_drive_cmd (struct request *rq); |
843 | ||
1da177e4 LT |
844 | /* |
845 | * "action" parameter type for ide_do_drive_cmd() below. | |
846 | */ | |
847 | typedef enum { | |
848 | ide_wait, /* insert rq at end of list, and wait for it */ | |
1da177e4 LT |
849 | ide_preempt, /* insert rq in front of current request */ |
850 | ide_head_wait, /* insert rq in front of current request and wait for it */ | |
851 | ide_end /* insert rq at end of list, but don't wait for it */ | |
852 | } ide_action_t; | |
853 | ||
1da177e4 LT |
854 | extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); |
855 | ||
1da177e4 LT |
856 | extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); |
857 | ||
9e42237f BZ |
858 | enum { |
859 | IDE_TFLAG_LBA48 = (1 << 0), | |
860 | IDE_TFLAG_NO_SELECT_MASK = (1 << 1), | |
74095a91 BZ |
861 | IDE_TFLAG_FLAGGED = (1 << 2), |
862 | IDE_TFLAG_OUT_DATA = (1 << 3), | |
863 | IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4), | |
864 | IDE_TFLAG_OUT_HOB_NSECT = (1 << 5), | |
865 | IDE_TFLAG_OUT_HOB_LBAL = (1 << 6), | |
866 | IDE_TFLAG_OUT_HOB_LBAM = (1 << 7), | |
867 | IDE_TFLAG_OUT_HOB_LBAH = (1 << 8), | |
868 | IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE | | |
869 | IDE_TFLAG_OUT_HOB_NSECT | | |
870 | IDE_TFLAG_OUT_HOB_LBAL | | |
871 | IDE_TFLAG_OUT_HOB_LBAM | | |
872 | IDE_TFLAG_OUT_HOB_LBAH, | |
873 | IDE_TFLAG_OUT_FEATURE = (1 << 9), | |
874 | IDE_TFLAG_OUT_NSECT = (1 << 10), | |
875 | IDE_TFLAG_OUT_LBAL = (1 << 11), | |
876 | IDE_TFLAG_OUT_LBAM = (1 << 12), | |
877 | IDE_TFLAG_OUT_LBAH = (1 << 13), | |
878 | IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE | | |
879 | IDE_TFLAG_OUT_NSECT | | |
880 | IDE_TFLAG_OUT_LBAL | | |
881 | IDE_TFLAG_OUT_LBAM | | |
882 | IDE_TFLAG_OUT_LBAH, | |
807e35d6 | 883 | IDE_TFLAG_OUT_DEVICE = (1 << 14), |
ac026ff2 | 884 | IDE_TFLAG_WRITE = (1 << 15), |
866e2ec9 BZ |
885 | IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16), |
886 | IDE_TFLAG_IN_DATA = (1 << 17), | |
57d7366b | 887 | IDE_TFLAG_CUSTOM_HANDLER = (1 << 18), |
f6e29e35 | 888 | IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19), |
c2b57cdc BZ |
889 | IDE_TFLAG_IN_HOB_FEATURE = (1 << 20), |
890 | IDE_TFLAG_IN_HOB_NSECT = (1 << 21), | |
891 | IDE_TFLAG_IN_HOB_LBAL = (1 << 22), | |
892 | IDE_TFLAG_IN_HOB_LBAM = (1 << 23), | |
893 | IDE_TFLAG_IN_HOB_LBAH = (1 << 24), | |
894 | IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL | | |
895 | IDE_TFLAG_IN_HOB_LBAM | | |
896 | IDE_TFLAG_IN_HOB_LBAH, | |
897 | IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE | | |
898 | IDE_TFLAG_IN_HOB_NSECT | | |
899 | IDE_TFLAG_IN_HOB_LBA, | |
900 | IDE_TFLAG_IN_NSECT = (1 << 25), | |
901 | IDE_TFLAG_IN_LBAL = (1 << 26), | |
902 | IDE_TFLAG_IN_LBAM = (1 << 27), | |
903 | IDE_TFLAG_IN_LBAH = (1 << 28), | |
904 | IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL | | |
905 | IDE_TFLAG_IN_LBAM | | |
906 | IDE_TFLAG_IN_LBAH, | |
907 | IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT | | |
908 | IDE_TFLAG_IN_LBA, | |
909 | IDE_TFLAG_IN_DEVICE = (1 << 29), | |
657cc1a8 BZ |
910 | IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB | |
911 | IDE_TFLAG_IN_HOB, | |
912 | IDE_TFLAG_TF = IDE_TFLAG_OUT_TF | | |
913 | IDE_TFLAG_IN_TF, | |
914 | IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE | | |
915 | IDE_TFLAG_IN_DEVICE, | |
35cf2b94 TH |
916 | /* force 16-bit I/O operations */ |
917 | IDE_TFLAG_IO_16BIT = (1 << 30), | |
395d8ef5 BZ |
918 | /* ide_task_t was allocated using kmalloc() */ |
919 | IDE_TFLAG_DYN = (1 << 31), | |
9e42237f BZ |
920 | }; |
921 | ||
650d841d BZ |
922 | struct ide_taskfile { |
923 | u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ | |
924 | ||
925 | u8 hob_feature; /* 1-5: additional data to support LBA48 */ | |
926 | u8 hob_nsect; | |
927 | u8 hob_lbal; | |
928 | u8 hob_lbam; | |
929 | u8 hob_lbah; | |
930 | ||
931 | u8 data; /* 6: low data byte (for TASKFILE IOCTL) */ | |
932 | ||
933 | union { /* Â 7: */ | |
934 | u8 error; /* read: error */ | |
935 | u8 feature; /* write: feature */ | |
936 | }; | |
937 | ||
938 | u8 nsect; /* 8: number of sectors */ | |
939 | u8 lbal; /* 9: LBA low */ | |
940 | u8 lbam; /* 10: LBA mid */ | |
941 | u8 lbah; /* 11: LBA high */ | |
942 | ||
943 | u8 device; /* 12: device select */ | |
944 | ||
945 | union { /* 13: */ | |
946 | u8 status; /*  read: status  */ | |
947 | u8 command; /* write: command */ | |
948 | }; | |
949 | }; | |
950 | ||
1da177e4 | 951 | typedef struct ide_task_s { |
650d841d BZ |
952 | union { |
953 | struct ide_taskfile tf; | |
954 | u8 tf_array[14]; | |
955 | }; | |
866e2ec9 | 956 | u32 tf_flags; |
1da177e4 | 957 | int data_phase; |
1da177e4 LT |
958 | struct request *rq; /* copy of request */ |
959 | void *special; /* valid_t generally */ | |
960 | } ide_task_t; | |
961 | ||
9e42237f | 962 | void ide_tf_load(ide_drive_t *, ide_task_t *); |
c2b57cdc | 963 | void ide_tf_read(ide_drive_t *, ide_task_t *); |
1da177e4 LT |
964 | |
965 | extern void SELECT_DRIVE(ide_drive_t *); | |
1da177e4 | 966 | extern void SELECT_MASK(ide_drive_t *, int); |
1da177e4 LT |
967 | |
968 | extern int drive_is_ready(ide_drive_t *); | |
1da177e4 | 969 | |
2fc57388 BZ |
970 | void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8); |
971 | ||
f6e29e35 | 972 | ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); |
1da177e4 | 973 | |
4d7a984b TH |
974 | void task_end_request(ide_drive_t *, struct request *, u8); |
975 | ||
ac026ff2 | 976 | int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16); |
9a3c49be BZ |
977 | int ide_no_data_taskfile(ide_drive_t *, ide_task_t *); |
978 | ||
1da177e4 LT |
979 | int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); |
980 | int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
981 | int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
982 | ||
983 | extern int system_bus_clock(void); | |
984 | ||
985 | extern int ide_driveid_update(ide_drive_t *); | |
1da177e4 LT |
986 | extern int ide_config_drive_speed(ide_drive_t *, u8); |
987 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1da177e4 LT |
988 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); |
989 | ||
990 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
991 | ||
1da177e4 LT |
992 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
993 | ||
994 | extern int ide_spin_wait_hwgroup(ide_drive_t *); | |
995 | extern void ide_timer_expiry(unsigned long); | |
7d12e780 | 996 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 997 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
998 | |
999 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1000 | ||
6d208b39 | 1001 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
725522b5 GKH |
1002 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1003 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1004 | #else |
1005 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1006 | #endif | |
1007 | ||
85620436 BZ |
1008 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *); |
1009 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); | |
1da177e4 | 1010 | |
8e882ba1 | 1011 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
c413b9b9 BZ |
1012 | void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); |
1013 | #else | |
1014 | static inline void ide_hwif_setup_dma(ide_hwif_t *hwif, | |
1015 | const struct ide_port_info *d) { } | |
1016 | #endif | |
1017 | ||
1da177e4 LT |
1018 | extern void default_hwif_iops(ide_hwif_t *); |
1019 | extern void default_hwif_mmiops(ide_hwif_t *); | |
1020 | extern void default_hwif_transport(ide_hwif_t *); | |
1021 | ||
1da177e4 LT |
1022 | typedef struct ide_pci_enablebit_s { |
1023 | u8 reg; /* byte pci reg holding the enable-bit */ | |
1024 | u8 mask; /* mask to isolate the enable-bit */ | |
1025 | u8 val; /* value of masked reg when "enabled" */ | |
1026 | } ide_pci_enablebit_t; | |
1027 | ||
1028 | enum { | |
1029 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1030 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1031 | /* single port device */ |
a5d8c5c8 | 1032 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1033 | /* don't use legacy PIO blacklist */ |
1034 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
e277f91f BZ |
1035 | /* set for the second port of QD65xx */ |
1036 | IDE_HFLAG_QD_2ND_PORT = (1 << 3), | |
26bcb879 BZ |
1037 | /* use PIO8/9 for prefetch off/on */ |
1038 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1039 | /* use PIO6/7 for fast-devsel off/on */ | |
1040 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1041 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1042 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1043 | /* |
1044 | * keep DMA setting when programming PIO mode, may be used only | |
1045 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1046 | */ | |
1047 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1048 | /* program host for the transfer mode after programming device */ |
1049 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1050 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1051 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1052 | /* trust BIOS for programming chipset/device for DMA */ |
1053 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
807b90d0 | 1054 | /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */ |
0ae2e178 | 1055 | IDE_HFLAG_VDMA = (1 << 11), |
33c1002e BZ |
1056 | /* ATAPI DMA is unsupported */ |
1057 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
5e71d9c5 BZ |
1058 | /* set if host is a "non-bootable" controller */ |
1059 | IDE_HFLAG_NON_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1060 | /* host doesn't support DMA */ |
1061 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1062 | /* check if host is PCI IDE device before allowing DMA */ | |
1063 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
807b90d0 BZ |
1064 | /* don't autotune PIO */ |
1065 | IDE_HFLAG_NO_AUTOTUNE = (1 << 16), | |
9ffcf364 | 1066 | /* host is CS5510/CS5520 */ |
807b90d0 | 1067 | IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA, |
238e4f14 BZ |
1068 | /* no LBA48 */ |
1069 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1070 | /* no LBA48 DMA */ | |
1071 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1072 | /* data FIFO is cleared by an error */ |
1073 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1074 | /* serialize ports */ |
1075 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
3985ee3b BZ |
1076 | /* use legacy IRQs */ |
1077 | IDE_HFLAG_LEGACY_IRQS = (1 << 21), | |
8acf28c0 BZ |
1078 | /* force use of legacy IRQs */ |
1079 | IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), | |
272a3709 BZ |
1080 | /* limit LBA48 requests to 256 sectors */ |
1081 | IDE_HFLAG_RQSIZE_256 = (1 << 23), | |
caea7602 BZ |
1082 | /* use 32-bit I/O ops */ |
1083 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1084 | /* unmask IRQs */ | |
1085 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
4db90a14 | 1086 | IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26), |
8ac2b42a BZ |
1087 | /* force host out of "simplex" mode */ |
1088 | IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), | |
4166c199 BZ |
1089 | /* DSC overlap is unsupported */ |
1090 | IDE_HFLAG_NO_DSC = (1 << 29), | |
807b90d0 BZ |
1091 | /* never use 32-bit I/O ops */ |
1092 | IDE_HFLAG_NO_IO_32BIT = (1 << 30), | |
1093 | /* never unmask IRQs */ | |
1094 | IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), | |
1da177e4 LT |
1095 | }; |
1096 | ||
7cab14a7 | 1097 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
7cab14a7 | 1098 | # define IDE_HFLAG_OFF_BOARD 0 |
5e71d9c5 BZ |
1099 | #else |
1100 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE | |
7cab14a7 BZ |
1101 | #endif |
1102 | ||
039788e1 | 1103 | struct ide_port_info { |
1da177e4 | 1104 | char *name; |
1da177e4 LT |
1105 | unsigned int (*init_chipset)(struct pci_dev *, const char *); |
1106 | void (*init_iops)(ide_hwif_t *); | |
1107 | void (*init_hwif)(ide_hwif_t *); | |
1108 | void (*init_dma)(ide_hwif_t *, unsigned long); | |
1da177e4 | 1109 | ide_pci_enablebit_t enablebits[2]; |
528a572d | 1110 | hwif_chipset_t chipset; |
3071a9d0 | 1111 | u8 extra; |
9ffcf364 | 1112 | u32 host_flags; |
4099d143 | 1113 | u8 pio_mask; |
5f8b6c34 BZ |
1114 | u8 swdma_mask; |
1115 | u8 mwdma_mask; | |
18137207 | 1116 | u8 udma_mask; |
039788e1 | 1117 | }; |
1da177e4 | 1118 | |
85620436 BZ |
1119 | int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *); |
1120 | int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *); | |
1da177e4 LT |
1121 | |
1122 | void ide_map_sg(ide_drive_t *, struct request *); | |
1123 | void ide_init_sg_cmd(ide_drive_t *, struct request *); | |
1124 | ||
1125 | #define BAD_DMA_DRIVE 0 | |
1126 | #define GOOD_DMA_DRIVE 1 | |
1127 | ||
65e5f2e3 JC |
1128 | struct drive_list_entry { |
1129 | const char *id_model; | |
1130 | const char *id_firmware; | |
1131 | }; | |
1132 | ||
1133 | int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *); | |
a5b7e70d BZ |
1134 | |
1135 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
1da177e4 | 1136 | int __ide_dma_bad_drive(ide_drive_t *); |
3ab7efe8 | 1137 | int ide_id_dma_bug(ide_drive_t *); |
7670df73 BZ |
1138 | |
1139 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1140 | ||
1141 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1142 | { | |
1143 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1144 | } | |
1145 | ||
4a546e04 | 1146 | void ide_dma_off_quietly(ide_drive_t *); |
7469aaf6 | 1147 | void ide_dma_off(ide_drive_t *); |
4a546e04 | 1148 | void ide_dma_on(ide_drive_t *); |
3608b5d7 | 1149 | int ide_set_dma(ide_drive_t *); |
578cfa0d | 1150 | void ide_check_dma_crc(ide_drive_t *); |
1da177e4 LT |
1151 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1152 | ||
062f9f02 BZ |
1153 | int ide_build_sglist(ide_drive_t *, struct request *); |
1154 | void ide_destroy_dmatable(ide_drive_t *); | |
1155 | ||
8e882ba1 | 1156 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF |
1da177e4 | 1157 | extern int ide_build_dmatable(ide_drive_t *, struct request *); |
1da177e4 | 1158 | extern int ide_release_dma(ide_hwif_t *); |
ecf32796 | 1159 | extern void ide_setup_dma(ide_hwif_t *, unsigned long); |
1da177e4 | 1160 | |
15ce926a | 1161 | void ide_dma_host_set(ide_drive_t *, int); |
1da177e4 LT |
1162 | extern int ide_dma_setup(ide_drive_t *); |
1163 | extern void ide_dma_start(ide_drive_t *); | |
1164 | extern int __ide_dma_end(ide_drive_t *); | |
841d2a9b | 1165 | extern void ide_dma_lost_irq(ide_drive_t *); |
c283f5db | 1166 | extern void ide_dma_timeout(ide_drive_t *); |
8e882ba1 | 1167 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ |
1da177e4 LT |
1168 | |
1169 | #else | |
3ab7efe8 | 1170 | static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } |
7670df73 | 1171 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1172 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
4a546e04 | 1173 | static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } |
7469aaf6 | 1174 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
4a546e04 | 1175 | static inline void ide_dma_on(ide_drive_t *drive) { ; } |
1da177e4 | 1176 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1177 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
578cfa0d | 1178 | static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } |
1da177e4 LT |
1179 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1180 | ||
8e882ba1 | 1181 | #ifndef CONFIG_BLK_DEV_IDEDMA_SFF |
1da177e4 LT |
1182 | static inline void ide_release_dma(ide_hwif_t *drive) {;} |
1183 | #endif | |
1184 | ||
e3a59b4d HR |
1185 | #ifdef CONFIG_BLK_DEV_IDEACPI |
1186 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); | |
1187 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1188 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
1189 | extern void ide_acpi_init(ide_hwif_t *hwif); | |
eafd88a3 | 1190 | void ide_acpi_port_init_devices(ide_hwif_t *); |
5e32132b | 1191 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d HR |
1192 | #else |
1193 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } | |
1194 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1195 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
1196 | static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } | |
eafd88a3 | 1197 | static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } |
5e32132b | 1198 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1199 | #endif |
1200 | ||
fbd13088 | 1201 | void ide_remove_port_from_hwgroup(ide_hwif_t *); |
1da177e4 LT |
1202 | extern int ide_hwif_request_regions(ide_hwif_t *hwif); |
1203 | extern void ide_hwif_release_regions(ide_hwif_t* hwif); | |
93de00fd | 1204 | void ide_unregister(unsigned int); |
1da177e4 LT |
1205 | |
1206 | void ide_register_region(struct gendisk *); | |
1207 | void ide_unregister_region(struct gendisk *); | |
1208 | ||
f01393e4 | 1209 | void ide_undecoded_slave(ide_drive_t *); |
1da177e4 | 1210 | |
c413b9b9 BZ |
1211 | int ide_device_add_all(u8 *idx, const struct ide_port_info *); |
1212 | int ide_device_add(u8 idx[4], const struct ide_port_info *); | |
2dde7861 BZ |
1213 | void ide_port_unregister_devices(ide_hwif_t *); |
1214 | void ide_port_scan(ide_hwif_t *); | |
1da177e4 LT |
1215 | |
1216 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1217 | { | |
1218 | return hwif->hwif_data; | |
1219 | } | |
1220 | ||
1221 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1222 | { | |
1223 | hwif->hwif_data = data; | |
1224 | } | |
1225 | ||
3ab7efe8 | 1226 | const char *ide_xfer_verbose(u8 mode); |
1da177e4 LT |
1227 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); |
1228 | extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); | |
1229 | ||
2229833c BZ |
1230 | static inline int ide_dev_has_iordy(struct hd_driveid *id) |
1231 | { | |
1232 | return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0; | |
1233 | } | |
1234 | ||
6c3c22f3 SS |
1235 | static inline int ide_dev_is_sata(struct hd_driveid *id) |
1236 | { | |
1237 | /* | |
1238 | * See if word 93 is 0 AND drive is at least ATA-5 compatible | |
1239 | * verifying that word 80 by casting it to a signed type -- | |
1240 | * this trick allows us to filter out the reserved values of | |
1241 | * 0x0000 and 0xffff along with the earlier ATA revisions... | |
1242 | */ | |
1243 | if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020) | |
1244 | return 1; | |
1245 | return 0; | |
1246 | } | |
1247 | ||
a501633c | 1248 | u64 ide_get_lba_addr(struct ide_taskfile *, int); |
1da177e4 LT |
1249 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1250 | ||
1251 | typedef struct ide_pio_timings_s { | |
1252 | int setup_time; /* Address setup (ns) minimum */ | |
1253 | int active_time; /* Active pulse (ns) minimum */ | |
81d368e0 SS |
1254 | int cycle_time; /* Cycle time (ns) minimum = */ |
1255 | /* active + recovery (+ setup for some chips) */ | |
1da177e4 LT |
1256 | } ide_pio_timings_t; |
1257 | ||
7dd00083 | 1258 | unsigned int ide_pio_cycle_time(ide_drive_t *, u8); |
2134758d | 1259 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
1da177e4 LT |
1260 | extern const ide_pio_timings_t ide_pio_timings[6]; |
1261 | ||
88b2b32b BZ |
1262 | int ide_set_pio_mode(ide_drive_t *, u8); |
1263 | int ide_set_dma_mode(ide_drive_t *, u8); | |
1264 | ||
26bcb879 BZ |
1265 | void ide_set_pio(ide_drive_t *, u8); |
1266 | ||
1267 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1268 | { | |
1269 | ide_set_pio(drive, 255); | |
1270 | } | |
1da177e4 LT |
1271 | |
1272 | extern spinlock_t ide_lock; | |
ef29888e | 1273 | extern struct mutex ide_cfg_mtx; |
1da177e4 LT |
1274 | /* |
1275 | * Structure locking: | |
1276 | * | |
ef29888e | 1277 | * ide_cfg_mtx and ide_lock together protect changes to |
1da177e4 LT |
1278 | * ide_hwif_t->{next,hwgroup} |
1279 | * ide_drive_t->next | |
1280 | * | |
1281 | * ide_hwgroup_t->busy: ide_lock | |
1282 | * ide_hwgroup_t->hwif: ide_lock | |
1283 | * ide_hwif_t->mate: constant, no locking | |
1284 | * ide_drive_t->hwif: constant, no locking | |
1285 | */ | |
1286 | ||
366c7f55 | 1287 | #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0) |
1da177e4 LT |
1288 | |
1289 | extern struct bus_type ide_bus_type; | |
f74c9141 | 1290 | extern struct class *ide_port_class; |
1da177e4 LT |
1291 | |
1292 | /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */ | |
1293 | #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000) | |
1294 | ||
1295 | /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */ | |
1296 | #define ide_id_has_flush_cache_ext(id) \ | |
1297 | (((id)->cfs_enable_2 & 0x2400) == 0x2400) | |
1298 | ||
7b9f25b5 BZ |
1299 | static inline void ide_dump_identify(u8 *id) |
1300 | { | |
1301 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); | |
1302 | } | |
1303 | ||
86b37860 CL |
1304 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1305 | { | |
36501650 | 1306 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1f07e988 | 1307 | return hwif->dev ? pcibus_to_node(dev->bus) : -1; |
86b37860 CL |
1308 | } |
1309 | ||
1b678347 BH |
1310 | static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive) |
1311 | { | |
1312 | ide_hwif_t *hwif = HWIF(drive); | |
1313 | ||
1314 | return &hwif->drives[(drive->dn ^ 1) & 1]; | |
1315 | } | |
1316 | ||
81ca6919 BZ |
1317 | static inline void ide_set_irq(ide_drive_t *drive, int on) |
1318 | { | |
23579a2a BZ |
1319 | ide_hwif_t *hwif = drive->hwif; |
1320 | ||
1321 | hwif->OUTB(drive->ctl | (on ? 0 : 2), | |
1322 | hwif->io_ports[IDE_CONTROL_OFFSET]); | |
81ca6919 BZ |
1323 | } |
1324 | ||
c47137a9 BZ |
1325 | static inline u8 ide_read_status(ide_drive_t *drive) |
1326 | { | |
1327 | ide_hwif_t *hwif = drive->hwif; | |
1328 | ||
1329 | return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); | |
1330 | } | |
1331 | ||
1332 | static inline u8 ide_read_altstatus(ide_drive_t *drive) | |
1333 | { | |
1334 | ide_hwif_t *hwif = drive->hwif; | |
1335 | ||
1336 | return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]); | |
1337 | } | |
1338 | ||
64a57fe4 BZ |
1339 | static inline u8 ide_read_error(ide_drive_t *drive) |
1340 | { | |
1341 | ide_hwif_t *hwif = drive->hwif; | |
1342 | ||
1343 | return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]); | |
1344 | } | |
1345 | ||
7616c0ad BZ |
1346 | /* |
1347 | * Too bad. The drive wants to send us data which we are not ready to accept. | |
1348 | * Just throw it away. | |
1349 | */ | |
1350 | static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount) | |
1351 | { | |
1352 | ide_hwif_t *hwif = drive->hwif; | |
1353 | ||
1354 | /* FIXME: use ->atapi_input_bytes */ | |
1355 | while (bcount--) | |
1356 | (void)hwif->INB(hwif->io_ports[IDE_DATA_OFFSET]); | |
1357 | } | |
1358 | ||
1359 | static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount) | |
1360 | { | |
1361 | ide_hwif_t *hwif = drive->hwif; | |
1362 | ||
1363 | /* FIXME: use ->atapi_output_bytes */ | |
1364 | while (bcount--) | |
1365 | hwif->OUTB(0, hwif->io_ports[IDE_DATA_OFFSET]); | |
1366 | } | |
1367 | ||
1da177e4 | 1368 | #endif /* _IDE_H */ |