Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
11 | #include <linux/hdreg.h> | |
12 | #include <linux/hdsmart.h> | |
13 | #include <linux/blkdev.h> | |
14 | #include <linux/proc_fs.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/bitops.h> | |
17 | #include <linux/bio.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/pci.h> | |
f36d4024 | 20 | #include <linux/completion.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/semaphore.h> | |
f9383c42 | 28 | #include <asm/mutex.h> |
1da177e4 | 29 | |
4ee06b7e BZ |
30 | #if defined(CRIS) || defined(FRV) |
31 | # define SUPPORT_VLB_SYNC 0 | |
32 | #else | |
33 | # define SUPPORT_VLB_SYNC 1 | |
1da177e4 LT |
34 | #endif |
35 | ||
36 | /* | |
37 | * Used to indicate "no IRQ", should be a value that cannot be an IRQ | |
38 | * number. | |
39 | */ | |
40 | ||
41 | #define IDE_NO_IRQ (-1) | |
42 | ||
1da177e4 LT |
43 | typedef unsigned char byte; /* used everywhere */ |
44 | ||
45 | /* | |
46 | * Probably not wise to fiddle with these | |
47 | */ | |
48 | #define ERROR_MAX 8 /* Max read/write errors per sector */ | |
49 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
50 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
51 | ||
52 | /* | |
53 | * Tune flags | |
54 | */ | |
55 | #define IDE_TUNE_NOAUTO 2 | |
56 | #define IDE_TUNE_AUTO 1 | |
57 | #define IDE_TUNE_DEFAULT 0 | |
58 | ||
59 | /* | |
60 | * state flags | |
61 | */ | |
62 | ||
63 | #define DMA_PIO_RETRY 1 /* retrying in PIO */ | |
64 | ||
65 | #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif)) | |
66 | #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup)) | |
67 | ||
68 | /* | |
69 | * Definitions for accessing IDE controller registers | |
70 | */ | |
71 | #define IDE_NR_PORTS (10) | |
72 | ||
73 | #define IDE_DATA_OFFSET (0) | |
74 | #define IDE_ERROR_OFFSET (1) | |
75 | #define IDE_NSECTOR_OFFSET (2) | |
76 | #define IDE_SECTOR_OFFSET (3) | |
77 | #define IDE_LCYL_OFFSET (4) | |
78 | #define IDE_HCYL_OFFSET (5) | |
79 | #define IDE_SELECT_OFFSET (6) | |
80 | #define IDE_STATUS_OFFSET (7) | |
81 | #define IDE_CONTROL_OFFSET (8) | |
82 | #define IDE_IRQ_OFFSET (9) | |
83 | ||
84 | #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET | |
85 | #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET | |
86 | ||
1da177e4 LT |
87 | #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET]) |
88 | #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET]) | |
89 | #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET]) | |
90 | #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET]) | |
91 | #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET]) | |
92 | #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET]) | |
93 | #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET]) | |
94 | #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET]) | |
95 | #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET]) | |
96 | #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET]) | |
97 | ||
98 | #define IDE_FEATURE_REG IDE_ERROR_REG | |
99 | #define IDE_COMMAND_REG IDE_STATUS_REG | |
100 | #define IDE_ALTSTATUS_REG IDE_CONTROL_REG | |
101 | #define IDE_IREASON_REG IDE_NSECTOR_REG | |
102 | #define IDE_BCOUNTL_REG IDE_LCYL_REG | |
103 | #define IDE_BCOUNTH_REG IDE_HCYL_REG | |
104 | ||
105 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
106 | #define BAD_R_STAT (BUSY_STAT | ERR_STAT) | |
107 | #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT) | |
108 | #define BAD_STAT (BAD_R_STAT | DRQ_STAT) | |
109 | #define DRIVE_READY (READY_STAT | SEEK_STAT) | |
110 | #define DATA_READY (DRQ_STAT) | |
111 | ||
112 | #define BAD_CRC (ABRT_ERR | ICRC_ERR) | |
113 | ||
114 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
115 | ||
116 | #define SATA_STATUS_OFFSET (0) | |
117 | #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET]) | |
118 | #define SATA_ERROR_OFFSET (1) | |
119 | #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET]) | |
120 | #define SATA_CONTROL_OFFSET (2) | |
121 | #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET]) | |
122 | ||
123 | #define SATA_MISC_OFFSET (0) | |
124 | #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET]) | |
125 | #define SATA_PHY_OFFSET (1) | |
126 | #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET]) | |
127 | #define SATA_IEN_OFFSET (2) | |
128 | #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET]) | |
129 | ||
130 | /* | |
131 | * Our Physical Region Descriptor (PRD) table should be large enough | |
132 | * to handle the biggest I/O request we are likely to see. Since requests | |
133 | * can have no more than 256 sectors, and since the typical blocksize is | |
134 | * two or more sectors, we could get by with a limit of 128 entries here for | |
135 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
136 | * further reducing the number of table entries required. | |
137 | * | |
138 | * The driver reverts to PIO mode for individual requests that exceed | |
139 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
140 | * 100% of all crazy scenarios here is not necessary. | |
141 | * | |
142 | * As it turns out though, we must allocate a full 4KB page for this, | |
143 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
144 | * allowing each to have about 256 entries (8 bytes each) from this. | |
145 | */ | |
146 | #define PRD_BYTES 8 | |
147 | #define PRD_ENTRIES 256 | |
148 | ||
149 | /* | |
150 | * Some more useful definitions | |
151 | */ | |
152 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
153 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
154 | #define SECTOR_SIZE 512 | |
155 | #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */ | |
156 | #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t))) | |
157 | ||
158 | /* | |
159 | * Timeouts for various operations: | |
160 | */ | |
161 | #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */ | |
162 | #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */ | |
163 | #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
164 | #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */ | |
165 | #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ | |
166 | #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */ | |
167 | ||
1da177e4 LT |
168 | /* |
169 | * Check for an interrupt and acknowledge the interrupt status | |
170 | */ | |
171 | struct hwif_s; | |
172 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
173 | ||
1da177e4 LT |
174 | /* |
175 | * hwif_chipset_t is used to keep track of the specific hardware | |
176 | * chipset used by each IDE interface, if known. | |
177 | */ | |
528a572d | 178 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
179 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
180 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
181 | ide_rz1000, ide_trm290, | |
182 | ide_cmd646, ide_cy82c693, ide_4drives, | |
183 | ide_pmac, ide_etrax100, ide_acorn, | |
26a940e2 | 184 | ide_au1xxx, ide_forced |
528a572d BZ |
185 | }; |
186 | ||
187 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
188 | |
189 | /* | |
190 | * Structure to hold all information about the location of this port | |
191 | */ | |
192 | typedef struct hw_regs_s { | |
193 | unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */ | |
194 | int irq; /* our irq number */ | |
1da177e4 LT |
195 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
196 | hwif_chipset_t chipset; | |
4349d5cd | 197 | struct device *dev; |
1da177e4 LT |
198 | } hw_regs_t; |
199 | ||
baa8f3e9 BZ |
200 | struct hwif_s * ide_find_port(unsigned long); |
201 | ||
fd9bb539 BZ |
202 | int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int, |
203 | struct hwif_s **); | |
1da177e4 | 204 | |
1da177e4 LT |
205 | void ide_setup_ports( hw_regs_t *hw, |
206 | unsigned long base, | |
207 | int *offsets, | |
208 | unsigned long ctrl, | |
209 | unsigned long intr, | |
210 | ide_ack_intr_t *ack_intr, | |
211 | #if 0 | |
212 | ide_io_ops_t *iops, | |
213 | #endif | |
214 | int irq); | |
215 | ||
216 | static inline void ide_std_init_ports(hw_regs_t *hw, | |
217 | unsigned long io_addr, | |
218 | unsigned long ctl_addr) | |
219 | { | |
220 | unsigned int i; | |
221 | ||
222 | for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) | |
223 | hw->io_ports[i] = io_addr++; | |
224 | ||
225 | hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr; | |
226 | } | |
227 | ||
228 | #include <asm/ide.h> | |
229 | ||
83d7dbc4 MM |
230 | #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED) |
231 | #undef MAX_HWIFS | |
83ae20c8 BH |
232 | #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS |
233 | #endif | |
234 | ||
1da177e4 LT |
235 | /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */ |
236 | #ifndef IDE_ARCH_OBSOLETE_DEFAULTS | |
237 | # define ide_default_io_base(index) (0) | |
238 | # define ide_default_irq(base) (0) | |
239 | # define ide_init_default_irq(base) (0) | |
240 | #endif | |
241 | ||
847ddd2b | 242 | #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT |
1da177e4 LT |
243 | static inline void ide_init_hwif_ports(hw_regs_t *hw, |
244 | unsigned long io_addr, | |
245 | unsigned long ctl_addr, | |
246 | int *irq) | |
247 | { | |
248 | if (!ctl_addr) | |
249 | ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr)); | |
250 | else | |
251 | ide_std_init_ports(hw, io_addr, ctl_addr); | |
252 | ||
253 | if (irq) | |
254 | *irq = 0; | |
255 | ||
256 | hw->io_ports[IDE_IRQ_OFFSET] = 0; | |
257 | ||
258 | #ifdef CONFIG_PPC32 | |
259 | if (ppc_ide_md.ide_init_hwif) | |
260 | ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq); | |
261 | #endif | |
262 | } | |
263 | #else | |
264 | static inline void ide_init_hwif_ports(hw_regs_t *hw, | |
265 | unsigned long io_addr, | |
266 | unsigned long ctl_addr, | |
267 | int *irq) | |
268 | { | |
269 | if (io_addr || ctl_addr) | |
270 | printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__); | |
271 | } | |
847ddd2b | 272 | #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */ |
1da177e4 LT |
273 | |
274 | /* Currently only m68k, apus and m8xx need it */ | |
275 | #ifndef IDE_ARCH_ACK_INTR | |
276 | # define ide_ack_intr(hwif) (1) | |
277 | #endif | |
278 | ||
279 | /* Currently only Atari needs it */ | |
280 | #ifndef IDE_ARCH_LOCK | |
281 | # define ide_release_lock() do {} while (0) | |
282 | # define ide_get_lock(hdlr, data) do {} while (0) | |
283 | #endif /* IDE_ARCH_LOCK */ | |
284 | ||
285 | /* | |
286 | * Now for the data we need to maintain per-drive: ide_drive_t | |
287 | */ | |
288 | ||
289 | #define ide_scsi 0x21 | |
290 | #define ide_disk 0x20 | |
291 | #define ide_optical 0x7 | |
292 | #define ide_cdrom 0x5 | |
293 | #define ide_tape 0x1 | |
294 | #define ide_floppy 0x0 | |
295 | ||
296 | /* | |
297 | * Special Driver Flags | |
298 | * | |
299 | * set_geometry : respecify drive geometry | |
300 | * recalibrate : seek to cyl 0 | |
301 | * set_multmode : set multmode count | |
302 | * set_tune : tune interface for drive | |
303 | * serviced : service command | |
304 | * reserved : unused | |
305 | */ | |
306 | typedef union { | |
307 | unsigned all : 8; | |
308 | struct { | |
1da177e4 LT |
309 | unsigned set_geometry : 1; |
310 | unsigned recalibrate : 1; | |
311 | unsigned set_multmode : 1; | |
312 | unsigned set_tune : 1; | |
313 | unsigned serviced : 1; | |
314 | unsigned reserved : 3; | |
1da177e4 LT |
315 | } b; |
316 | } special_t; | |
317 | ||
1da177e4 LT |
318 | /* |
319 | * ATA-IDE Select Register, aka Device-Head | |
320 | * | |
321 | * head : always zeros here | |
322 | * unit : drive select number: 0/1 | |
323 | * bit5 : always 1 | |
324 | * lba : using LBA instead of CHS | |
325 | * bit7 : always 1 | |
326 | */ | |
327 | typedef union { | |
328 | unsigned all : 8; | |
329 | struct { | |
330 | #if defined(__LITTLE_ENDIAN_BITFIELD) | |
331 | unsigned head : 4; | |
332 | unsigned unit : 1; | |
333 | unsigned bit5 : 1; | |
334 | unsigned lba : 1; | |
335 | unsigned bit7 : 1; | |
336 | #elif defined(__BIG_ENDIAN_BITFIELD) | |
337 | unsigned bit7 : 1; | |
338 | unsigned lba : 1; | |
339 | unsigned bit5 : 1; | |
340 | unsigned unit : 1; | |
341 | unsigned head : 4; | |
342 | #else | |
343 | #error "Please fix <asm/byteorder.h>" | |
344 | #endif | |
345 | } b; | |
346 | } select_t, ata_select_t; | |
347 | ||
1da177e4 LT |
348 | /* |
349 | * Status returned from various ide_ functions | |
350 | */ | |
351 | typedef enum { | |
352 | ide_stopped, /* no drive operation was started */ | |
353 | ide_started, /* a drive operation was started, handler was set */ | |
354 | } ide_startstop_t; | |
355 | ||
356 | struct ide_driver_s; | |
357 | struct ide_settings_s; | |
358 | ||
e3a59b4d HR |
359 | #ifdef CONFIG_BLK_DEV_IDEACPI |
360 | struct ide_acpi_drive_link; | |
361 | struct ide_acpi_hwif_link; | |
362 | #endif | |
363 | ||
1da177e4 LT |
364 | typedef struct ide_drive_s { |
365 | char name[4]; /* drive name, such as "hda" */ | |
366 | char driver_req[10]; /* requests specific driver */ | |
367 | ||
165125e1 | 368 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
369 | |
370 | struct request *rq; /* current request */ | |
371 | struct ide_drive_s *next; /* circular list of hwgroup drives */ | |
1da177e4 LT |
372 | void *driver_data; /* extra driver data */ |
373 | struct hd_driveid *id; /* drive model identification info */ | |
7662d046 | 374 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 LT |
375 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
376 | struct ide_settings_s *settings;/* /proc/ide/ drive settings */ | |
7662d046 | 377 | #endif |
1da177e4 LT |
378 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
379 | ||
380 | unsigned long sleep; /* sleep until this time */ | |
381 | unsigned long service_start; /* time we started last request */ | |
382 | unsigned long service_time; /* service time of last request */ | |
383 | unsigned long timeout; /* max time to wait for irq */ | |
384 | ||
385 | special_t special; /* special action flags */ | |
386 | select_t select; /* basic drive/head select reg value */ | |
387 | ||
388 | u8 keep_settings; /* restore settings after drive reset */ | |
1da177e4 LT |
389 | u8 using_dma; /* disk is using dma for read/write */ |
390 | u8 retry_pio; /* retrying dma capable host in pio */ | |
391 | u8 state; /* retry state */ | |
392 | u8 waiting_for_dma; /* dma currently in progress */ | |
393 | u8 unmask; /* okay to unmask other irqs */ | |
394 | u8 bswap; /* byte swap data */ | |
36193484 | 395 | u8 noflush; /* don't attempt flushes */ |
1da177e4 LT |
396 | u8 dsc_overlap; /* DSC overlap */ |
397 | u8 nice1; /* give potential excess bandwidth */ | |
398 | ||
399 | unsigned present : 1; /* drive is physically present */ | |
400 | unsigned dead : 1; /* device ejected hint */ | |
401 | unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */ | |
402 | unsigned noprobe : 1; /* from: hdx=noprobe */ | |
403 | unsigned removable : 1; /* 1 if need to do check_media_change */ | |
404 | unsigned attach : 1; /* needed for removable devices */ | |
1da177e4 LT |
405 | unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */ |
406 | unsigned no_unmask : 1; /* disallow setting unmask bit */ | |
407 | unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */ | |
408 | unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */ | |
409 | unsigned nice0 : 1; /* give obvious excess bandwidth */ | |
410 | unsigned nice2 : 1; /* give a share in our own bandwidth */ | |
411 | unsigned doorlocking : 1; /* for removable only: door lock/unlock works */ | |
c223701c | 412 | unsigned nodma : 1; /* disallow DMA */ |
1da177e4 LT |
413 | unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */ |
414 | unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */ | |
415 | unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */ | |
416 | unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */ | |
1da177e4 LT |
417 | unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */ |
418 | unsigned sleeping : 1; /* 1=sleeping & sleep field valid */ | |
419 | unsigned post_reset : 1; | |
7f8f48af | 420 | unsigned udma33_warned : 1; |
1da177e4 | 421 | |
1497943e | 422 | u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */ |
1da177e4 LT |
423 | u8 quirk_list; /* considered quirky, set for a specific host */ |
424 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 425 | u8 current_speed; /* current transfer rate set */ |
513daadd | 426 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 LT |
427 | u8 dn; /* now wide spread use */ |
428 | u8 wcache; /* status of write cache */ | |
429 | u8 acoustic; /* acoustic management */ | |
430 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
431 | u8 ctl; /* "normal" value for IDE_CONTROL_REG */ | |
432 | u8 ready_stat; /* min status value for drive ready */ | |
433 | u8 mult_count; /* current multiple sector setting */ | |
434 | u8 mult_req; /* requested multiple sector setting */ | |
435 | u8 tune_req; /* requested drive tuning setting */ | |
436 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ | |
437 | u8 bad_wstat; /* used for ignoring WRERR_STAT */ | |
438 | u8 nowerr; /* used for ignoring WRERR_STAT */ | |
439 | u8 sect0; /* offset of first sector for DM6:DDO */ | |
440 | u8 head; /* "real" number of heads */ | |
441 | u8 sect; /* "real" sectors per track */ | |
442 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
443 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
444 | ||
445 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ | |
446 | unsigned int cyl; /* "real" number of cyls */ | |
26bcb879 | 447 | unsigned int drive_data; /* used by set_pio_mode/selectproc */ |
1da177e4 LT |
448 | unsigned int failures; /* current failure count */ |
449 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 450 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
451 | |
452 | u64 capacity64; /* total number of sectors */ | |
453 | ||
454 | int lun; /* logical unit */ | |
455 | int crc_count; /* crc counter to reduce drive speed */ | |
e3a59b4d HR |
456 | #ifdef CONFIG_BLK_DEV_IDEACPI |
457 | struct ide_acpi_drive_link *acpidata; | |
458 | #endif | |
1da177e4 LT |
459 | struct list_head list; |
460 | struct device gendev; | |
f36d4024 | 461 | struct completion gendev_rel_comp; /* to deal with device release() */ |
1da177e4 LT |
462 | } ide_drive_t; |
463 | ||
8604affd BZ |
464 | #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev) |
465 | ||
1da177e4 LT |
466 | #define IDE_CHIPSET_PCI_MASK \ |
467 | ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx)) | |
468 | #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1) | |
469 | ||
039788e1 | 470 | struct ide_port_info; |
1da177e4 LT |
471 | |
472 | typedef struct hwif_s { | |
473 | struct hwif_s *next; /* for linked-list in ide_hwgroup_t */ | |
474 | struct hwif_s *mate; /* other hwif from same PCI chip */ | |
475 | struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */ | |
476 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ | |
477 | ||
478 | char name[6]; /* name of interface, eg. "ide0" */ | |
479 | ||
480 | /* task file registers for pata and sata */ | |
481 | unsigned long io_ports[IDE_NR_PORTS]; | |
482 | unsigned long sata_scr[SATA_NR_PORTS]; | |
483 | unsigned long sata_misc[SATA_NR_PORTS]; | |
484 | ||
1da177e4 LT |
485 | ide_drive_t drives[MAX_DRIVES]; /* drive info */ |
486 | ||
487 | u8 major; /* our major number */ | |
488 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
489 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
490 | u8 straight8; /* Alan's straight 8 check */ | |
491 | u8 bus_state; /* power state of the IDE bus */ | |
492 | ||
e95d9c6b | 493 | u32 host_flags; |
6a824c92 | 494 | |
4099d143 BZ |
495 | u8 pio_mask; |
496 | ||
1da177e4 LT |
497 | u8 ultra_mask; |
498 | u8 mwdma_mask; | |
499 | u8 swdma_mask; | |
500 | ||
49521f97 BZ |
501 | u8 cbl; /* cable type */ |
502 | ||
1da177e4 LT |
503 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
504 | ||
505 | struct pci_dev *pci_dev; /* for pci chipsets */ | |
85620436 | 506 | const struct ide_port_info *cds; /* chipset device struct */ |
1da177e4 | 507 | |
18e181fe BZ |
508 | ide_ack_intr_t *ack_intr; |
509 | ||
1da177e4 LT |
510 | void (*rw_disk)(ide_drive_t *, struct request *); |
511 | ||
512 | #if 0 | |
513 | ide_hwif_ops_t *hwifops; | |
514 | #else | |
88b2b32b | 515 | /* routine to program host for PIO mode */ |
26bcb879 | 516 | void (*set_pio_mode)(ide_drive_t *, const u8); |
88b2b32b BZ |
517 | /* routine to program host for DMA mode */ |
518 | void (*set_dma_mode)(ide_drive_t *, const u8); | |
1da177e4 LT |
519 | /* tweaks hardware to select drive */ |
520 | void (*selectproc)(ide_drive_t *); | |
521 | /* chipset polling based on hba specifics */ | |
522 | int (*reset_poll)(ide_drive_t *); | |
523 | /* chipset specific changes to default for device-hba resets */ | |
524 | void (*pre_reset)(ide_drive_t *); | |
525 | /* routine to reset controller after a disk reset */ | |
526 | void (*resetproc)(ide_drive_t *); | |
1da177e4 LT |
527 | /* special host masking for drive selection */ |
528 | void (*maskproc)(ide_drive_t *, int); | |
529 | /* check host's drive quirk list */ | |
530 | int (*quirkproc)(ide_drive_t *); | |
531 | /* driver soft-power interface */ | |
532 | int (*busproc)(ide_drive_t *, int); | |
1da177e4 | 533 | #endif |
b4e44369 | 534 | u8 (*mdma_filter)(ide_drive_t *); |
2d5eaa6d | 535 | u8 (*udma_filter)(ide_drive_t *); |
1da177e4 | 536 | |
fd9bb539 BZ |
537 | void (*fixup)(struct hwif_s *); |
538 | ||
1da177e4 LT |
539 | void (*ata_input_data)(ide_drive_t *, void *, u32); |
540 | void (*ata_output_data)(ide_drive_t *, void *, u32); | |
541 | ||
542 | void (*atapi_input_bytes)(ide_drive_t *, void *, u32); | |
543 | void (*atapi_output_bytes)(ide_drive_t *, void *, u32); | |
544 | ||
15ce926a | 545 | void (*dma_host_set)(ide_drive_t *, int); |
1da177e4 LT |
546 | int (*dma_setup)(ide_drive_t *); |
547 | void (*dma_exec_cmd)(ide_drive_t *, u8); | |
548 | void (*dma_start)(ide_drive_t *); | |
549 | int (*ide_dma_end)(ide_drive_t *drive); | |
1da177e4 | 550 | int (*ide_dma_test_irq)(ide_drive_t *drive); |
f0dd8712 | 551 | void (*ide_dma_clear_irq)(ide_drive_t *drive); |
841d2a9b | 552 | void (*dma_lost_irq)(ide_drive_t *drive); |
c283f5db | 553 | void (*dma_timeout)(ide_drive_t *drive); |
1da177e4 LT |
554 | |
555 | void (*OUTB)(u8 addr, unsigned long port); | |
556 | void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port); | |
557 | void (*OUTW)(u16 addr, unsigned long port); | |
1da177e4 LT |
558 | void (*OUTSW)(unsigned long port, void *addr, u32 count); |
559 | void (*OUTSL)(unsigned long port, void *addr, u32 count); | |
560 | ||
561 | u8 (*INB)(unsigned long port); | |
562 | u16 (*INW)(unsigned long port); | |
1da177e4 LT |
563 | void (*INSW)(unsigned long port, void *addr, u32 count); |
564 | void (*INSL)(unsigned long port, void *addr, u32 count); | |
565 | ||
566 | /* dma physical region descriptor table (cpu view) */ | |
567 | unsigned int *dmatable_cpu; | |
568 | /* dma physical region descriptor table (dma view) */ | |
569 | dma_addr_t dmatable_dma; | |
570 | /* Scatter-gather list used to build the above */ | |
571 | struct scatterlist *sg_table; | |
572 | int sg_max_nents; /* Maximum number of entries in it */ | |
573 | int sg_nents; /* Current number of entries in it */ | |
574 | int sg_dma_direction; /* dma transfer direction */ | |
575 | ||
576 | /* data phase of the active command (currently only valid for PIO/DMA) */ | |
577 | int data_phase; | |
578 | ||
579 | unsigned int nsect; | |
580 | unsigned int nleft; | |
55c16a70 | 581 | struct scatterlist *cursg; |
1da177e4 LT |
582 | unsigned int cursg_ofs; |
583 | ||
1da177e4 LT |
584 | int rqsize; /* max sectors per request */ |
585 | int irq; /* our irq number */ | |
586 | ||
1da177e4 LT |
587 | unsigned long dma_base; /* base addr for dma ports */ |
588 | unsigned long dma_command; /* dma command register */ | |
589 | unsigned long dma_vendor1; /* dma vendor 1 register */ | |
590 | unsigned long dma_status; /* dma status register */ | |
591 | unsigned long dma_vendor3; /* dma vendor 3 register */ | |
592 | unsigned long dma_prdtable; /* actual prd table address */ | |
1da177e4 | 593 | |
1da177e4 LT |
594 | unsigned long config_data; /* for use by chipset-specific code */ |
595 | unsigned long select_data; /* for use by chipset-specific code */ | |
596 | ||
020e322d SS |
597 | unsigned long extra_base; /* extra addr for dma ports */ |
598 | unsigned extra_ports; /* number of extra dma ports */ | |
599 | ||
1da177e4 LT |
600 | unsigned noprobe : 1; /* don't probe for this interface */ |
601 | unsigned present : 1; /* this interface exists */ | |
602 | unsigned hold : 1; /* this interface is always present */ | |
603 | unsigned serialized : 1; /* serialized all channel operation */ | |
604 | unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ | |
605 | unsigned reset : 1; /* reset after probe */ | |
1da177e4 LT |
606 | unsigned auto_poll : 1; /* supports nop auto-poll */ |
607 | unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ | |
208a08f7 | 608 | unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */ |
2ad1e558 | 609 | unsigned mmio : 1; /* host uses MMIO */ |
1da177e4 LT |
610 | |
611 | struct device gendev; | |
f36d4024 | 612 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
613 | |
614 | void *hwif_data; /* extra hwif data */ | |
615 | ||
616 | unsigned dma; | |
e3a59b4d HR |
617 | |
618 | #ifdef CONFIG_BLK_DEV_IDEACPI | |
619 | struct ide_acpi_hwif_link *acpidata; | |
620 | #endif | |
22fc6ecc | 621 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 LT |
622 | |
623 | /* | |
624 | * internal ide interrupt handler type | |
625 | */ | |
1da177e4 LT |
626 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); |
627 | typedef int (ide_expiry_t)(ide_drive_t *); | |
628 | ||
629 | typedef struct hwgroup_s { | |
630 | /* irq handler, if active */ | |
631 | ide_startstop_t (*handler)(ide_drive_t *); | |
632 | /* irq handler, suspended if active */ | |
633 | ide_startstop_t (*handler_save)(ide_drive_t *); | |
634 | /* BOOL: protects all fields below */ | |
635 | volatile int busy; | |
636 | /* BOOL: wake us up on timer expiry */ | |
637 | unsigned int sleeping : 1; | |
638 | /* BOOL: polling active & poll_timeout field valid */ | |
639 | unsigned int polling : 1; | |
913759ac AC |
640 | /* BOOL: in a polling reset situation. Must not trigger another reset yet */ |
641 | unsigned int resetting : 1; | |
642 | ||
1da177e4 LT |
643 | /* current drive */ |
644 | ide_drive_t *drive; | |
645 | /* ptr to current hwif in linked-list */ | |
646 | ide_hwif_t *hwif; | |
647 | ||
648 | /* for pci chipsets */ | |
649 | struct pci_dev *pci_dev; | |
1da177e4 LT |
650 | |
651 | /* current request */ | |
652 | struct request *rq; | |
653 | /* failsafe timer */ | |
654 | struct timer_list timer; | |
655 | /* local copy of current write rq */ | |
656 | struct request wrq; | |
657 | /* timeout value during long polls */ | |
658 | unsigned long poll_timeout; | |
659 | /* queried upon timeouts */ | |
660 | int (*expiry)(ide_drive_t *); | |
661 | /* ide_system_bus_speed */ | |
662 | int pio_clock; | |
23450319 SS |
663 | int req_gen; |
664 | int req_gen_timer; | |
1da177e4 LT |
665 | |
666 | unsigned char cmd_buf[4]; | |
667 | } ide_hwgroup_t; | |
668 | ||
7662d046 BZ |
669 | typedef struct ide_driver_s ide_driver_t; |
670 | ||
f9383c42 | 671 | extern struct mutex ide_setting_mtx; |
1da177e4 | 672 | |
7662d046 BZ |
673 | int set_io_32bit(ide_drive_t *, int); |
674 | int set_pio_mode(ide_drive_t *, int); | |
675 | int set_using_dma(ide_drive_t *, int); | |
676 | ||
677 | #ifdef CONFIG_IDE_PROC_FS | |
1da177e4 LT |
678 | /* |
679 | * configurable drive settings | |
680 | */ | |
681 | ||
682 | #define TYPE_INT 0 | |
1497943e BZ |
683 | #define TYPE_BYTE 1 |
684 | #define TYPE_SHORT 2 | |
1da177e4 LT |
685 | |
686 | #define SETTING_READ (1 << 0) | |
687 | #define SETTING_WRITE (1 << 1) | |
688 | #define SETTING_RW (SETTING_READ | SETTING_WRITE) | |
689 | ||
690 | typedef int (ide_procset_t)(ide_drive_t *, int); | |
691 | typedef struct ide_settings_s { | |
692 | char *name; | |
693 | int rw; | |
1da177e4 LT |
694 | int data_type; |
695 | int min; | |
696 | int max; | |
697 | int mul_factor; | |
698 | int div_factor; | |
699 | void *data; | |
700 | ide_procset_t *set; | |
701 | int auto_remove; | |
702 | struct ide_settings_s *next; | |
703 | } ide_settings_t; | |
704 | ||
1497943e | 705 | int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set); |
1da177e4 LT |
706 | |
707 | /* | |
708 | * /proc/ide interface | |
709 | */ | |
710 | typedef struct { | |
711 | const char *name; | |
712 | mode_t mode; | |
713 | read_proc_t *read_proc; | |
714 | write_proc_t *write_proc; | |
715 | } ide_proc_entry_t; | |
716 | ||
ecfd80e4 BZ |
717 | void proc_ide_create(void); |
718 | void proc_ide_destroy(void); | |
5cbf79cd BZ |
719 | void ide_proc_register_port(ide_hwif_t *); |
720 | void ide_proc_unregister_port(ide_hwif_t *); | |
7662d046 BZ |
721 | void ide_proc_register_driver(ide_drive_t *, ide_driver_t *); |
722 | void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *); | |
723 | ||
724 | void ide_add_generic_settings(ide_drive_t *); | |
725 | ||
1da177e4 LT |
726 | read_proc_t proc_ide_read_capacity; |
727 | read_proc_t proc_ide_read_geometry; | |
728 | ||
729 | #ifdef CONFIG_BLK_DEV_IDEPCI | |
730 | void ide_pci_create_host_proc(const char *, get_info_t *); | |
731 | #endif | |
732 | ||
733 | /* | |
734 | * Standard exit stuff: | |
735 | */ | |
736 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
737 | { \ | |
738 | len -= off; \ | |
739 | if (len < count) { \ | |
740 | *eof = 1; \ | |
741 | if (len <= 0) \ | |
742 | return 0; \ | |
743 | } else \ | |
744 | len = count; \ | |
745 | *start = page + off; \ | |
746 | return len; \ | |
747 | } | |
748 | #else | |
ecfd80e4 BZ |
749 | static inline void proc_ide_create(void) { ; } |
750 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd BZ |
751 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
752 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } | |
7662d046 BZ |
753 | static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } |
754 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; } | |
755 | static inline void ide_add_generic_settings(ide_drive_t *drive) { ; } | |
1da177e4 LT |
756 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
757 | #endif | |
758 | ||
759 | /* | |
760 | * Power Management step value (rq->pm->pm_step). | |
761 | * | |
762 | * The step value starts at 0 (ide_pm_state_start_suspend) for a | |
763 | * suspend operation or 1000 (ide_pm_state_start_resume) for a | |
764 | * resume operation. | |
765 | * | |
766 | * For each step, the core calls the subdriver start_power_step() first. | |
767 | * This can return: | |
768 | * - ide_stopped : In this case, the core calls us back again unless | |
769 | * step have been set to ide_power_state_completed. | |
770 | * - ide_started : In this case, the channel is left busy until an | |
771 | * async event (interrupt) occurs. | |
772 | * Typically, start_power_step() will issue a taskfile request with | |
773 | * do_rw_taskfile(). | |
774 | * | |
775 | * Upon reception of the interrupt, the core will call complete_power_step() | |
776 | * with the error code if any. This routine should update the step value | |
777 | * and return. It should not start a new request. The core will call | |
778 | * start_power_step for the new step value, unless step have been set to | |
779 | * ide_power_state_completed. | |
780 | * | |
781 | * Subdrivers are expected to define their own additional power | |
782 | * steps from 1..999 for suspend and from 1001..1999 for resume, | |
783 | * other values are reserved for future use. | |
784 | */ | |
785 | ||
786 | enum { | |
787 | ide_pm_state_completed = -1, | |
788 | ide_pm_state_start_suspend = 0, | |
789 | ide_pm_state_start_resume = 1000, | |
790 | }; | |
791 | ||
792 | /* | |
793 | * Subdrivers support. | |
4ef3b8f4 LR |
794 | * |
795 | * The gendriver.owner field should be set to the module owner of this driver. | |
796 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 797 | */ |
7662d046 | 798 | struct ide_driver_s { |
1da177e4 LT |
799 | const char *version; |
800 | u8 media; | |
1da177e4 | 801 | unsigned supports_dsc_overlap : 1; |
1da177e4 LT |
802 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
803 | int (*end_request)(ide_drive_t *, int, int); | |
804 | ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8); | |
805 | ide_startstop_t (*abort)(ide_drive_t *, struct request *rq); | |
1da177e4 | 806 | struct device_driver gen_driver; |
4031bbe4 RK |
807 | int (*probe)(ide_drive_t *); |
808 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 809 | void (*resume)(ide_drive_t *); |
4031bbe4 | 810 | void (*shutdown)(ide_drive_t *); |
7662d046 BZ |
811 | #ifdef CONFIG_IDE_PROC_FS |
812 | ide_proc_entry_t *proc; | |
813 | #endif | |
814 | }; | |
1da177e4 | 815 | |
4031bbe4 RK |
816 | #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver) |
817 | ||
1da177e4 LT |
818 | int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long); |
819 | ||
820 | /* | |
821 | * ide_hwifs[] is the master data structure used to keep track | |
822 | * of just about everything in ide.c. Whenever possible, routines | |
823 | * should be using pointers to a drive (ide_drive_t *) or | |
824 | * pointers to a hwif (ide_hwif_t *), rather than indexing this | |
825 | * structure directly (the allocation/layout may change!). | |
826 | * | |
827 | */ | |
828 | #ifndef _IDE_C | |
829 | extern ide_hwif_t ide_hwifs[]; /* master data repository */ | |
830 | #endif | |
831 | extern int noautodma; | |
832 | ||
833 | extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); | |
dbe217af AC |
834 | int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, |
835 | int uptodate, int nr_sectors); | |
1da177e4 | 836 | |
1da177e4 LT |
837 | extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); |
838 | ||
cd2a2d96 BZ |
839 | void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int, |
840 | ide_expiry_t *); | |
1da177e4 LT |
841 | |
842 | ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8); | |
843 | ||
1da177e4 LT |
844 | ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat); |
845 | ||
846 | ide_startstop_t __ide_abort(ide_drive_t *, struct request *); | |
847 | ||
1da177e4 LT |
848 | extern ide_startstop_t ide_abort(ide_drive_t *, const char *); |
849 | ||
850 | extern void ide_fix_driveid(struct hd_driveid *); | |
01745112 | 851 | |
1da177e4 LT |
852 | extern void ide_fixstring(u8 *, const int, const int); |
853 | ||
74af21cf | 854 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 855 | |
1da177e4 LT |
856 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
857 | ||
1da177e4 LT |
858 | extern void ide_init_drive_cmd (struct request *rq); |
859 | ||
1da177e4 LT |
860 | /* |
861 | * "action" parameter type for ide_do_drive_cmd() below. | |
862 | */ | |
863 | typedef enum { | |
864 | ide_wait, /* insert rq at end of list, and wait for it */ | |
1da177e4 LT |
865 | ide_preempt, /* insert rq in front of current request */ |
866 | ide_head_wait, /* insert rq in front of current request and wait for it */ | |
867 | ide_end /* insert rq at end of list, but don't wait for it */ | |
868 | } ide_action_t; | |
869 | ||
1da177e4 LT |
870 | extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); |
871 | ||
1da177e4 LT |
872 | extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); |
873 | ||
874 | /* | |
875 | * Issue ATA command and wait for completion. | |
876 | * Use for implementing commands in kernel | |
877 | * | |
878 | * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf) | |
879 | */ | |
880 | extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *); | |
881 | ||
9e42237f BZ |
882 | enum { |
883 | IDE_TFLAG_LBA48 = (1 << 0), | |
884 | IDE_TFLAG_NO_SELECT_MASK = (1 << 1), | |
74095a91 BZ |
885 | IDE_TFLAG_FLAGGED = (1 << 2), |
886 | IDE_TFLAG_OUT_DATA = (1 << 3), | |
887 | IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4), | |
888 | IDE_TFLAG_OUT_HOB_NSECT = (1 << 5), | |
889 | IDE_TFLAG_OUT_HOB_LBAL = (1 << 6), | |
890 | IDE_TFLAG_OUT_HOB_LBAM = (1 << 7), | |
891 | IDE_TFLAG_OUT_HOB_LBAH = (1 << 8), | |
892 | IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE | | |
893 | IDE_TFLAG_OUT_HOB_NSECT | | |
894 | IDE_TFLAG_OUT_HOB_LBAL | | |
895 | IDE_TFLAG_OUT_HOB_LBAM | | |
896 | IDE_TFLAG_OUT_HOB_LBAH, | |
897 | IDE_TFLAG_OUT_FEATURE = (1 << 9), | |
898 | IDE_TFLAG_OUT_NSECT = (1 << 10), | |
899 | IDE_TFLAG_OUT_LBAL = (1 << 11), | |
900 | IDE_TFLAG_OUT_LBAM = (1 << 12), | |
901 | IDE_TFLAG_OUT_LBAH = (1 << 13), | |
902 | IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE | | |
903 | IDE_TFLAG_OUT_NSECT | | |
904 | IDE_TFLAG_OUT_LBAL | | |
905 | IDE_TFLAG_OUT_LBAM | | |
906 | IDE_TFLAG_OUT_LBAH, | |
807e35d6 | 907 | IDE_TFLAG_OUT_DEVICE = (1 << 14), |
ac026ff2 | 908 | IDE_TFLAG_WRITE = (1 << 15), |
866e2ec9 BZ |
909 | IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16), |
910 | IDE_TFLAG_IN_DATA = (1 << 17), | |
57d7366b | 911 | IDE_TFLAG_CUSTOM_HANDLER = (1 << 18), |
f6e29e35 | 912 | IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19), |
c2b57cdc BZ |
913 | IDE_TFLAG_IN_HOB_FEATURE = (1 << 20), |
914 | IDE_TFLAG_IN_HOB_NSECT = (1 << 21), | |
915 | IDE_TFLAG_IN_HOB_LBAL = (1 << 22), | |
916 | IDE_TFLAG_IN_HOB_LBAM = (1 << 23), | |
917 | IDE_TFLAG_IN_HOB_LBAH = (1 << 24), | |
918 | IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL | | |
919 | IDE_TFLAG_IN_HOB_LBAM | | |
920 | IDE_TFLAG_IN_HOB_LBAH, | |
921 | IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE | | |
922 | IDE_TFLAG_IN_HOB_NSECT | | |
923 | IDE_TFLAG_IN_HOB_LBA, | |
924 | IDE_TFLAG_IN_NSECT = (1 << 25), | |
925 | IDE_TFLAG_IN_LBAL = (1 << 26), | |
926 | IDE_TFLAG_IN_LBAM = (1 << 27), | |
927 | IDE_TFLAG_IN_LBAH = (1 << 28), | |
928 | IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL | | |
929 | IDE_TFLAG_IN_LBAM | | |
930 | IDE_TFLAG_IN_LBAH, | |
931 | IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT | | |
932 | IDE_TFLAG_IN_LBA, | |
933 | IDE_TFLAG_IN_DEVICE = (1 << 29), | |
9e42237f BZ |
934 | }; |
935 | ||
650d841d BZ |
936 | struct ide_taskfile { |
937 | u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ | |
938 | ||
939 | u8 hob_feature; /* 1-5: additional data to support LBA48 */ | |
940 | u8 hob_nsect; | |
941 | u8 hob_lbal; | |
942 | u8 hob_lbam; | |
943 | u8 hob_lbah; | |
944 | ||
945 | u8 data; /* 6: low data byte (for TASKFILE IOCTL) */ | |
946 | ||
947 | union { /* Â 7: */ | |
948 | u8 error; /* read: error */ | |
949 | u8 feature; /* write: feature */ | |
950 | }; | |
951 | ||
952 | u8 nsect; /* 8: number of sectors */ | |
953 | u8 lbal; /* 9: LBA low */ | |
954 | u8 lbam; /* 10: LBA mid */ | |
955 | u8 lbah; /* 11: LBA high */ | |
956 | ||
957 | u8 device; /* 12: device select */ | |
958 | ||
959 | union { /* 13: */ | |
960 | u8 status; /*  read: status  */ | |
961 | u8 command; /* write: command */ | |
962 | }; | |
963 | }; | |
964 | ||
1da177e4 | 965 | typedef struct ide_task_s { |
650d841d BZ |
966 | union { |
967 | struct ide_taskfile tf; | |
968 | u8 tf_array[14]; | |
969 | }; | |
866e2ec9 | 970 | u32 tf_flags; |
1da177e4 | 971 | int data_phase; |
1da177e4 LT |
972 | struct request *rq; /* copy of request */ |
973 | void *special; /* valid_t generally */ | |
974 | } ide_task_t; | |
975 | ||
9e42237f | 976 | void ide_tf_load(ide_drive_t *, ide_task_t *); |
c2b57cdc | 977 | void ide_tf_read(ide_drive_t *, ide_task_t *); |
1da177e4 LT |
978 | |
979 | extern void SELECT_DRIVE(ide_drive_t *); | |
1da177e4 | 980 | extern void SELECT_MASK(ide_drive_t *, int); |
1da177e4 LT |
981 | |
982 | extern int drive_is_ready(ide_drive_t *); | |
1da177e4 | 983 | |
2fc57388 BZ |
984 | void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8); |
985 | ||
f6e29e35 | 986 | ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); |
1da177e4 | 987 | |
ac026ff2 | 988 | int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16); |
9a3c49be BZ |
989 | int ide_no_data_taskfile(ide_drive_t *, ide_task_t *); |
990 | ||
1da177e4 LT |
991 | int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); |
992 | int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
993 | int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long); | |
994 | ||
995 | extern int system_bus_clock(void); | |
996 | ||
997 | extern int ide_driveid_update(ide_drive_t *); | |
998 | extern int ide_ata66_check(ide_drive_t *, ide_task_t *); | |
999 | extern int ide_config_drive_speed(ide_drive_t *, u8); | |
1000 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1001 | extern int set_transfer(ide_drive_t *, ide_task_t *); | |
1002 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); | |
1003 | ||
1004 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1005 | ||
1da177e4 LT |
1006 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
1007 | ||
1008 | extern int ide_spin_wait_hwgroup(ide_drive_t *); | |
1009 | extern void ide_timer_expiry(unsigned long); | |
7d12e780 | 1010 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1011 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1012 | |
1013 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1014 | ||
1da177e4 LT |
1015 | extern int ideprobe_init(void); |
1016 | ||
6d208b39 | 1017 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
1da177e4 | 1018 | extern void ide_scan_pcibus(int scan_direction) __init; |
725522b5 GKH |
1019 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1020 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1021 | #else |
1022 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1023 | #endif | |
1024 | ||
85620436 BZ |
1025 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *); |
1026 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); | |
1da177e4 LT |
1027 | |
1028 | extern void default_hwif_iops(ide_hwif_t *); | |
1029 | extern void default_hwif_mmiops(ide_hwif_t *); | |
1030 | extern void default_hwif_transport(ide_hwif_t *); | |
1031 | ||
1da177e4 LT |
1032 | typedef struct ide_pci_enablebit_s { |
1033 | u8 reg; /* byte pci reg holding the enable-bit */ | |
1034 | u8 mask; /* mask to isolate the enable-bit */ | |
1035 | u8 val; /* value of masked reg when "enabled" */ | |
1036 | } ide_pci_enablebit_t; | |
1037 | ||
1038 | enum { | |
1039 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1040 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1041 | /* single port device */ |
a5d8c5c8 | 1042 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1043 | /* don't use legacy PIO blacklist */ |
1044 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
1045 | /* don't use conservative PIO "downgrade" */ | |
1046 | IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3), | |
26bcb879 BZ |
1047 | /* use PIO8/9 for prefetch off/on */ |
1048 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1049 | /* use PIO6/7 for fast-devsel off/on */ | |
1050 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1051 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1052 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1053 | /* |
1054 | * keep DMA setting when programming PIO mode, may be used only | |
1055 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1056 | */ | |
1057 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1058 | /* program host for the transfer mode after programming device */ |
1059 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1060 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1061 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1062 | /* trust BIOS for programming chipset/device for DMA */ |
1063 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
1064 | /* host uses VDMA */ | |
1065 | IDE_HFLAG_VDMA = (1 << 11), | |
33c1002e BZ |
1066 | /* ATAPI DMA is unsupported */ |
1067 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
7cab14a7 BZ |
1068 | /* set if host is a "bootable" controller */ |
1069 | IDE_HFLAG_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1070 | /* host doesn't support DMA */ |
1071 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1072 | /* check if host is PCI IDE device before allowing DMA */ | |
1073 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
9ffcf364 BZ |
1074 | /* host is CS5510/CS5520 */ |
1075 | IDE_HFLAG_CS5520 = (1 << 16), | |
238e4f14 BZ |
1076 | /* no LBA48 */ |
1077 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1078 | /* no LBA48 DMA */ | |
1079 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1080 | /* data FIFO is cleared by an error */ |
1081 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1082 | /* serialize ports */ |
1083 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
3985ee3b BZ |
1084 | /* use legacy IRQs */ |
1085 | IDE_HFLAG_LEGACY_IRQS = (1 << 21), | |
8acf28c0 BZ |
1086 | /* force use of legacy IRQs */ |
1087 | IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), | |
272a3709 BZ |
1088 | /* limit LBA48 requests to 256 sectors */ |
1089 | IDE_HFLAG_RQSIZE_256 = (1 << 23), | |
caea7602 BZ |
1090 | /* use 32-bit I/O ops */ |
1091 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1092 | /* unmask IRQs */ | |
1093 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
4db90a14 | 1094 | IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26), |
8704de8f BZ |
1095 | /* host is CY82C693 */ |
1096 | IDE_HFLAG_CY82C693 = (1 << 27), | |
1da177e4 LT |
1097 | }; |
1098 | ||
7cab14a7 BZ |
1099 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
1100 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE | |
1101 | #else | |
1102 | # define IDE_HFLAG_OFF_BOARD 0 | |
1103 | #endif | |
1104 | ||
039788e1 | 1105 | struct ide_port_info { |
1da177e4 | 1106 | char *name; |
1da177e4 LT |
1107 | unsigned int (*init_chipset)(struct pci_dev *, const char *); |
1108 | void (*init_iops)(ide_hwif_t *); | |
1109 | void (*init_hwif)(ide_hwif_t *); | |
1110 | void (*init_dma)(ide_hwif_t *, unsigned long); | |
1111 | void (*fixup)(ide_hwif_t *); | |
1da177e4 | 1112 | ide_pci_enablebit_t enablebits[2]; |
528a572d | 1113 | hwif_chipset_t chipset; |
3071a9d0 | 1114 | u8 extra; |
9ffcf364 | 1115 | u32 host_flags; |
4099d143 | 1116 | u8 pio_mask; |
5f8b6c34 BZ |
1117 | u8 swdma_mask; |
1118 | u8 mwdma_mask; | |
18137207 | 1119 | u8 udma_mask; |
039788e1 | 1120 | }; |
1da177e4 | 1121 | |
85620436 BZ |
1122 | int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *); |
1123 | int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *); | |
1da177e4 LT |
1124 | |
1125 | void ide_map_sg(ide_drive_t *, struct request *); | |
1126 | void ide_init_sg_cmd(ide_drive_t *, struct request *); | |
1127 | ||
1128 | #define BAD_DMA_DRIVE 0 | |
1129 | #define GOOD_DMA_DRIVE 1 | |
1130 | ||
65e5f2e3 JC |
1131 | struct drive_list_entry { |
1132 | const char *id_model; | |
1133 | const char *id_firmware; | |
1134 | }; | |
1135 | ||
1136 | int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *); | |
a5b7e70d BZ |
1137 | |
1138 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
1da177e4 | 1139 | int __ide_dma_bad_drive(ide_drive_t *); |
3ab7efe8 | 1140 | int ide_id_dma_bug(ide_drive_t *); |
7670df73 BZ |
1141 | |
1142 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1143 | ||
1144 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1145 | { | |
1146 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1147 | } | |
1148 | ||
4a546e04 | 1149 | void ide_dma_off_quietly(ide_drive_t *); |
7469aaf6 | 1150 | void ide_dma_off(ide_drive_t *); |
4a546e04 | 1151 | void ide_dma_on(ide_drive_t *); |
3608b5d7 | 1152 | int ide_set_dma(ide_drive_t *); |
1da177e4 LT |
1153 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1154 | ||
1155 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
1156 | extern int ide_build_sglist(ide_drive_t *, struct request *); | |
1157 | extern int ide_build_dmatable(ide_drive_t *, struct request *); | |
1158 | extern void ide_destroy_dmatable(ide_drive_t *); | |
1159 | extern int ide_release_dma(ide_hwif_t *); | |
1160 | extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int); | |
1161 | ||
15ce926a | 1162 | void ide_dma_host_set(ide_drive_t *, int); |
1da177e4 LT |
1163 | extern int ide_dma_setup(ide_drive_t *); |
1164 | extern void ide_dma_start(ide_drive_t *); | |
1165 | extern int __ide_dma_end(ide_drive_t *); | |
841d2a9b | 1166 | extern void ide_dma_lost_irq(ide_drive_t *); |
c283f5db | 1167 | extern void ide_dma_timeout(ide_drive_t *); |
1da177e4 LT |
1168 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ |
1169 | ||
1170 | #else | |
3ab7efe8 | 1171 | static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } |
7670df73 | 1172 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1173 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
4a546e04 | 1174 | static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } |
7469aaf6 | 1175 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
4a546e04 | 1176 | static inline void ide_dma_on(ide_drive_t *drive) { ; } |
1da177e4 | 1177 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1178 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
1da177e4 LT |
1179 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1180 | ||
1181 | #ifndef CONFIG_BLK_DEV_IDEDMA_PCI | |
1182 | static inline void ide_release_dma(ide_hwif_t *drive) {;} | |
1183 | #endif | |
1184 | ||
e3a59b4d HR |
1185 | #ifdef CONFIG_BLK_DEV_IDEACPI |
1186 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); | |
1187 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1188 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
1189 | extern void ide_acpi_init(ide_hwif_t *hwif); | |
5e32132b | 1190 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d HR |
1191 | #else |
1192 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } | |
1193 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1194 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
1195 | static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } | |
5e32132b | 1196 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1197 | #endif |
1198 | ||
1da177e4 LT |
1199 | extern int ide_hwif_request_regions(ide_hwif_t *hwif); |
1200 | extern void ide_hwif_release_regions(ide_hwif_t* hwif); | |
1201 | extern void ide_unregister (unsigned int index); | |
1202 | ||
1203 | void ide_register_region(struct gendisk *); | |
1204 | void ide_unregister_region(struct gendisk *); | |
1205 | ||
1206 | void ide_undecoded_slave(ide_hwif_t *); | |
1207 | ||
8447d9d5 | 1208 | int ide_device_add(u8 idx[4]); |
1da177e4 LT |
1209 | |
1210 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1211 | { | |
1212 | return hwif->hwif_data; | |
1213 | } | |
1214 | ||
1215 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1216 | { | |
1217 | hwif->hwif_data = data; | |
1218 | } | |
1219 | ||
3ab7efe8 | 1220 | const char *ide_xfer_verbose(u8 mode); |
1da177e4 LT |
1221 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); |
1222 | extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); | |
1223 | ||
2229833c BZ |
1224 | static inline int ide_dev_has_iordy(struct hd_driveid *id) |
1225 | { | |
1226 | return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0; | |
1227 | } | |
1228 | ||
6c3c22f3 SS |
1229 | static inline int ide_dev_is_sata(struct hd_driveid *id) |
1230 | { | |
1231 | /* | |
1232 | * See if word 93 is 0 AND drive is at least ATA-5 compatible | |
1233 | * verifying that word 80 by casting it to a signed type -- | |
1234 | * this trick allows us to filter out the reserved values of | |
1235 | * 0x0000 and 0xffff along with the earlier ATA revisions... | |
1236 | */ | |
1237 | if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020) | |
1238 | return 1; | |
1239 | return 0; | |
1240 | } | |
1241 | ||
a501633c | 1242 | u64 ide_get_lba_addr(struct ide_taskfile *, int); |
1da177e4 LT |
1243 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1244 | ||
1245 | typedef struct ide_pio_timings_s { | |
1246 | int setup_time; /* Address setup (ns) minimum */ | |
1247 | int active_time; /* Active pulse (ns) minimum */ | |
81d368e0 SS |
1248 | int cycle_time; /* Cycle time (ns) minimum = */ |
1249 | /* active + recovery (+ setup for some chips) */ | |
1da177e4 LT |
1250 | } ide_pio_timings_t; |
1251 | ||
7dd00083 | 1252 | unsigned int ide_pio_cycle_time(ide_drive_t *, u8); |
2134758d | 1253 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
1da177e4 LT |
1254 | extern const ide_pio_timings_t ide_pio_timings[6]; |
1255 | ||
88b2b32b BZ |
1256 | int ide_set_pio_mode(ide_drive_t *, u8); |
1257 | int ide_set_dma_mode(ide_drive_t *, u8); | |
1258 | ||
26bcb879 BZ |
1259 | void ide_set_pio(ide_drive_t *, u8); |
1260 | ||
1261 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1262 | { | |
1263 | ide_set_pio(drive, 255); | |
1264 | } | |
1da177e4 LT |
1265 | |
1266 | extern spinlock_t ide_lock; | |
ef29888e | 1267 | extern struct mutex ide_cfg_mtx; |
1da177e4 LT |
1268 | /* |
1269 | * Structure locking: | |
1270 | * | |
ef29888e | 1271 | * ide_cfg_mtx and ide_lock together protect changes to |
1da177e4 LT |
1272 | * ide_hwif_t->{next,hwgroup} |
1273 | * ide_drive_t->next | |
1274 | * | |
1275 | * ide_hwgroup_t->busy: ide_lock | |
1276 | * ide_hwgroup_t->hwif: ide_lock | |
1277 | * ide_hwif_t->mate: constant, no locking | |
1278 | * ide_drive_t->hwif: constant, no locking | |
1279 | */ | |
1280 | ||
366c7f55 | 1281 | #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0) |
1da177e4 LT |
1282 | |
1283 | extern struct bus_type ide_bus_type; | |
1284 | ||
1285 | /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */ | |
1286 | #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000) | |
1287 | ||
1288 | /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */ | |
1289 | #define ide_id_has_flush_cache_ext(id) \ | |
1290 | (((id)->cfs_enable_2 & 0x2400) == 0x2400) | |
1291 | ||
86b37860 CL |
1292 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1293 | { | |
1294 | struct pci_dev *dev = hwif->pci_dev; | |
1295 | return dev ? pcibus_to_node(dev->bus) : -1; | |
1296 | } | |
1297 | ||
1b678347 BH |
1298 | static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive) |
1299 | { | |
1300 | ide_hwif_t *hwif = HWIF(drive); | |
1301 | ||
1302 | return &hwif->drives[(drive->dn ^ 1) & 1]; | |
1303 | } | |
1304 | ||
1da177e4 | 1305 | #endif /* _IDE_H */ |