ide: remove [ata_]select_t
[deliverable/linux.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
729d4de9 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
35/*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40#define IDE_NO_IRQ (-1)
41
1da177e4
LT
42typedef unsigned char byte; /* used everywhere */
43
44/*
45 * Probably not wise to fiddle with these
46 */
47#define ERROR_MAX 8 /* Max read/write errors per sector */
48#define ERROR_RESET 3 /* Reset controller every 4th retry */
49#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
1da177e4
LT
51#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
52#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
53
54/*
55 * Definitions for accessing IDE controller registers
56 */
57#define IDE_NR_PORTS (10)
58
4c3032d8
BZ
59struct ide_io_ports {
60 unsigned long data_addr;
61
62 union {
63 unsigned long error_addr; /* read: error */
64 unsigned long feature_addr; /* write: feature */
65 };
66
67 unsigned long nsect_addr;
68 unsigned long lbal_addr;
69 unsigned long lbam_addr;
70 unsigned long lbah_addr;
71
72 unsigned long device_addr;
73
74 union {
75 unsigned long status_addr; /*  read: status  */
76 unsigned long command_addr; /* write: command */
77 };
78
79 unsigned long ctl_addr;
80
81 unsigned long irq_addr;
82};
1da177e4
LT
83
84#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 85
3a7d2484
BZ
86#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
87#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
88#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
89#define DRIVE_READY (ATA_DRDY | ATA_DSC)
90
91#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
92
93#define SATA_NR_PORTS (3) /* 16 possible ?? */
94
95#define SATA_STATUS_OFFSET (0)
1da177e4 96#define SATA_ERROR_OFFSET (1)
1da177e4 97#define SATA_CONTROL_OFFSET (2)
1da177e4 98
1da177e4
LT
99/*
100 * Our Physical Region Descriptor (PRD) table should be large enough
101 * to handle the biggest I/O request we are likely to see. Since requests
102 * can have no more than 256 sectors, and since the typical blocksize is
103 * two or more sectors, we could get by with a limit of 128 entries here for
104 * the usual worst case. Most requests seem to include some contiguous blocks,
105 * further reducing the number of table entries required.
106 *
107 * The driver reverts to PIO mode for individual requests that exceed
108 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
109 * 100% of all crazy scenarios here is not necessary.
110 *
111 * As it turns out though, we must allocate a full 4KB page for this,
112 * so the two PRD tables (ide0 & ide1) will each get half of that,
113 * allowing each to have about 256 entries (8 bytes each) from this.
114 */
115#define PRD_BYTES 8
116#define PRD_ENTRIES 256
117
118/*
119 * Some more useful definitions
120 */
121#define PARTN_BITS 6 /* number of minor dev bits for partitions */
122#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
123#define SECTOR_SIZE 512
151a6701 124
1da177e4
LT
125#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
126
127/*
128 * Timeouts for various operations:
129 */
d6e2955a
BZ
130enum {
131 /* spec allows up to 20ms */
132 WAIT_DRQ = HZ / 10, /* 100ms */
133 /* some laptops are very slow */
134 WAIT_READY = 5 * HZ, /* 5s */
135 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
136 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
137 /* worst case when spinning up */
138 WAIT_WORSTCASE = 30 * HZ, /* 30s */
139 /* maximum wait for an IRQ to happen */
140 WAIT_CMD = 10 * HZ, /* 10s */
141 /* Some drives require a longer IRQ timeout. */
142 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
143 /*
144 * Some drives (for example, Seagate STT3401A Travan) require a very
145 * long timeout, because they don't return an interrupt or clear their
146 * BSY bit until after the command completes (even retension commands).
147 */
148 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
149 /* minimum sleep time */
150 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
151};
1da177e4 152
79e36a9f
EO
153/*
154 * Op codes for special requests to be handled by ide_special_rq().
155 * Values should be in the range of 0x20 to 0x3f.
156 */
157#define REQ_DRIVE_RESET 0x20
92f1f8fd 158#define REQ_DEVSET_EXEC 0x21
79e36a9f 159
1da177e4
LT
160/*
161 * Check for an interrupt and acknowledge the interrupt status
162 */
163struct hwif_s;
164typedef int (ide_ack_intr_t)(struct hwif_s *);
165
1da177e4
LT
166/*
167 * hwif_chipset_t is used to keep track of the specific hardware
168 * chipset used by each IDE interface, if known.
169 */
528a572d 170enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
171 ide_cmd640, ide_dtc2278, ide_ali14xx,
172 ide_qd65xx, ide_umc8672, ide_ht6560b,
173 ide_rz1000, ide_trm290,
174 ide_cmd646, ide_cy82c693, ide_4drives,
b7691646 175 ide_pmac, ide_acorn,
9a0e77f2 176 ide_au1xxx, ide_palm3710
528a572d
BZ
177};
178
179typedef u8 hwif_chipset_t;
1da177e4
LT
180
181/*
182 * Structure to hold all information about the location of this port
183 */
184typedef struct hw_regs_s {
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BZ
185 union {
186 struct ide_io_ports io_ports;
187 unsigned long io_ports_array[IDE_NR_PORTS];
188 };
189
1da177e4 190 int irq; /* our irq number */
1da177e4
LT
191 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
192 hwif_chipset_t chipset;
c56c5648 193 struct device *dev, *parent;
d6276b5f 194 unsigned long config;
1da177e4
LT
195} hw_regs_t;
196
cbb010c1 197void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 198void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 199
1da177e4
LT
200static inline void ide_std_init_ports(hw_regs_t *hw,
201 unsigned long io_addr,
202 unsigned long ctl_addr)
203{
204 unsigned int i;
205
4c3032d8
BZ
206 for (i = 0; i <= 7; i++)
207 hw->io_ports_array[i] = io_addr++;
1da177e4 208
4c3032d8 209 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
210}
211
a861beb1
BZ
212/* for IDE PCI controllers in legacy mode, temporary */
213static inline int __ide_default_irq(unsigned long base)
214{
215 switch (base) {
216#ifdef CONFIG_IA64
217 case 0x1f0: return isa_irq_to_vector(14);
218 case 0x170: return isa_irq_to_vector(15);
219#else
220 case 0x1f0: return 14;
221 case 0x170: return 15;
222#endif
223 }
224 return 0;
225}
226
2a8f7450
BZ
227#if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \
228 defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \
229 || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64)
1da177e4 230#include <asm/ide.h>
2a8f7450
BZ
231#else
232#include <asm-generic/ide_iops.h>
233#endif
1da177e4 234
c5bfc375 235#define MAX_HWIFS 10
83ae20c8 236
1da177e4
LT
237/* Currently only m68k, apus and m8xx need it */
238#ifndef IDE_ARCH_ACK_INTR
239# define ide_ack_intr(hwif) (1)
240#endif
241
242/* Currently only Atari needs it */
243#ifndef IDE_ARCH_LOCK
244# define ide_release_lock() do {} while (0)
245# define ide_get_lock(hdlr, data) do {} while (0)
246#endif /* IDE_ARCH_LOCK */
247
248/*
249 * Now for the data we need to maintain per-drive: ide_drive_t
250 */
251
252#define ide_scsi 0x21
253#define ide_disk 0x20
254#define ide_optical 0x7
255#define ide_cdrom 0x5
256#define ide_tape 0x1
257#define ide_floppy 0x0
258
259/*
260 * Special Driver Flags
261 *
262 * set_geometry : respecify drive geometry
263 * recalibrate : seek to cyl 0
264 * set_multmode : set multmode count
265 * set_tune : tune interface for drive
266 * serviced : service command
267 * reserved : unused
268 */
269typedef union {
270 unsigned all : 8;
271 struct {
1da177e4
LT
272 unsigned set_geometry : 1;
273 unsigned recalibrate : 1;
274 unsigned set_multmode : 1;
275 unsigned set_tune : 1;
276 unsigned serviced : 1;
277 unsigned reserved : 3;
1da177e4
LT
278 } b;
279} special_t;
280
1da177e4
LT
281/*
282 * Status returned from various ide_ functions
283 */
284typedef enum {
285 ide_stopped, /* no drive operation was started */
286 ide_started, /* a drive operation was started, handler was set */
287} ide_startstop_t;
288
67c56364
BZ
289/* ATAPI packet command flags */
290enum {
291 /* set when an error is considered normal - no retry (ide-tape) */
292 PC_FLAG_ABORT = (1 << 0),
293 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
294 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
295 PC_FLAG_DMA_OK = (1 << 3),
296 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
297 PC_FLAG_DMA_ERROR = (1 << 5),
298 PC_FLAG_WRITING = (1 << 6),
299 /* command timed out */
300 PC_FLAG_TIMEDOUT = (1 << 7),
301};
302
303/*
304 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
305 * This is used for several packet commands (not for READ/WRITE commands).
306 */
307#define IDE_PC_BUFFER_SIZE 256
308
309struct ide_atapi_pc {
310 /* actual packet bytes */
311 u8 c[12];
312 /* incremented on each retry */
313 int retries;
314 int error;
315
316 /* bytes to transfer */
317 int req_xfer;
318 /* bytes actually transferred */
319 int xferred;
320
321 /* data buffer */
322 u8 *buf;
323 /* current buffer position */
324 u8 *cur_pos;
325 int buf_size;
326 /* missing/available data on the current buffer */
327 int b_count;
328
329 /* the corresponding request */
330 struct request *rq;
331
332 unsigned long flags;
333
334 /*
335 * those are more or less driver-specific and some of them are subject
336 * to change/removal later.
337 */
338 u8 pc_buf[IDE_PC_BUFFER_SIZE];
339
340 /* idetape only */
341 struct idetape_bh *bh;
342 char *b_data;
343
344 /* idescsi only for now */
345 struct scatterlist *sg;
346 unsigned int sg_cnt;
347
348 struct scsi_cmnd *scsi_cmd;
349 void (*done) (struct scsi_cmnd *);
350
351 unsigned long timeout;
352};
353
8185d5aa 354struct ide_devset;
1da177e4 355struct ide_driver_s;
1da177e4 356
e3a59b4d
HR
357#ifdef CONFIG_BLK_DEV_IDEACPI
358struct ide_acpi_drive_link;
359struct ide_acpi_hwif_link;
360#endif
361
3b8ac539
BP
362/* ATAPI device flags */
363enum {
364 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
365 IDE_AFLAG_MEDIA_CHANGED = (1 << 1),
3b8ac539
BP
366 /* Drive cannot lock the door. */
367 IDE_AFLAG_NO_DOORLOCK = (1 << 2),
0578042d
BZ
368
369 /* ide-cd */
3b8ac539
BP
370 /* Drive cannot eject the disc. */
371 IDE_AFLAG_NO_EJECT = (1 << 3),
372 /* Drive is a pre ATAPI 1.2 drive. */
373 IDE_AFLAG_PRE_ATAPI12 = (1 << 4),
374 /* TOC addresses are in BCD. */
375 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 5),
376 /* TOC track numbers are in BCD. */
377 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 6),
378 /*
379 * Drive does not provide data in multiples of SECTOR_SIZE
380 * when more than one interrupt is needed.
381 */
382 IDE_AFLAG_LIMIT_NFRAMES = (1 << 7),
383 /* Seeking in progress. */
384 IDE_AFLAG_SEEKING = (1 << 8),
385 /* Saved TOC information is current. */
386 IDE_AFLAG_TOC_VALID = (1 << 9),
387 /* We think that the drive door is locked. */
388 IDE_AFLAG_DOOR_LOCKED = (1 << 10),
389 /* SET_CD_SPEED command is unsupported. */
390 IDE_AFLAG_NO_SPEED_SELECT = (1 << 11),
391 IDE_AFLAG_VERTOS_300_SSD = (1 << 12),
392 IDE_AFLAG_VERTOS_600_ESD = (1 << 13),
393 IDE_AFLAG_SANYO_3CD = (1 << 14),
394 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 15),
395 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 16),
396 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17),
397
398 /* ide-floppy */
399 /* Format in progress */
400 IDE_AFLAG_FORMAT_IN_PROGRESS = (1 << 18),
401 /* Avoid commands not supported in Clik drive */
402 IDE_AFLAG_CLIK_DRIVE = (1 << 19),
403 /* Requires BH algorithm for packets */
404 IDE_AFLAG_ZIP_DRIVE = (1 << 20),
49cac39e
BZ
405 /* Write protect */
406 IDE_AFLAG_WP = (1 << 21),
407 /* Supports format progress report */
408 IDE_AFLAG_SRFP = (1 << 22),
3b8ac539
BP
409
410 /* ide-tape */
49cac39e 411 IDE_AFLAG_IGNORE_DSC = (1 << 23),
3b8ac539 412 /* 0 When the tape position is unknown */
49cac39e 413 IDE_AFLAG_ADDRESS_VALID = (1 << 24),
3b8ac539 414 /* Device already opened */
49cac39e 415 IDE_AFLAG_BUSY = (1 << 25),
3b8ac539 416 /* Attempt to auto-detect the current user block size */
49cac39e 417 IDE_AFLAG_DETECT_BS = (1 << 26),
3b8ac539 418 /* Currently on a filemark */
49cac39e 419 IDE_AFLAG_FILEMARK = (1 << 27),
3b8ac539 420 /* 0 = no tape is loaded, so we don't rewind after ejecting */
49cac39e 421 IDE_AFLAG_MEDIUM_PRESENT = (1 << 28),
f20f2586 422
49cac39e 423 IDE_AFLAG_NO_AUTOCLOSE = (1 << 29),
3b8ac539
BP
424};
425
97100fc8
BZ
426/* device flags */
427enum {
428 /* restore settings after device reset */
429 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
430 /* device is using DMA for read/write */
431 IDE_DFLAG_USING_DMA = (1 << 1),
432 /* okay to unmask other IRQs */
433 IDE_DFLAG_UNMASK = (1 << 2),
434 /* don't attempt flushes */
435 IDE_DFLAG_NOFLUSH = (1 << 3),
436 /* DSC overlap */
437 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
438 /* give potential excess bandwidth */
439 IDE_DFLAG_NICE1 = (1 << 5),
440 /* device is physically present */
441 IDE_DFLAG_PRESENT = (1 << 6),
442 /* device ejected hint */
443 IDE_DFLAG_DEAD = (1 << 7),
444 /* id read from device (synthetic if not set) */
445 IDE_DFLAG_ID_READ = (1 << 8),
446 IDE_DFLAG_NOPROBE = (1 << 9),
447 /* need to do check_media_change() */
448 IDE_DFLAG_REMOVABLE = (1 << 10),
449 /* needed for removable devices */
450 IDE_DFLAG_ATTACH = (1 << 11),
451 IDE_DFLAG_FORCED_GEOM = (1 << 12),
452 /* disallow setting unmask bit */
453 IDE_DFLAG_NO_UNMASK = (1 << 13),
454 /* disallow enabling 32-bit I/O */
455 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
456 /* for removable only: door lock/unlock works */
457 IDE_DFLAG_DOORLOCKING = (1 << 15),
458 /* disallow DMA */
459 IDE_DFLAG_NODMA = (1 << 16),
460 /* powermanagment told us not to do anything, so sleep nicely */
461 IDE_DFLAG_BLOCKED = (1 << 17),
462 /* ide-scsi emulation */
463 IDE_DFLAG_SCSI = (1 << 18),
464 /* sleeping & sleep field valid */
465 IDE_DFLAG_SLEEPING = (1 << 19),
466 IDE_DFLAG_POST_RESET = (1 << 20),
467 IDE_DFLAG_UDMA33_WARNED = (1 << 21),
468 IDE_DFLAG_LBA48 = (1 << 22),
469 /* status of write cache */
470 IDE_DFLAG_WCACHE = (1 << 23),
471 /* used for ignoring ATA_DF */
472 IDE_DFLAG_NOWERR = (1 << 24),
c3922048
BZ
473 /* retrying in PIO */
474 IDE_DFLAG_DMA_PIO_RETRY = (1 << 25),
d1d76714 475 IDE_DFLAG_LBA = (1 << 26),
97100fc8
BZ
476};
477
d7c26ebb 478struct ide_drive_s {
1da177e4
LT
479 char name[4]; /* drive name, such as "hda" */
480 char driver_req[10]; /* requests specific driver */
481
165125e1 482 struct request_queue *queue; /* request queue */
1da177e4
LT
483
484 struct request *rq; /* current request */
485 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4 486 void *driver_data; /* extra driver data */
48fb2688 487 u16 *id; /* identification info */
7662d046 488#ifdef CONFIG_IDE_PROC_FS
1da177e4 489 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 490 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 491#endif
1da177e4
LT
492 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
493
97100fc8
BZ
494 unsigned long dev_flags;
495
1da177e4
LT
496 unsigned long sleep; /* sleep until this time */
497 unsigned long service_start; /* time we started last request */
498 unsigned long service_time; /* service time of last request */
499 unsigned long timeout; /* max time to wait for irq */
500
501 special_t special; /* special action flags */
1da177e4 502
7f612f27 503 u8 select; /* basic drive/head select reg value */
1da177e4 504 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 505 u8 waiting_for_dma; /* dma currently in progress */
1da177e4 506
1da177e4
LT
507 u8 quirk_list; /* considered quirky, set for a specific host */
508 u8 init_speed; /* transfer rate set at boot */
1da177e4 509 u8 current_speed; /* current transfer rate set */
513daadd 510 u8 desired_speed; /* desired transfer rate set */
1da177e4 511 u8 dn; /* now wide spread use */
1da177e4
LT
512 u8 acoustic; /* acoustic management */
513 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
514 u8 ready_stat; /* min status value for drive ready */
515 u8 mult_count; /* current multiple sector setting */
516 u8 mult_req; /* requested multiple sector setting */
517 u8 tune_req; /* requested drive tuning setting */
518 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 519 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
520 u8 head; /* "real" number of heads */
521 u8 sect; /* "real" sectors per track */
522 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
523 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
524
baf08f0b
BZ
525 /* delay this long before sending packet command */
526 u8 pc_delay;
527
1da177e4
LT
528 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
529 unsigned int cyl; /* "real" number of cyls */
26bcb879 530 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
531 unsigned int failures; /* current failure count */
532 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 533 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
534
535 u64 capacity64; /* total number of sectors */
536
537 int lun; /* logical unit */
538 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
539
540 unsigned long debug_mask; /* debugging levels switch */
541
e3a59b4d
HR
542#ifdef CONFIG_BLK_DEV_IDEACPI
543 struct ide_acpi_drive_link *acpidata;
544#endif
1da177e4
LT
545 struct list_head list;
546 struct device gendev;
f36d4024 547 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 548
2b9efba4
BZ
549 /* current packet command */
550 struct ide_atapi_pc *pc;
551
d7c26ebb 552 /* callback for packet commands */
b14c7212 553 void (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 554
85e39035
BZ
555 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
556 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
557 unsigned int, int);
558
3b8ac539 559 unsigned long atapi_flags;
67c56364
BZ
560
561 struct ide_atapi_pc request_sense_pc;
562 struct request request_sense_rq;
d7c26ebb
BP
563};
564
565typedef struct ide_drive_s ide_drive_t;
1da177e4 566
5aeddf90
BP
567#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
568
569#define to_ide_drv(obj, cont_type) \
570 container_of(obj, struct cont_type, kref)
571
572#define ide_drv_g(disk, cont_type) \
573 container_of((disk)->private_data, struct cont_type, driver)
8604affd 574
374e042c 575struct ide_task_s;
039788e1 576struct ide_port_info;
1da177e4 577
374e042c
BZ
578struct ide_tp_ops {
579 void (*exec_command)(struct hwif_s *, u8);
580 u8 (*read_status)(struct hwif_s *);
581 u8 (*read_altstatus)(struct hwif_s *);
582 u8 (*read_sff_dma_status)(struct hwif_s *);
583
584 void (*set_irq)(struct hwif_s *, int);
585
586 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
587 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
588
589 void (*input_data)(ide_drive_t *, struct request *, void *,
590 unsigned int);
591 void (*output_data)(ide_drive_t *, struct request *, void *,
592 unsigned int);
593};
594
595extern const struct ide_tp_ops default_tp_ops;
596
39b986a6
BZ
597/**
598 * struct ide_port_ops - IDE port operations
599 *
600 * @init_dev: host specific initialization of a device
601 * @set_pio_mode: routine to program host for PIO mode
602 * @set_dma_mode: routine to program host for DMA mode
603 * @selectproc: tweaks hardware to select drive
604 * @reset_poll: chipset polling based on hba specifics
605 * @pre_reset: chipset specific changes to default for device-hba resets
606 * @resetproc: routine to reset controller after a disk reset
607 * @maskproc: special host masking for drive selection
608 * @quirkproc: check host's drive quirk list
609 *
610 * @mdma_filter: filter MDMA modes
611 * @udma_filter: filter UDMA modes
612 *
613 * @cable_detect: detect cable type
614 */
ac95beed 615struct ide_port_ops {
e6d95bd1 616 void (*init_dev)(ide_drive_t *);
ac95beed 617 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 618 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 619 void (*selectproc)(ide_drive_t *);
ac95beed 620 int (*reset_poll)(ide_drive_t *);
ac95beed 621 void (*pre_reset)(ide_drive_t *);
ac95beed 622 void (*resetproc)(ide_drive_t *);
ac95beed 623 void (*maskproc)(ide_drive_t *, int);
ac95beed
BZ
624 void (*quirkproc)(ide_drive_t *);
625
626 u8 (*mdma_filter)(ide_drive_t *);
627 u8 (*udma_filter)(ide_drive_t *);
628
629 u8 (*cable_detect)(struct hwif_s *);
630};
631
5e37bdc0
BZ
632struct ide_dma_ops {
633 void (*dma_host_set)(struct ide_drive_s *, int);
634 int (*dma_setup)(struct ide_drive_s *);
635 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
636 void (*dma_start)(struct ide_drive_s *);
637 int (*dma_end)(struct ide_drive_s *);
638 int (*dma_test_irq)(struct ide_drive_s *);
639 void (*dma_lost_irq)(struct ide_drive_s *);
640 void (*dma_timeout)(struct ide_drive_s *);
641};
642
08da591e
BZ
643struct ide_host;
644
1da177e4
LT
645typedef struct hwif_s {
646 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
647 struct hwif_s *mate; /* other hwif from same PCI chip */
648 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
649 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
650
08da591e
BZ
651 struct ide_host *host;
652
1da177e4
LT
653 char name[6]; /* name of interface, eg. "ide0" */
654
4c3032d8
BZ
655 struct ide_io_ports io_ports;
656
1da177e4 657 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 658
1da177e4
LT
659 ide_drive_t drives[MAX_DRIVES]; /* drive info */
660
661 u8 major; /* our major number */
662 u8 index; /* 0 for ide0; 1 for ide1; ... */
663 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 664
e95d9c6b 665 u32 host_flags;
6a824c92 666
4099d143
BZ
667 u8 pio_mask;
668
1da177e4
LT
669 u8 ultra_mask;
670 u8 mwdma_mask;
671 u8 swdma_mask;
672
49521f97
BZ
673 u8 cbl; /* cable type */
674
1da177e4
LT
675 hwif_chipset_t chipset; /* sub-module for tuning.. */
676
36501650
BZ
677 struct device *dev;
678
18e181fe
BZ
679 ide_ack_intr_t *ack_intr;
680
1da177e4
LT
681 void (*rw_disk)(ide_drive_t *, struct request *);
682
374e042c 683 const struct ide_tp_ops *tp_ops;
ac95beed 684 const struct ide_port_ops *port_ops;
f37afdac 685 const struct ide_dma_ops *dma_ops;
bfa14b42 686
f0dd8712 687 void (*ide_dma_clear_irq)(ide_drive_t *drive);
1da177e4 688
1da177e4
LT
689 /* dma physical region descriptor table (cpu view) */
690 unsigned int *dmatable_cpu;
691 /* dma physical region descriptor table (dma view) */
692 dma_addr_t dmatable_dma;
693 /* Scatter-gather list used to build the above */
694 struct scatterlist *sg_table;
695 int sg_max_nents; /* Maximum number of entries in it */
696 int sg_nents; /* Current number of entries in it */
697 int sg_dma_direction; /* dma transfer direction */
698
699 /* data phase of the active command (currently only valid for PIO/DMA) */
700 int data_phase;
701
702 unsigned int nsect;
703 unsigned int nleft;
55c16a70 704 struct scatterlist *cursg;
1da177e4
LT
705 unsigned int cursg_ofs;
706
1da177e4
LT
707 int rqsize; /* max sectors per request */
708 int irq; /* our irq number */
709
1da177e4 710 unsigned long dma_base; /* base addr for dma ports */
1da177e4 711
1da177e4
LT
712 unsigned long config_data; /* for use by chipset-specific code */
713 unsigned long select_data; /* for use by chipset-specific code */
714
020e322d
SS
715 unsigned long extra_base; /* extra addr for dma ports */
716 unsigned extra_ports; /* number of extra dma ports */
717
1da177e4 718 unsigned present : 1; /* this interface exists */
1da177e4
LT
719 unsigned serialized : 1; /* serialized all channel operation */
720 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
1da177e4
LT
721 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
722
f74c9141
BZ
723 struct device gendev;
724 struct device *portdev;
725
f36d4024 726 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
727
728 void *hwif_data; /* extra hwif data */
729
e3a59b4d
HR
730#ifdef CONFIG_BLK_DEV_IDEACPI
731 struct ide_acpi_hwif_link *acpidata;
732#endif
22fc6ecc 733} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 734
48c3c107
BZ
735struct ide_host {
736 ide_hwif_t *ports[MAX_HWIFS];
737 unsigned int n_ports;
6cdf6eb3 738 struct device *dev[2];
feb22b7f 739 unsigned int (*init_chipset)(struct pci_dev *);
ef0b0427 740 unsigned long host_flags;
6cdf6eb3 741 void *host_priv;
48c3c107
BZ
742};
743
1da177e4
LT
744/*
745 * internal ide interrupt handler type
746 */
1da177e4
LT
747typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
748typedef int (ide_expiry_t)(ide_drive_t *);
749
0eea6458 750/* used by ide-cd, ide-floppy, etc. */
9567b349 751typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 752
1da177e4
LT
753typedef struct hwgroup_s {
754 /* irq handler, if active */
755 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 756
1da177e4
LT
757 /* BOOL: protects all fields below */
758 volatile int busy;
759 /* BOOL: wake us up on timer expiry */
760 unsigned int sleeping : 1;
761 /* BOOL: polling active & poll_timeout field valid */
762 unsigned int polling : 1;
913759ac 763
1da177e4
LT
764 /* current drive */
765 ide_drive_t *drive;
766 /* ptr to current hwif in linked-list */
767 ide_hwif_t *hwif;
768
1da177e4
LT
769 /* current request */
770 struct request *rq;
a6fbb1c8 771
1da177e4
LT
772 /* failsafe timer */
773 struct timer_list timer;
1da177e4
LT
774 /* timeout value during long polls */
775 unsigned long poll_timeout;
776 /* queried upon timeouts */
777 int (*expiry)(ide_drive_t *);
a6fbb1c8 778
23450319
SS
779 int req_gen;
780 int req_gen_timer;
1da177e4
LT
781} ide_hwgroup_t;
782
7662d046
BZ
783typedef struct ide_driver_s ide_driver_t;
784
f9383c42 785extern struct mutex ide_setting_mtx;
1da177e4 786
92f1f8fd
EO
787/*
788 * configurable drive settings
789 */
790
791#define DS_SYNC (1 << 0)
792
793struct ide_devset {
794 int (*get)(ide_drive_t *);
795 int (*set)(ide_drive_t *, int);
796 unsigned int flags;
797};
798
799#define __DEVSET(_flags, _get, _set) { \
800 .flags = _flags, \
801 .get = _get, \
802 .set = _set, \
803}
7662d046 804
8185d5aa 805#define ide_devset_get(name, field) \
92f1f8fd 806static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
807{ \
808 return drive->field; \
809}
810
811#define ide_devset_set(name, field) \
92f1f8fd 812static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
813{ \
814 drive->field = arg; \
815 return 0; \
816}
817
97100fc8
BZ
818#define ide_devset_get_flag(name, flag) \
819static int get_##name(ide_drive_t *drive) \
820{ \
821 return !!(drive->dev_flags & flag); \
822}
823
824#define ide_devset_set_flag(name, flag) \
825static int set_##name(ide_drive_t *drive, int arg) \
826{ \
827 if (arg) \
828 drive->dev_flags |= flag; \
829 else \
830 drive->dev_flags &= ~flag; \
831 return 0; \
832}
833
92f1f8fd
EO
834#define __IDE_DEVSET(_name, _flags, _get, _set) \
835const struct ide_devset ide_devset_##_name = \
836 __DEVSET(_flags, _get, _set)
837
838#define IDE_DEVSET(_name, _flags, _get, _set) \
839static __IDE_DEVSET(_name, _flags, _get, _set)
840
841#define ide_devset_rw(_name, _func) \
842IDE_DEVSET(_name, 0, get_##_func, set_##_func)
843
844#define ide_devset_w(_name, _func) \
845IDE_DEVSET(_name, 0, NULL, set_##_func)
846
847#define ide_devset_rw_sync(_name, _func) \
848IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
849
850#define ide_decl_devset(_name) \
851extern const struct ide_devset ide_devset_##_name
852
853ide_decl_devset(io_32bit);
854ide_decl_devset(keepsettings);
855ide_decl_devset(pio_mode);
856ide_decl_devset(unmaskirq);
857ide_decl_devset(using_dma);
858
7662d046 859#ifdef CONFIG_IDE_PROC_FS
1da177e4 860/*
92f1f8fd 861 * /proc/ide interface
1da177e4
LT
862 */
863
92f1f8fd
EO
864#define ide_devset_rw_field(_name, _field) \
865ide_devset_get(_name, _field); \
866ide_devset_set(_name, _field); \
867IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
868
97100fc8
BZ
869#define ide_devset_rw_flag(_name, _field) \
870ide_devset_get_flag(_name, _field); \
871ide_devset_set_flag(_name, _field); \
872IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
873
92f1f8fd
EO
874struct ide_proc_devset {
875 const char *name;
876 const struct ide_devset *setting;
877 int min, max;
878 int (*mulf)(ide_drive_t *);
879 int (*divf)(ide_drive_t *);
8185d5aa
BZ
880};
881
92f1f8fd
EO
882#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
883 .name = __stringify(_name), \
884 .setting = &ide_devset_##_name, \
885 .min = _min, \
886 .max = _max, \
887 .mulf = _mulf, \
888 .divf = _divf, \
8185d5aa
BZ
889}
890
92f1f8fd
EO
891#define IDE_PROC_DEVSET(_name, _min, _max) \
892__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 893
1da177e4
LT
894typedef struct {
895 const char *name;
896 mode_t mode;
897 read_proc_t *read_proc;
898 write_proc_t *write_proc;
899} ide_proc_entry_t;
900
ecfd80e4
BZ
901void proc_ide_create(void);
902void proc_ide_destroy(void);
5cbf79cd 903void ide_proc_register_port(ide_hwif_t *);
d9270a3f 904void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 905void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 906void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
907void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
908void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
909
1da177e4
LT
910read_proc_t proc_ide_read_capacity;
911read_proc_t proc_ide_read_geometry;
912
1da177e4
LT
913/*
914 * Standard exit stuff:
915 */
916#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
917{ \
918 len -= off; \
919 if (len < count) { \
920 *eof = 1; \
921 if (len <= 0) \
922 return 0; \
923 } else \
924 len = count; \
925 *start = page + off; \
926 return len; \
927}
928#else
ecfd80e4
BZ
929static inline void proc_ide_create(void) { ; }
930static inline void proc_ide_destroy(void) { ; }
5cbf79cd 931static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 932static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 933static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 934static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
935static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
936static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
1da177e4
LT
937#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
938#endif
939
e1c7c464
BP
940enum {
941 /* enter/exit functions */
942 IDE_DBG_FUNC = (1 << 0),
943 /* sense key/asc handling */
944 IDE_DBG_SENSE = (1 << 1),
945 /* packet commands handling */
946 IDE_DBG_PC = (1 << 2),
947 /* request handling */
948 IDE_DBG_RQ = (1 << 3),
949 /* driver probing/setup */
950 IDE_DBG_PROBE = (1 << 4),
951};
952
953/* DRV_NAME has to be defined in the driver before using the macro below */
954#define __ide_debug_log(lvl, fmt, args...) \
955{ \
956 if (unlikely(drive->debug_mask & lvl)) \
957 printk(KERN_INFO DRV_NAME ": " fmt, ## args); \
958}
959
1da177e4 960/*
0d346ba0 961 * Power Management state machine (rq->pm->pm_step).
1da177e4 962 *
0d346ba0 963 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
964 * This can return:
965 * - ide_stopped : In this case, the core calls us back again unless
966 * step have been set to ide_power_state_completed.
967 * - ide_started : In this case, the channel is left busy until an
968 * async event (interrupt) occurs.
0d346ba0 969 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
970 * do_rw_taskfile().
971 *
0d346ba0 972 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
973 * with the error code if any. This routine should update the step value
974 * and return. It should not start a new request. The core will call
0d346ba0
BZ
975 * ide_start_power_step() for the new step value, unless step have been
976 * set to IDE_PM_COMPLETED.
1da177e4 977 */
1da177e4 978enum {
0d346ba0
BZ
979 IDE_PM_START_SUSPEND,
980 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
981 IDE_PM_STANDBY,
982
983 IDE_PM_START_RESUME,
984 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
985 IDE_PM_IDLE,
986 IDE_PM_RESTORE_DMA,
987
988 IDE_PM_COMPLETED,
1da177e4
LT
989};
990
991/*
992 * Subdrivers support.
4ef3b8f4
LR
993 *
994 * The gendriver.owner field should be set to the module owner of this driver.
995 * The gendriver.name field should be set to the name of this driver
1da177e4 996 */
7662d046 997struct ide_driver_s {
1da177e4 998 const char *version;
1da177e4
LT
999 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1000 int (*end_request)(ide_drive_t *, int, int);
1001 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1da177e4 1002 struct device_driver gen_driver;
4031bbe4
RK
1003 int (*probe)(ide_drive_t *);
1004 void (*remove)(ide_drive_t *);
0d2157f7 1005 void (*resume)(ide_drive_t *);
4031bbe4 1006 void (*shutdown)(ide_drive_t *);
7662d046 1007#ifdef CONFIG_IDE_PROC_FS
92f1f8fd
EO
1008 ide_proc_entry_t *proc;
1009 const struct ide_proc_devset *settings;
7662d046
BZ
1010#endif
1011};
1da177e4 1012
4031bbe4
RK
1013#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1014
08da591e
BZ
1015int ide_device_get(ide_drive_t *);
1016void ide_device_put(ide_drive_t *);
1017
aa768773
BZ
1018struct ide_ioctl_devset {
1019 unsigned int get_ioctl;
1020 unsigned int set_ioctl;
92f1f8fd 1021 const struct ide_devset *setting;
aa768773
BZ
1022};
1023
1024int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1025 unsigned long, const struct ide_ioctl_devset *);
1026
1027int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *,
1028 unsigned, unsigned long);
1da177e4 1029
ebae41a5
BZ
1030extern int ide_vlb_clk;
1031extern int ide_pci_clk;
1032
1da177e4 1033extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
1034int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1035 int uptodate, int nr_sectors);
1da177e4 1036
1da177e4
LT
1037extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1038
cd2a2d96
BZ
1039void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1040 ide_expiry_t *);
1da177e4 1041
1fc14258
BZ
1042void ide_execute_pkt_cmd(ide_drive_t *);
1043
9f87abe8
BZ
1044void ide_pad_transfer(ide_drive_t *, int, int);
1045
1da177e4
LT
1046ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1047
1da177e4
LT
1048ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1049
4dde4492 1050void ide_fix_driveid(u16 *);
01745112 1051
1da177e4
LT
1052extern void ide_fixstring(u8 *, const int, const int);
1053
b163f46d
BZ
1054int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1055
74af21cf 1056int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1057
1da177e4
LT
1058extern ide_startstop_t ide_do_reset (ide_drive_t *);
1059
92f1f8fd
EO
1060extern int ide_devset_execute(ide_drive_t *drive,
1061 const struct ide_devset *setting, int arg);
1062
63f5abb0 1063extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
1da177e4 1064
1da177e4
LT
1065extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1066
9e42237f
BZ
1067enum {
1068 IDE_TFLAG_LBA48 = (1 << 0),
74095a91
BZ
1069 IDE_TFLAG_FLAGGED = (1 << 2),
1070 IDE_TFLAG_OUT_DATA = (1 << 3),
1071 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
1072 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
1073 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
1074 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
1075 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
1076 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
1077 IDE_TFLAG_OUT_HOB_NSECT |
1078 IDE_TFLAG_OUT_HOB_LBAL |
1079 IDE_TFLAG_OUT_HOB_LBAM |
1080 IDE_TFLAG_OUT_HOB_LBAH,
1081 IDE_TFLAG_OUT_FEATURE = (1 << 9),
1082 IDE_TFLAG_OUT_NSECT = (1 << 10),
1083 IDE_TFLAG_OUT_LBAL = (1 << 11),
1084 IDE_TFLAG_OUT_LBAM = (1 << 12),
1085 IDE_TFLAG_OUT_LBAH = (1 << 13),
1086 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
1087 IDE_TFLAG_OUT_NSECT |
1088 IDE_TFLAG_OUT_LBAL |
1089 IDE_TFLAG_OUT_LBAM |
1090 IDE_TFLAG_OUT_LBAH,
807e35d6 1091 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 1092 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
1093 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
1094 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 1095 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 1096 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
1097 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
1098 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
1099 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
1100 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
1101 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
1102 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
1103 IDE_TFLAG_IN_HOB_LBAM |
1104 IDE_TFLAG_IN_HOB_LBAH,
1105 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
1106 IDE_TFLAG_IN_HOB_NSECT |
1107 IDE_TFLAG_IN_HOB_LBA,
92eb4380 1108 IDE_TFLAG_IN_FEATURE = (1 << 1),
c2b57cdc
BZ
1109 IDE_TFLAG_IN_NSECT = (1 << 25),
1110 IDE_TFLAG_IN_LBAL = (1 << 26),
1111 IDE_TFLAG_IN_LBAM = (1 << 27),
1112 IDE_TFLAG_IN_LBAH = (1 << 28),
1113 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
1114 IDE_TFLAG_IN_LBAM |
1115 IDE_TFLAG_IN_LBAH,
1116 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
1117 IDE_TFLAG_IN_LBA,
1118 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
1119 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
1120 IDE_TFLAG_IN_HOB,
1121 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
1122 IDE_TFLAG_IN_TF,
1123 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
1124 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
1125 /* force 16-bit I/O operations */
1126 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ
1127 /* ide_task_t was allocated using kmalloc() */
1128 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ
1129};
1130
650d841d
BZ
1131struct ide_taskfile {
1132 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
1133
1134 u8 hob_feature; /* 1-5: additional data to support LBA48 */
1135 u8 hob_nsect;
1136 u8 hob_lbal;
1137 u8 hob_lbam;
1138 u8 hob_lbah;
1139
1140 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
1141
1142 union { /*  7: */
1143 u8 error; /* read: error */
1144 u8 feature; /* write: feature */
1145 };
1146
1147 u8 nsect; /* 8: number of sectors */
1148 u8 lbal; /* 9: LBA low */
1149 u8 lbam; /* 10: LBA mid */
1150 u8 lbah; /* 11: LBA high */
1151
1152 u8 device; /* 12: device select */
1153
1154 union { /* 13: */
1155 u8 status; /*  read: status  */
1156 u8 command; /* write: command */
1157 };
1158};
1159
1da177e4 1160typedef struct ide_task_s {
650d841d
BZ
1161 union {
1162 struct ide_taskfile tf;
1163 u8 tf_array[14];
1164 };
866e2ec9 1165 u32 tf_flags;
1da177e4 1166 int data_phase;
1da177e4
LT
1167 struct request *rq; /* copy of request */
1168 void *special; /* valid_t generally */
1169} ide_task_t;
1170
089c5c7e 1171void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1172
374e042c
BZ
1173void ide_exec_command(ide_hwif_t *, u8);
1174u8 ide_read_status(ide_hwif_t *);
1175u8 ide_read_altstatus(ide_hwif_t *);
1176u8 ide_read_sff_dma_status(ide_hwif_t *);
1177
1178void ide_set_irq(ide_hwif_t *, int);
1179
1180void ide_tf_load(ide_drive_t *, ide_task_t *);
1181void ide_tf_read(ide_drive_t *, ide_task_t *);
1182
1183void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1184void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1185
acaa0f5f
BZ
1186int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1187
1da177e4 1188extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1189void SELECT_MASK(ide_drive_t *, int);
1da177e4 1190
92eb4380 1191u8 ide_read_error(ide_drive_t *);
1823649b 1192void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1193
1da177e4 1194extern int drive_is_ready(ide_drive_t *);
1da177e4 1195
2fc57388
BZ
1196void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
1197
51509eec
BZ
1198int ide_check_atapi_device(ide_drive_t *, const char *);
1199
7bf7420a
BZ
1200void ide_init_pc(struct ide_atapi_pc *);
1201
7645c151
BZ
1202/*
1203 * Special requests for ide-tape block device strategy routine.
1204 *
1205 * In order to service a character device command, we add special requests to
1206 * the tail of our block device request queue and wait for their completion.
1207 */
1208enum {
1209 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1210 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1211 REQ_IDETAPE_READ = (1 << 2),
1212 REQ_IDETAPE_WRITE = (1 << 3),
1213};
1214
2ac07d92 1215int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1216
de699ad5 1217int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1218int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1219int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1220void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1221void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1222
844b9468
BZ
1223static inline unsigned long ide_scsi_get_timeout(struct ide_atapi_pc *pc)
1224{
1225 return max_t(unsigned long, WAIT_CMD, pc->timeout - jiffies);
1226}
1227
1228int ide_scsi_expiry(ide_drive_t *);
1229
baf08f0b 1230ide_startstop_t ide_issue_pc(ide_drive_t *, unsigned int, ide_expiry_t *);
594c16d8 1231
f6e29e35 1232ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 1233
4d7a984b
TH
1234void task_end_request(ide_drive_t *, struct request *, u8);
1235
ac026ff2 1236int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
1237int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1238
1da177e4 1239int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1da177e4 1240
1da177e4 1241extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1242extern int ide_config_drive_speed(ide_drive_t *, u8);
1243extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1244extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1245
1246extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1247
1da177e4
LT
1248extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1249
1da177e4 1250extern void ide_timer_expiry(unsigned long);
7d12e780 1251extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1252extern void do_ide_request(struct request_queue *);
1da177e4
LT
1253
1254void ide_init_disk(struct gendisk *, ide_drive_t *);
1255
6d208b39 1256#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1257extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1258#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1259#else
1260#define ide_pci_register_driver(d) pci_register_driver(d)
1261#endif
1262
c97c6aca 1263void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
48c3c107 1264 hw_regs_t *, hw_regs_t **);
85620436 1265void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1266
8e882ba1 1267#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1268int ide_pci_set_master(struct pci_dev *, const char *);
1269unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1270int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1271int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1272#else
b123f56e
BZ
1273static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1274 const struct ide_port_info *d)
1275{
1276 return -EINVAL;
1277}
c413b9b9
BZ
1278#endif
1279
1da177e4
LT
1280typedef struct ide_pci_enablebit_s {
1281 u8 reg; /* byte pci reg holding the enable-bit */
1282 u8 mask; /* mask to isolate the enable-bit */
1283 u8 val; /* value of masked reg when "enabled" */
1284} ide_pci_enablebit_t;
1285
1286enum {
1287 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1288 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1289 /* single port device */
a5d8c5c8 1290 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1291 /* don't use legacy PIO blacklist */
1292 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1293 /* set for the second port of QD65xx */
1294 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1295 /* use PIO8/9 for prefetch off/on */
1296 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1297 /* use PIO6/7 for fast-devsel off/on */
1298 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1299 /* use 100-102 and 200-202 PIO values to set DMA modes */
1300 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1301 /*
1302 * keep DMA setting when programming PIO mode, may be used only
1303 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1304 */
1305 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1306 /* program host for the transfer mode after programming device */
1307 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1308 /* don't program host/device for the transfer mode ("smart" hosts) */
1309 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1310 /* trust BIOS for programming chipset/device for DMA */
1311 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1312 /* host is CS5510/CS5520 */
1313 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1314 /* ATAPI DMA is unsupported */
1315 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1316 /* set if host is a "non-bootable" controller */
1317 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1318 /* host doesn't support DMA */
1319 IDE_HFLAG_NO_DMA = (1 << 14),
1320 /* check if host is PCI IDE device before allowing DMA */
1321 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1322 /* host uses MMIO */
1323 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1324 /* no LBA48 */
1325 IDE_HFLAG_NO_LBA48 = (1 << 17),
1326 /* no LBA48 DMA */
1327 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1328 /* data FIFO is cleared by an error */
1329 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1330 /* serialize ports */
1331 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1332 /* use legacy IRQs */
1333 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1334 /* force use of legacy IRQs */
1335 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1336 /* limit LBA48 requests to 256 sectors */
1337 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1338 /* use 32-bit I/O ops */
1339 IDE_HFLAG_IO_32BIT = (1 << 24),
1340 /* unmask IRQs */
1341 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1fd18905
BZ
1342 /* serialize ports if DMA is possible (for sl82c105) */
1343 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1344 /* force host out of "simplex" mode */
1345 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1346 /* DSC overlap is unsupported */
1347 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1348 /* never use 32-bit I/O ops */
1349 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1350 /* never unmask IRQs */
1351 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1352};
1353
7cab14a7 1354#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1355# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1356#else
1357# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1358#endif
1359
039788e1 1360struct ide_port_info {
1da177e4 1361 char *name;
a326b02b 1362 unsigned int (*init_chipset)(struct pci_dev *);
1da177e4
LT
1363 void (*init_iops)(ide_hwif_t *);
1364 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1365 int (*init_dma)(ide_hwif_t *,
1366 const struct ide_port_info *);
ac95beed 1367
374e042c 1368 const struct ide_tp_ops *tp_ops;
ac95beed 1369 const struct ide_port_ops *port_ops;
f37afdac 1370 const struct ide_dma_ops *dma_ops;
ac95beed 1371
1da177e4 1372 ide_pci_enablebit_t enablebits[2];
528a572d 1373 hwif_chipset_t chipset;
9ffcf364 1374 u32 host_flags;
4099d143 1375 u8 pio_mask;
5f8b6c34
BZ
1376 u8 swdma_mask;
1377 u8 mwdma_mask;
18137207 1378 u8 udma_mask;
039788e1 1379};
1da177e4 1380
6cdf6eb3
BZ
1381int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1382int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1383 const struct ide_port_info *, void *);
ef0b0427 1384void ide_pci_remove(struct pci_dev *);
1da177e4 1385
feb22b7f
BZ
1386#ifdef CONFIG_PM
1387int ide_pci_suspend(struct pci_dev *, pm_message_t);
1388int ide_pci_resume(struct pci_dev *);
1389#else
1390#define ide_pci_suspend NULL
1391#define ide_pci_resume NULL
1392#endif
1393
1da177e4
LT
1394void ide_map_sg(ide_drive_t *, struct request *);
1395void ide_init_sg_cmd(ide_drive_t *, struct request *);
1396
1397#define BAD_DMA_DRIVE 0
1398#define GOOD_DMA_DRIVE 1
1399
65e5f2e3
JC
1400struct drive_list_entry {
1401 const char *id_model;
1402 const char *id_firmware;
1403};
1404
4dde4492 1405int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1406
1407#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1408int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1409int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1410
1411u8 ide_find_dma_mode(ide_drive_t *, u8);
1412
1413static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1414{
1415 return ide_find_dma_mode(drive, XFER_UDMA_6);
1416}
1417
4a546e04 1418void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1419void ide_dma_off(ide_drive_t *);
4a546e04 1420void ide_dma_on(ide_drive_t *);
3608b5d7 1421int ide_set_dma(ide_drive_t *);
578cfa0d 1422void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1423ide_startstop_t ide_dma_intr(ide_drive_t *);
1424
062f9f02
BZ
1425int ide_build_sglist(ide_drive_t *, struct request *);
1426void ide_destroy_dmatable(ide_drive_t *);
1427
8e882ba1 1428#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1429extern int ide_build_dmatable(ide_drive_t *, struct request *);
b8e73fba
BZ
1430int ide_allocate_dma_engine(ide_hwif_t *);
1431void ide_release_dma_engine(ide_hwif_t *);
1da177e4 1432
15ce926a 1433void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1434extern int ide_dma_setup(ide_drive_t *);
f37afdac 1435void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4
LT
1436extern void ide_dma_start(ide_drive_t *);
1437extern int __ide_dma_end(ide_drive_t *);
f37afdac 1438int ide_dma_test_irq(ide_drive_t *);
841d2a9b 1439extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1440extern void ide_dma_timeout(ide_drive_t *);
71fc9fcc 1441extern const struct ide_dma_ops sff_dma_ops;
8e882ba1 1442#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1443
1444#else
3ab7efe8 1445static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1446static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1447static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1448static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1449static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1450static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1451static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1452static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1453static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1454#endif /* CONFIG_BLK_DEV_IDEDMA */
1455
8e882ba1 1456#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
0d1bad21 1457static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1da177e4
LT
1458#endif
1459
e3a59b4d
HR
1460#ifdef CONFIG_BLK_DEV_IDEACPI
1461extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1462extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1463extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1464extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1465void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1466extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1467#else
1468static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1469static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1470static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1471static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1472static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1473static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1474#endif
1475
fbd13088 1476void ide_remove_port_from_hwgroup(ide_hwif_t *);
387750c3 1477void ide_unregister(ide_hwif_t *);
1da177e4
LT
1478
1479void ide_register_region(struct gendisk *);
1480void ide_unregister_region(struct gendisk *);
1481
f01393e4 1482void ide_undecoded_slave(ide_drive_t *);
1da177e4 1483
9fd91d95
BZ
1484void ide_port_apply_params(ide_hwif_t *);
1485
48c3c107
BZ
1486struct ide_host *ide_host_alloc_all(const struct ide_port_info *, hw_regs_t **);
1487struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1488void ide_host_free(struct ide_host *);
48c3c107
BZ
1489int ide_host_register(struct ide_host *, const struct ide_port_info *,
1490 hw_regs_t **);
6f904d01
BZ
1491int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1492 struct ide_host **);
48c3c107 1493void ide_host_remove(struct ide_host *);
0bfeee7d 1494int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1495void ide_port_unregister_devices(ide_hwif_t *);
1496void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1497
1498static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1499{
1500 return hwif->hwif_data;
1501}
1502
1503static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1504{
1505 hwif->hwif_data = data;
1506}
1507
3ab7efe8 1508const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1509extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1510extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1511
a501633c 1512u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1513u8 ide_dump_status(ide_drive_t *, const char *, u8);
1514
3be53f3f
BZ
1515struct ide_timing {
1516 u8 mode;
1517 u8 setup; /* t1 */
1518 u16 act8b; /* t2 for 8-bit io */
1519 u16 rec8b; /* t2i for 8-bit io */
1520 u16 cyc8b; /* t0 for 8-bit io */
1521 u16 active; /* t2 or tD */
1522 u16 recover; /* t2i or tK */
1523 u16 cycle; /* t0 */
1524 u16 udma; /* t2CYCTYP/2 */
1525};
1526
1527enum {
1528 IDE_TIMING_SETUP = (1 << 0),
1529 IDE_TIMING_ACT8B = (1 << 1),
1530 IDE_TIMING_REC8B = (1 << 2),
1531 IDE_TIMING_CYC8B = (1 << 3),
1532 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1533 IDE_TIMING_CYC8B,
1534 IDE_TIMING_ACTIVE = (1 << 4),
1535 IDE_TIMING_RECOVER = (1 << 5),
1536 IDE_TIMING_CYCLE = (1 << 6),
1537 IDE_TIMING_UDMA = (1 << 7),
1538 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1539 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1540 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1541};
1542
f06ab340 1543struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1544u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1545void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1546 struct ide_timing *, unsigned int);
1547int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1548
9ad54093
BZ
1549int ide_scan_pio_blacklist(char *);
1550
2134758d 1551u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4 1552
88b2b32b
BZ
1553int ide_set_pio_mode(ide_drive_t *, u8);
1554int ide_set_dma_mode(ide_drive_t *, u8);
1555
26bcb879
BZ
1556void ide_set_pio(ide_drive_t *, u8);
1557
1558static inline void ide_set_max_pio(ide_drive_t *drive)
1559{
1560 ide_set_pio(drive, 255);
1561}
1da177e4
LT
1562
1563extern spinlock_t ide_lock;
ef29888e 1564extern struct mutex ide_cfg_mtx;
1da177e4
LT
1565/*
1566 * Structure locking:
1567 *
ef29888e 1568 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1569 * ide_hwif_t->{next,hwgroup}
1570 * ide_drive_t->next
1571 *
1572 * ide_hwgroup_t->busy: ide_lock
1573 * ide_hwgroup_t->hwif: ide_lock
1574 * ide_hwif_t->mate: constant, no locking
1575 * ide_drive_t->hwif: constant, no locking
1576 */
1577
366c7f55 1578#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1579
1580extern struct bus_type ide_bus_type;
f74c9141 1581extern struct class *ide_port_class;
1da177e4 1582
7b9f25b5
BZ
1583static inline void ide_dump_identify(u8 *id)
1584{
1585 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1586}
1587
86b37860
CL
1588static inline int hwif_to_node(ide_hwif_t *hwif)
1589{
96f80219 1590 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1591}
1592
7e59ea21 1593static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1594{
7e59ea21 1595 ide_drive_t *peer = &drive->hwif->drives[(drive->dn ^ 1) & 1];
1b678347 1596
97100fc8 1597 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1598}
1da177e4 1599#endif /* _IDE_H */
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