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1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
3ceca727 | 11 | #include <linux/ata.h> |
1da177e4 LT |
12 | #include <linux/blkdev.h> |
13 | #include <linux/proc_fs.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/bitops.h> | |
16 | #include <linux/bio.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/pci.h> | |
f36d4024 | 19 | #include <linux/completion.h> |
feb22b7f | 20 | #include <linux/pm.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
f9383c42 | 27 | #include <asm/mutex.h> |
1da177e4 | 28 | |
729d4de9 | 29 | #if defined(CONFIG_CRIS) || defined(CONFIG_FRV) |
4ee06b7e BZ |
30 | # define SUPPORT_VLB_SYNC 0 |
31 | #else | |
32 | # define SUPPORT_VLB_SYNC 1 | |
1da177e4 LT |
33 | #endif |
34 | ||
1da177e4 LT |
35 | /* |
36 | * Probably not wise to fiddle with these | |
37 | */ | |
b40d1b88 | 38 | #define IDE_DEFAULT_MAX_FAILURES 1 |
1da177e4 LT |
39 | #define ERROR_MAX 8 /* Max read/write errors per sector */ |
40 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
41 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
42 | ||
1da177e4 LT |
43 | /* |
44 | * Definitions for accessing IDE controller registers | |
45 | */ | |
46 | #define IDE_NR_PORTS (10) | |
47 | ||
4c3032d8 BZ |
48 | struct ide_io_ports { |
49 | unsigned long data_addr; | |
50 | ||
51 | union { | |
52 | unsigned long error_addr; /* read: error */ | |
53 | unsigned long feature_addr; /* write: feature */ | |
54 | }; | |
55 | ||
56 | unsigned long nsect_addr; | |
57 | unsigned long lbal_addr; | |
58 | unsigned long lbam_addr; | |
59 | unsigned long lbah_addr; | |
60 | ||
61 | unsigned long device_addr; | |
62 | ||
63 | union { | |
64 | unsigned long status_addr; /* read: status */ | |
65 | unsigned long command_addr; /* write: command */ | |
66 | }; | |
67 | ||
68 | unsigned long ctl_addr; | |
69 | ||
70 | unsigned long irq_addr; | |
71 | }; | |
1da177e4 LT |
72 | |
73 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
1da177e4 | 74 | |
3a7d2484 BZ |
75 | #define BAD_R_STAT (ATA_BUSY | ATA_ERR) |
76 | #define BAD_W_STAT (BAD_R_STAT | ATA_DF) | |
77 | #define BAD_STAT (BAD_R_STAT | ATA_DRQ) | |
78 | #define DRIVE_READY (ATA_DRDY | ATA_DSC) | |
79 | ||
80 | #define BAD_CRC (ATA_ABORTED | ATA_ICRC) | |
1da177e4 LT |
81 | |
82 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
83 | ||
84 | #define SATA_STATUS_OFFSET (0) | |
1da177e4 | 85 | #define SATA_ERROR_OFFSET (1) |
1da177e4 | 86 | #define SATA_CONTROL_OFFSET (2) |
1da177e4 | 87 | |
1da177e4 LT |
88 | /* |
89 | * Our Physical Region Descriptor (PRD) table should be large enough | |
90 | * to handle the biggest I/O request we are likely to see. Since requests | |
91 | * can have no more than 256 sectors, and since the typical blocksize is | |
92 | * two or more sectors, we could get by with a limit of 128 entries here for | |
93 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
94 | * further reducing the number of table entries required. | |
95 | * | |
96 | * The driver reverts to PIO mode for individual requests that exceed | |
97 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
98 | * 100% of all crazy scenarios here is not necessary. | |
99 | * | |
100 | * As it turns out though, we must allocate a full 4KB page for this, | |
101 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
102 | * allowing each to have about 256 entries (8 bytes each) from this. | |
103 | */ | |
104 | #define PRD_BYTES 8 | |
105 | #define PRD_ENTRIES 256 | |
106 | ||
107 | /* | |
108 | * Some more useful definitions | |
109 | */ | |
110 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
111 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
112 | #define SECTOR_SIZE 512 | |
151a6701 | 113 | |
1da177e4 LT |
114 | /* |
115 | * Timeouts for various operations: | |
116 | */ | |
d6e2955a BZ |
117 | enum { |
118 | /* spec allows up to 20ms */ | |
119 | WAIT_DRQ = HZ / 10, /* 100ms */ | |
120 | /* some laptops are very slow */ | |
121 | WAIT_READY = 5 * HZ, /* 5s */ | |
122 | /* should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
123 | WAIT_PIDENTIFY = 10 * HZ, /* 10s */ | |
124 | /* worst case when spinning up */ | |
125 | WAIT_WORSTCASE = 30 * HZ, /* 30s */ | |
126 | /* maximum wait for an IRQ to happen */ | |
127 | WAIT_CMD = 10 * HZ, /* 10s */ | |
128 | /* Some drives require a longer IRQ timeout. */ | |
129 | WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */ | |
130 | /* | |
131 | * Some drives (for example, Seagate STT3401A Travan) require a very | |
132 | * long timeout, because they don't return an interrupt or clear their | |
133 | * BSY bit until after the command completes (even retension commands). | |
134 | */ | |
135 | WAIT_TAPE_CMD = 900 * HZ, /* 900s */ | |
136 | /* minimum sleep time */ | |
137 | WAIT_MIN_SLEEP = HZ / 50, /* 20ms */ | |
138 | }; | |
1da177e4 | 139 | |
79e36a9f EO |
140 | /* |
141 | * Op codes for special requests to be handled by ide_special_rq(). | |
142 | * Values should be in the range of 0x20 to 0x3f. | |
143 | */ | |
144 | #define REQ_DRIVE_RESET 0x20 | |
92f1f8fd | 145 | #define REQ_DEVSET_EXEC 0x21 |
4abdc6ee EO |
146 | #define REQ_PARK_HEADS 0x22 |
147 | #define REQ_UNPARK_HEADS 0x23 | |
79e36a9f | 148 | |
1da177e4 LT |
149 | /* |
150 | * Check for an interrupt and acknowledge the interrupt status | |
151 | */ | |
152 | struct hwif_s; | |
153 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
154 | ||
1da177e4 LT |
155 | /* |
156 | * hwif_chipset_t is used to keep track of the specific hardware | |
157 | * chipset used by each IDE interface, if known. | |
158 | */ | |
528a572d | 159 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
160 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
161 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
b7876a6f | 162 | ide_4drives, ide_pmac, ide_acorn, |
9a0e77f2 | 163 | ide_au1xxx, ide_palm3710 |
528a572d BZ |
164 | }; |
165 | ||
166 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
167 | |
168 | /* | |
169 | * Structure to hold all information about the location of this port | |
170 | */ | |
171 | typedef struct hw_regs_s { | |
4c3032d8 BZ |
172 | union { |
173 | struct ide_io_ports io_ports; | |
174 | unsigned long io_ports_array[IDE_NR_PORTS]; | |
175 | }; | |
176 | ||
1da177e4 | 177 | int irq; /* our irq number */ |
1da177e4 LT |
178 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
179 | hwif_chipset_t chipset; | |
c56c5648 | 180 | struct device *dev, *parent; |
d6276b5f | 181 | unsigned long config; |
1da177e4 LT |
182 | } hw_regs_t; |
183 | ||
1da177e4 LT |
184 | static inline void ide_std_init_ports(hw_regs_t *hw, |
185 | unsigned long io_addr, | |
186 | unsigned long ctl_addr) | |
187 | { | |
188 | unsigned int i; | |
189 | ||
4c3032d8 BZ |
190 | for (i = 0; i <= 7; i++) |
191 | hw->io_ports_array[i] = io_addr++; | |
1da177e4 | 192 | |
4c3032d8 | 193 | hw->io_ports.ctl_addr = ctl_addr; |
1da177e4 LT |
194 | } |
195 | ||
a861beb1 BZ |
196 | /* for IDE PCI controllers in legacy mode, temporary */ |
197 | static inline int __ide_default_irq(unsigned long base) | |
198 | { | |
199 | switch (base) { | |
200 | #ifdef CONFIG_IA64 | |
201 | case 0x1f0: return isa_irq_to_vector(14); | |
202 | case 0x170: return isa_irq_to_vector(15); | |
203 | #else | |
204 | case 0x1f0: return 14; | |
205 | case 0x170: return 15; | |
206 | #endif | |
207 | } | |
208 | return 0; | |
209 | } | |
210 | ||
2a8f7450 BZ |
211 | #if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \ |
212 | defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \ | |
213 | || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64) | |
1da177e4 | 214 | #include <asm/ide.h> |
2a8f7450 BZ |
215 | #else |
216 | #include <asm-generic/ide_iops.h> | |
217 | #endif | |
1da177e4 | 218 | |
c5bfc375 | 219 | #define MAX_HWIFS 10 |
83ae20c8 | 220 | |
1da177e4 LT |
221 | /* Currently only m68k, apus and m8xx need it */ |
222 | #ifndef IDE_ARCH_ACK_INTR | |
223 | # define ide_ack_intr(hwif) (1) | |
224 | #endif | |
225 | ||
226 | /* Currently only Atari needs it */ | |
227 | #ifndef IDE_ARCH_LOCK | |
228 | # define ide_release_lock() do {} while (0) | |
229 | # define ide_get_lock(hdlr, data) do {} while (0) | |
230 | #endif /* IDE_ARCH_LOCK */ | |
231 | ||
232 | /* | |
233 | * Now for the data we need to maintain per-drive: ide_drive_t | |
234 | */ | |
235 | ||
236 | #define ide_scsi 0x21 | |
237 | #define ide_disk 0x20 | |
238 | #define ide_optical 0x7 | |
239 | #define ide_cdrom 0x5 | |
240 | #define ide_tape 0x1 | |
241 | #define ide_floppy 0x0 | |
242 | ||
243 | /* | |
244 | * Special Driver Flags | |
245 | * | |
246 | * set_geometry : respecify drive geometry | |
247 | * recalibrate : seek to cyl 0 | |
248 | * set_multmode : set multmode count | |
1da177e4 LT |
249 | * reserved : unused |
250 | */ | |
251 | typedef union { | |
252 | unsigned all : 8; | |
253 | struct { | |
1da177e4 LT |
254 | unsigned set_geometry : 1; |
255 | unsigned recalibrate : 1; | |
256 | unsigned set_multmode : 1; | |
6982daf7 | 257 | unsigned reserved : 5; |
1da177e4 LT |
258 | } b; |
259 | } special_t; | |
260 | ||
1da177e4 LT |
261 | /* |
262 | * Status returned from various ide_ functions | |
263 | */ | |
264 | typedef enum { | |
265 | ide_stopped, /* no drive operation was started */ | |
266 | ide_started, /* a drive operation was started, handler was set */ | |
267 | } ide_startstop_t; | |
268 | ||
d6ff9f64 BZ |
269 | enum { |
270 | IDE_TFLAG_LBA48 = (1 << 0), | |
271 | IDE_TFLAG_FLAGGED = (1 << 2), | |
272 | IDE_TFLAG_OUT_DATA = (1 << 3), | |
273 | IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4), | |
274 | IDE_TFLAG_OUT_HOB_NSECT = (1 << 5), | |
275 | IDE_TFLAG_OUT_HOB_LBAL = (1 << 6), | |
276 | IDE_TFLAG_OUT_HOB_LBAM = (1 << 7), | |
277 | IDE_TFLAG_OUT_HOB_LBAH = (1 << 8), | |
278 | IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE | | |
279 | IDE_TFLAG_OUT_HOB_NSECT | | |
280 | IDE_TFLAG_OUT_HOB_LBAL | | |
281 | IDE_TFLAG_OUT_HOB_LBAM | | |
282 | IDE_TFLAG_OUT_HOB_LBAH, | |
283 | IDE_TFLAG_OUT_FEATURE = (1 << 9), | |
284 | IDE_TFLAG_OUT_NSECT = (1 << 10), | |
285 | IDE_TFLAG_OUT_LBAL = (1 << 11), | |
286 | IDE_TFLAG_OUT_LBAM = (1 << 12), | |
287 | IDE_TFLAG_OUT_LBAH = (1 << 13), | |
288 | IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE | | |
289 | IDE_TFLAG_OUT_NSECT | | |
290 | IDE_TFLAG_OUT_LBAL | | |
291 | IDE_TFLAG_OUT_LBAM | | |
292 | IDE_TFLAG_OUT_LBAH, | |
293 | IDE_TFLAG_OUT_DEVICE = (1 << 14), | |
294 | IDE_TFLAG_WRITE = (1 << 15), | |
295 | IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16), | |
296 | IDE_TFLAG_IN_DATA = (1 << 17), | |
297 | IDE_TFLAG_CUSTOM_HANDLER = (1 << 18), | |
298 | IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19), | |
299 | IDE_TFLAG_IN_HOB_FEATURE = (1 << 20), | |
300 | IDE_TFLAG_IN_HOB_NSECT = (1 << 21), | |
301 | IDE_TFLAG_IN_HOB_LBAL = (1 << 22), | |
302 | IDE_TFLAG_IN_HOB_LBAM = (1 << 23), | |
303 | IDE_TFLAG_IN_HOB_LBAH = (1 << 24), | |
304 | IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL | | |
305 | IDE_TFLAG_IN_HOB_LBAM | | |
306 | IDE_TFLAG_IN_HOB_LBAH, | |
307 | IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE | | |
308 | IDE_TFLAG_IN_HOB_NSECT | | |
309 | IDE_TFLAG_IN_HOB_LBA, | |
310 | IDE_TFLAG_IN_FEATURE = (1 << 1), | |
311 | IDE_TFLAG_IN_NSECT = (1 << 25), | |
312 | IDE_TFLAG_IN_LBAL = (1 << 26), | |
313 | IDE_TFLAG_IN_LBAM = (1 << 27), | |
314 | IDE_TFLAG_IN_LBAH = (1 << 28), | |
315 | IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL | | |
316 | IDE_TFLAG_IN_LBAM | | |
317 | IDE_TFLAG_IN_LBAH, | |
318 | IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT | | |
319 | IDE_TFLAG_IN_LBA, | |
320 | IDE_TFLAG_IN_DEVICE = (1 << 29), | |
321 | IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB | | |
322 | IDE_TFLAG_IN_HOB, | |
323 | IDE_TFLAG_TF = IDE_TFLAG_OUT_TF | | |
324 | IDE_TFLAG_IN_TF, | |
325 | IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE | | |
326 | IDE_TFLAG_IN_DEVICE, | |
327 | /* force 16-bit I/O operations */ | |
328 | IDE_TFLAG_IO_16BIT = (1 << 30), | |
329 | /* ide_task_t was allocated using kmalloc() */ | |
330 | IDE_TFLAG_DYN = (1 << 31), | |
331 | }; | |
332 | ||
333 | struct ide_taskfile { | |
334 | u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ | |
335 | ||
336 | u8 hob_feature; /* 1-5: additional data to support LBA48 */ | |
337 | u8 hob_nsect; | |
338 | u8 hob_lbal; | |
339 | u8 hob_lbam; | |
340 | u8 hob_lbah; | |
341 | ||
342 | u8 data; /* 6: low data byte (for TASKFILE IOCTL) */ | |
343 | ||
344 | union { /* 7: */ | |
345 | u8 error; /* read: error */ | |
346 | u8 feature; /* write: feature */ | |
347 | }; | |
348 | ||
349 | u8 nsect; /* 8: number of sectors */ | |
350 | u8 lbal; /* 9: LBA low */ | |
351 | u8 lbam; /* 10: LBA mid */ | |
352 | u8 lbah; /* 11: LBA high */ | |
353 | ||
354 | u8 device; /* 12: device select */ | |
355 | ||
356 | union { /* 13: */ | |
357 | u8 status; /* read: status */ | |
358 | u8 command; /* write: command */ | |
359 | }; | |
360 | }; | |
361 | ||
362 | typedef struct ide_task_s { | |
363 | union { | |
364 | struct ide_taskfile tf; | |
365 | u8 tf_array[14]; | |
366 | }; | |
367 | u32 tf_flags; | |
368 | int data_phase; | |
369 | struct request *rq; /* copy of request */ | |
370 | void *special; /* valid_t generally */ | |
371 | } ide_task_t; | |
372 | ||
67c56364 BZ |
373 | /* ATAPI packet command flags */ |
374 | enum { | |
375 | /* set when an error is considered normal - no retry (ide-tape) */ | |
376 | PC_FLAG_ABORT = (1 << 0), | |
377 | PC_FLAG_SUPPRESS_ERROR = (1 << 1), | |
378 | PC_FLAG_WAIT_FOR_DSC = (1 << 2), | |
379 | PC_FLAG_DMA_OK = (1 << 3), | |
380 | PC_FLAG_DMA_IN_PROGRESS = (1 << 4), | |
381 | PC_FLAG_DMA_ERROR = (1 << 5), | |
382 | PC_FLAG_WRITING = (1 << 6), | |
383 | /* command timed out */ | |
384 | PC_FLAG_TIMEDOUT = (1 << 7), | |
385 | }; | |
386 | ||
387 | /* | |
388 | * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes. | |
389 | * This is used for several packet commands (not for READ/WRITE commands). | |
390 | */ | |
391 | #define IDE_PC_BUFFER_SIZE 256 | |
4cad085e | 392 | #define ATAPI_WAIT_PC (60 * HZ) |
67c56364 BZ |
393 | |
394 | struct ide_atapi_pc { | |
395 | /* actual packet bytes */ | |
396 | u8 c[12]; | |
397 | /* incremented on each retry */ | |
398 | int retries; | |
399 | int error; | |
400 | ||
401 | /* bytes to transfer */ | |
402 | int req_xfer; | |
403 | /* bytes actually transferred */ | |
404 | int xferred; | |
405 | ||
406 | /* data buffer */ | |
407 | u8 *buf; | |
408 | /* current buffer position */ | |
409 | u8 *cur_pos; | |
410 | int buf_size; | |
411 | /* missing/available data on the current buffer */ | |
412 | int b_count; | |
413 | ||
414 | /* the corresponding request */ | |
415 | struct request *rq; | |
416 | ||
417 | unsigned long flags; | |
418 | ||
419 | /* | |
420 | * those are more or less driver-specific and some of them are subject | |
421 | * to change/removal later. | |
422 | */ | |
423 | u8 pc_buf[IDE_PC_BUFFER_SIZE]; | |
424 | ||
425 | /* idetape only */ | |
426 | struct idetape_bh *bh; | |
427 | char *b_data; | |
428 | ||
67c56364 BZ |
429 | struct scatterlist *sg; |
430 | unsigned int sg_cnt; | |
431 | ||
67c56364 BZ |
432 | unsigned long timeout; |
433 | }; | |
434 | ||
8185d5aa | 435 | struct ide_devset; |
7f3c868b | 436 | struct ide_driver; |
1da177e4 | 437 | |
e3a59b4d HR |
438 | #ifdef CONFIG_BLK_DEV_IDEACPI |
439 | struct ide_acpi_drive_link; | |
440 | struct ide_acpi_hwif_link; | |
441 | #endif | |
442 | ||
806f80a6 BZ |
443 | struct ide_drive_s; |
444 | ||
445 | struct ide_disk_ops { | |
446 | int (*check)(struct ide_drive_s *, const char *); | |
447 | int (*get_capacity)(struct ide_drive_s *); | |
448 | void (*setup)(struct ide_drive_s *); | |
449 | void (*flush)(struct ide_drive_s *); | |
450 | int (*init_media)(struct ide_drive_s *, struct gendisk *); | |
451 | int (*set_doorlock)(struct ide_drive_s *, struct gendisk *, | |
452 | int); | |
453 | ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *, | |
454 | sector_t); | |
455 | int (*end_request)(struct ide_drive_s *, int, int); | |
badf8082 AV |
456 | int (*ioctl)(struct ide_drive_s *, struct block_device *, |
457 | fmode_t, unsigned int, unsigned long); | |
806f80a6 BZ |
458 | }; |
459 | ||
3b8ac539 BP |
460 | /* ATAPI device flags */ |
461 | enum { | |
462 | IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), | |
0578042d BZ |
463 | |
464 | /* ide-cd */ | |
3b8ac539 | 465 | /* Drive cannot eject the disc. */ |
bf64741f | 466 | IDE_AFLAG_NO_EJECT = (1 << 1), |
3b8ac539 | 467 | /* Drive is a pre ATAPI 1.2 drive. */ |
bf64741f | 468 | IDE_AFLAG_PRE_ATAPI12 = (1 << 2), |
3b8ac539 | 469 | /* TOC addresses are in BCD. */ |
bf64741f | 470 | IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3), |
3b8ac539 | 471 | /* TOC track numbers are in BCD. */ |
bf64741f | 472 | IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4), |
3b8ac539 BP |
473 | /* |
474 | * Drive does not provide data in multiples of SECTOR_SIZE | |
475 | * when more than one interrupt is needed. | |
476 | */ | |
bf64741f | 477 | IDE_AFLAG_LIMIT_NFRAMES = (1 << 5), |
3b8ac539 | 478 | /* Saved TOC information is current. */ |
bf64741f | 479 | IDE_AFLAG_TOC_VALID = (1 << 6), |
3b8ac539 | 480 | /* We think that the drive door is locked. */ |
bf64741f | 481 | IDE_AFLAG_DOOR_LOCKED = (1 << 7), |
3b8ac539 | 482 | /* SET_CD_SPEED command is unsupported. */ |
bf64741f BP |
483 | IDE_AFLAG_NO_SPEED_SELECT = (1 << 8), |
484 | IDE_AFLAG_VERTOS_300_SSD = (1 << 9), | |
485 | IDE_AFLAG_VERTOS_600_ESD = (1 << 10), | |
486 | IDE_AFLAG_SANYO_3CD = (1 << 11), | |
487 | IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12), | |
488 | IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13), | |
489 | IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14), | |
3b8ac539 BP |
490 | |
491 | /* ide-floppy */ | |
3b8ac539 | 492 | /* Avoid commands not supported in Clik drive */ |
bf64741f | 493 | IDE_AFLAG_CLIK_DRIVE = (1 << 15), |
3b8ac539 | 494 | /* Requires BH algorithm for packets */ |
bf64741f | 495 | IDE_AFLAG_ZIP_DRIVE = (1 << 16), |
49cac39e | 496 | /* Supports format progress report */ |
bf64741f | 497 | IDE_AFLAG_SRFP = (1 << 17), |
3b8ac539 BP |
498 | |
499 | /* ide-tape */ | |
bf64741f | 500 | IDE_AFLAG_IGNORE_DSC = (1 << 18), |
3b8ac539 | 501 | /* 0 When the tape position is unknown */ |
bf64741f | 502 | IDE_AFLAG_ADDRESS_VALID = (1 << 19), |
3b8ac539 | 503 | /* Device already opened */ |
bf64741f | 504 | IDE_AFLAG_BUSY = (1 << 20), |
3b8ac539 | 505 | /* Attempt to auto-detect the current user block size */ |
bf64741f | 506 | IDE_AFLAG_DETECT_BS = (1 << 21), |
3b8ac539 | 507 | /* Currently on a filemark */ |
bf64741f | 508 | IDE_AFLAG_FILEMARK = (1 << 22), |
3b8ac539 | 509 | /* 0 = no tape is loaded, so we don't rewind after ejecting */ |
bf64741f | 510 | IDE_AFLAG_MEDIUM_PRESENT = (1 << 23), |
f20f2586 | 511 | |
bf64741f | 512 | IDE_AFLAG_NO_AUTOCLOSE = (1 << 24), |
3b8ac539 BP |
513 | }; |
514 | ||
97100fc8 BZ |
515 | /* device flags */ |
516 | enum { | |
517 | /* restore settings after device reset */ | |
518 | IDE_DFLAG_KEEP_SETTINGS = (1 << 0), | |
519 | /* device is using DMA for read/write */ | |
520 | IDE_DFLAG_USING_DMA = (1 << 1), | |
521 | /* okay to unmask other IRQs */ | |
522 | IDE_DFLAG_UNMASK = (1 << 2), | |
523 | /* don't attempt flushes */ | |
524 | IDE_DFLAG_NOFLUSH = (1 << 3), | |
525 | /* DSC overlap */ | |
526 | IDE_DFLAG_DSC_OVERLAP = (1 << 4), | |
527 | /* give potential excess bandwidth */ | |
528 | IDE_DFLAG_NICE1 = (1 << 5), | |
529 | /* device is physically present */ | |
530 | IDE_DFLAG_PRESENT = (1 << 6), | |
531 | /* device ejected hint */ | |
532 | IDE_DFLAG_DEAD = (1 << 7), | |
533 | /* id read from device (synthetic if not set) */ | |
534 | IDE_DFLAG_ID_READ = (1 << 8), | |
535 | IDE_DFLAG_NOPROBE = (1 << 9), | |
536 | /* need to do check_media_change() */ | |
537 | IDE_DFLAG_REMOVABLE = (1 << 10), | |
538 | /* needed for removable devices */ | |
539 | IDE_DFLAG_ATTACH = (1 << 11), | |
540 | IDE_DFLAG_FORCED_GEOM = (1 << 12), | |
541 | /* disallow setting unmask bit */ | |
542 | IDE_DFLAG_NO_UNMASK = (1 << 13), | |
543 | /* disallow enabling 32-bit I/O */ | |
544 | IDE_DFLAG_NO_IO_32BIT = (1 << 14), | |
545 | /* for removable only: door lock/unlock works */ | |
546 | IDE_DFLAG_DOORLOCKING = (1 << 15), | |
547 | /* disallow DMA */ | |
548 | IDE_DFLAG_NODMA = (1 << 16), | |
549 | /* powermanagment told us not to do anything, so sleep nicely */ | |
550 | IDE_DFLAG_BLOCKED = (1 << 17), | |
97100fc8 | 551 | /* sleeping & sleep field valid */ |
5317464d BP |
552 | IDE_DFLAG_SLEEPING = (1 << 18), |
553 | IDE_DFLAG_POST_RESET = (1 << 19), | |
554 | IDE_DFLAG_UDMA33_WARNED = (1 << 20), | |
555 | IDE_DFLAG_LBA48 = (1 << 21), | |
97100fc8 | 556 | /* status of write cache */ |
5317464d | 557 | IDE_DFLAG_WCACHE = (1 << 22), |
97100fc8 | 558 | /* used for ignoring ATA_DF */ |
5317464d | 559 | IDE_DFLAG_NOWERR = (1 << 23), |
c3922048 | 560 | /* retrying in PIO */ |
5317464d BP |
561 | IDE_DFLAG_DMA_PIO_RETRY = (1 << 24), |
562 | IDE_DFLAG_LBA = (1 << 25), | |
4abdc6ee | 563 | /* don't unload heads */ |
5317464d | 564 | IDE_DFLAG_NO_UNLOAD = (1 << 26), |
4abdc6ee | 565 | /* heads unloaded, please don't reset port */ |
5317464d BP |
566 | IDE_DFLAG_PARKED = (1 << 27), |
567 | IDE_DFLAG_MEDIA_CHANGED = (1 << 28), | |
da167876 | 568 | /* write protect */ |
5317464d BP |
569 | IDE_DFLAG_WP = (1 << 29), |
570 | IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30), | |
97100fc8 BZ |
571 | }; |
572 | ||
d7c26ebb | 573 | struct ide_drive_s { |
1da177e4 LT |
574 | char name[4]; /* drive name, such as "hda" */ |
575 | char driver_req[10]; /* requests specific driver */ | |
576 | ||
165125e1 | 577 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
578 | |
579 | struct request *rq; /* current request */ | |
1da177e4 | 580 | void *driver_data; /* extra driver data */ |
48fb2688 | 581 | u16 *id; /* identification info */ |
7662d046 | 582 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 583 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
92f1f8fd | 584 | const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */ |
7662d046 | 585 | #endif |
1da177e4 LT |
586 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
587 | ||
806f80a6 BZ |
588 | const struct ide_disk_ops *disk_ops; |
589 | ||
97100fc8 BZ |
590 | unsigned long dev_flags; |
591 | ||
1da177e4 | 592 | unsigned long sleep; /* sleep until this time */ |
1da177e4 LT |
593 | unsigned long timeout; /* max time to wait for irq */ |
594 | ||
595 | special_t special; /* special action flags */ | |
1da177e4 | 596 | |
7f612f27 | 597 | u8 select; /* basic drive/head select reg value */ |
1da177e4 | 598 | u8 retry_pio; /* retrying dma capable host in pio */ |
1da177e4 | 599 | u8 waiting_for_dma; /* dma currently in progress */ |
0a9b6f88 | 600 | u8 dma; /* atapi dma flag */ |
1da177e4 | 601 | |
1da177e4 LT |
602 | u8 quirk_list; /* considered quirky, set for a specific host */ |
603 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 604 | u8 current_speed; /* current transfer rate set */ |
513daadd | 605 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 | 606 | u8 dn; /* now wide spread use */ |
1da177e4 LT |
607 | u8 acoustic; /* acoustic management */ |
608 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
1da177e4 LT |
609 | u8 ready_stat; /* min status value for drive ready */ |
610 | u8 mult_count; /* current multiple sector setting */ | |
611 | u8 mult_req; /* requested multiple sector setting */ | |
1da177e4 | 612 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ |
3a7d2484 | 613 | u8 bad_wstat; /* used for ignoring ATA_DF */ |
1da177e4 LT |
614 | u8 head; /* "real" number of heads */ |
615 | u8 sect; /* "real" sectors per track */ | |
616 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
617 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
618 | ||
baf08f0b BZ |
619 | /* delay this long before sending packet command */ |
620 | u8 pc_delay; | |
621 | ||
1da177e4 LT |
622 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ |
623 | unsigned int cyl; /* "real" number of cyls */ | |
26bcb879 | 624 | unsigned int drive_data; /* used by set_pio_mode/selectproc */ |
1da177e4 LT |
625 | unsigned int failures; /* current failure count */ |
626 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 627 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
628 | |
629 | u64 capacity64; /* total number of sectors */ | |
630 | ||
631 | int lun; /* logical unit */ | |
632 | int crc_count; /* crc counter to reduce drive speed */ | |
b22b2ca4 BP |
633 | |
634 | unsigned long debug_mask; /* debugging levels switch */ | |
635 | ||
e3a59b4d HR |
636 | #ifdef CONFIG_BLK_DEV_IDEACPI |
637 | struct ide_acpi_drive_link *acpidata; | |
638 | #endif | |
1da177e4 LT |
639 | struct list_head list; |
640 | struct device gendev; | |
f36d4024 | 641 | struct completion gendev_rel_comp; /* to deal with device release() */ |
d7c26ebb | 642 | |
2b9efba4 BZ |
643 | /* current packet command */ |
644 | struct ide_atapi_pc *pc; | |
645 | ||
d7c26ebb | 646 | /* callback for packet commands */ |
b14c7212 | 647 | void (*pc_callback)(struct ide_drive_s *, int); |
3b8ac539 | 648 | |
85e39035 BZ |
649 | void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *); |
650 | int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *, | |
651 | unsigned int, int); | |
652 | ||
d6251d44 BP |
653 | ide_startstop_t (*irq_handler)(struct ide_drive_s *); |
654 | ||
3b8ac539 | 655 | unsigned long atapi_flags; |
67c56364 BZ |
656 | |
657 | struct ide_atapi_pc request_sense_pc; | |
658 | struct request request_sense_rq; | |
d7c26ebb BP |
659 | }; |
660 | ||
661 | typedef struct ide_drive_s ide_drive_t; | |
1da177e4 | 662 | |
5aeddf90 BP |
663 | #define to_ide_device(dev) container_of(dev, ide_drive_t, gendev) |
664 | ||
665 | #define to_ide_drv(obj, cont_type) \ | |
8fed4368 | 666 | container_of(obj, struct cont_type, dev) |
5aeddf90 BP |
667 | |
668 | #define ide_drv_g(disk, cont_type) \ | |
669 | container_of((disk)->private_data, struct cont_type, driver) | |
8604affd | 670 | |
039788e1 | 671 | struct ide_port_info; |
1da177e4 | 672 | |
374e042c BZ |
673 | struct ide_tp_ops { |
674 | void (*exec_command)(struct hwif_s *, u8); | |
675 | u8 (*read_status)(struct hwif_s *); | |
676 | u8 (*read_altstatus)(struct hwif_s *); | |
374e042c BZ |
677 | |
678 | void (*set_irq)(struct hwif_s *, int); | |
679 | ||
680 | void (*tf_load)(ide_drive_t *, struct ide_task_s *); | |
681 | void (*tf_read)(ide_drive_t *, struct ide_task_s *); | |
682 | ||
683 | void (*input_data)(ide_drive_t *, struct request *, void *, | |
684 | unsigned int); | |
685 | void (*output_data)(ide_drive_t *, struct request *, void *, | |
686 | unsigned int); | |
687 | }; | |
688 | ||
689 | extern const struct ide_tp_ops default_tp_ops; | |
690 | ||
39b986a6 BZ |
691 | /** |
692 | * struct ide_port_ops - IDE port operations | |
693 | * | |
694 | * @init_dev: host specific initialization of a device | |
695 | * @set_pio_mode: routine to program host for PIO mode | |
696 | * @set_dma_mode: routine to program host for DMA mode | |
697 | * @selectproc: tweaks hardware to select drive | |
698 | * @reset_poll: chipset polling based on hba specifics | |
699 | * @pre_reset: chipset specific changes to default for device-hba resets | |
700 | * @resetproc: routine to reset controller after a disk reset | |
701 | * @maskproc: special host masking for drive selection | |
702 | * @quirkproc: check host's drive quirk list | |
bfa7d8e5 | 703 | * @clear_irq: clear IRQ |
39b986a6 BZ |
704 | * |
705 | * @mdma_filter: filter MDMA modes | |
706 | * @udma_filter: filter UDMA modes | |
707 | * | |
708 | * @cable_detect: detect cable type | |
709 | */ | |
ac95beed | 710 | struct ide_port_ops { |
e6d95bd1 | 711 | void (*init_dev)(ide_drive_t *); |
ac95beed | 712 | void (*set_pio_mode)(ide_drive_t *, const u8); |
ac95beed | 713 | void (*set_dma_mode)(ide_drive_t *, const u8); |
ac95beed | 714 | void (*selectproc)(ide_drive_t *); |
ac95beed | 715 | int (*reset_poll)(ide_drive_t *); |
ac95beed | 716 | void (*pre_reset)(ide_drive_t *); |
ac95beed | 717 | void (*resetproc)(ide_drive_t *); |
ac95beed | 718 | void (*maskproc)(ide_drive_t *, int); |
ac95beed | 719 | void (*quirkproc)(ide_drive_t *); |
bfa7d8e5 | 720 | void (*clear_irq)(ide_drive_t *); |
ac95beed BZ |
721 | |
722 | u8 (*mdma_filter)(ide_drive_t *); | |
723 | u8 (*udma_filter)(ide_drive_t *); | |
724 | ||
725 | u8 (*cable_detect)(struct hwif_s *); | |
726 | }; | |
727 | ||
5e37bdc0 BZ |
728 | struct ide_dma_ops { |
729 | void (*dma_host_set)(struct ide_drive_s *, int); | |
730 | int (*dma_setup)(struct ide_drive_s *); | |
731 | void (*dma_exec_cmd)(struct ide_drive_s *, u8); | |
732 | void (*dma_start)(struct ide_drive_s *); | |
733 | int (*dma_end)(struct ide_drive_s *); | |
734 | int (*dma_test_irq)(struct ide_drive_s *); | |
735 | void (*dma_lost_irq)(struct ide_drive_s *); | |
736 | void (*dma_timeout)(struct ide_drive_s *); | |
592b5315 SS |
737 | /* |
738 | * The following method is optional and only required to be | |
739 | * implemented for the SFF-8038i compatible controllers. | |
740 | */ | |
741 | u8 (*dma_sff_read_status)(struct hwif_s *); | |
5e37bdc0 BZ |
742 | }; |
743 | ||
08da591e BZ |
744 | struct ide_host; |
745 | ||
1da177e4 | 746 | typedef struct hwif_s { |
1da177e4 | 747 | struct hwif_s *mate; /* other hwif from same PCI chip */ |
1da177e4 LT |
748 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
749 | ||
08da591e BZ |
750 | struct ide_host *host; |
751 | ||
1da177e4 LT |
752 | char name[6]; /* name of interface, eg. "ide0" */ |
753 | ||
4c3032d8 BZ |
754 | struct ide_io_ports io_ports; |
755 | ||
1da177e4 | 756 | unsigned long sata_scr[SATA_NR_PORTS]; |
1da177e4 | 757 | |
2bd24a1c | 758 | ide_drive_t *devices[MAX_DRIVES + 1]; |
1da177e4 LT |
759 | |
760 | u8 major; /* our major number */ | |
761 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
762 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
1da177e4 | 763 | |
e95d9c6b | 764 | u32 host_flags; |
6a824c92 | 765 | |
4099d143 BZ |
766 | u8 pio_mask; |
767 | ||
1da177e4 LT |
768 | u8 ultra_mask; |
769 | u8 mwdma_mask; | |
770 | u8 swdma_mask; | |
771 | ||
49521f97 BZ |
772 | u8 cbl; /* cable type */ |
773 | ||
1da177e4 LT |
774 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
775 | ||
36501650 BZ |
776 | struct device *dev; |
777 | ||
18e181fe BZ |
778 | ide_ack_intr_t *ack_intr; |
779 | ||
1da177e4 LT |
780 | void (*rw_disk)(ide_drive_t *, struct request *); |
781 | ||
374e042c | 782 | const struct ide_tp_ops *tp_ops; |
ac95beed | 783 | const struct ide_port_ops *port_ops; |
f37afdac | 784 | const struct ide_dma_ops *dma_ops; |
bfa14b42 | 785 | |
1da177e4 LT |
786 | /* dma physical region descriptor table (cpu view) */ |
787 | unsigned int *dmatable_cpu; | |
788 | /* dma physical region descriptor table (dma view) */ | |
789 | dma_addr_t dmatable_dma; | |
2bbd57ca BZ |
790 | |
791 | /* maximum number of PRD table entries */ | |
792 | int prd_max_nents; | |
793 | /* PRD entry size in bytes */ | |
794 | int prd_ent_size; | |
795 | ||
1da177e4 LT |
796 | /* Scatter-gather list used to build the above */ |
797 | struct scatterlist *sg_table; | |
798 | int sg_max_nents; /* Maximum number of entries in it */ | |
799 | int sg_nents; /* Current number of entries in it */ | |
800 | int sg_dma_direction; /* dma transfer direction */ | |
801 | ||
802 | /* data phase of the active command (currently only valid for PIO/DMA) */ | |
803 | int data_phase; | |
804 | ||
d6ff9f64 BZ |
805 | struct ide_task_s task; /* current command */ |
806 | ||
1da177e4 LT |
807 | unsigned int nsect; |
808 | unsigned int nleft; | |
55c16a70 | 809 | struct scatterlist *cursg; |
1da177e4 LT |
810 | unsigned int cursg_ofs; |
811 | ||
1da177e4 LT |
812 | int rqsize; /* max sectors per request */ |
813 | int irq; /* our irq number */ | |
814 | ||
1da177e4 | 815 | unsigned long dma_base; /* base addr for dma ports */ |
1da177e4 | 816 | |
1da177e4 LT |
817 | unsigned long config_data; /* for use by chipset-specific code */ |
818 | unsigned long select_data; /* for use by chipset-specific code */ | |
819 | ||
020e322d SS |
820 | unsigned long extra_base; /* extra addr for dma ports */ |
821 | unsigned extra_ports; /* number of extra dma ports */ | |
822 | ||
1da177e4 | 823 | unsigned present : 1; /* this interface exists */ |
5b31f855 | 824 | unsigned busy : 1; /* serializes devices on a port */ |
1da177e4 | 825 | |
f74c9141 BZ |
826 | struct device gendev; |
827 | struct device *portdev; | |
828 | ||
f36d4024 | 829 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
830 | |
831 | void *hwif_data; /* extra hwif data */ | |
832 | ||
e3a59b4d HR |
833 | #ifdef CONFIG_BLK_DEV_IDEACPI |
834 | struct ide_acpi_hwif_link *acpidata; | |
835 | #endif | |
b65fac32 BZ |
836 | |
837 | /* IRQ handler, if active */ | |
838 | ide_startstop_t (*handler)(ide_drive_t *); | |
839 | ||
840 | /* BOOL: polling active & poll_timeout field valid */ | |
841 | unsigned int polling : 1; | |
842 | ||
843 | /* current drive */ | |
844 | ide_drive_t *cur_dev; | |
845 | ||
846 | /* current request */ | |
847 | struct request *rq; | |
848 | ||
849 | /* failsafe timer */ | |
850 | struct timer_list timer; | |
851 | /* timeout value during long polls */ | |
852 | unsigned long poll_timeout; | |
853 | /* queried upon timeouts */ | |
854 | int (*expiry)(ide_drive_t *); | |
855 | ||
856 | int req_gen; | |
857 | int req_gen_timer; | |
858 | ||
859 | spinlock_t lock; | |
22fc6ecc | 860 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 | 861 | |
a36223b0 BZ |
862 | #define MAX_HOST_PORTS 4 |
863 | ||
48c3c107 | 864 | struct ide_host { |
2bd24a1c | 865 | ide_hwif_t *ports[MAX_HOST_PORTS + 1]; |
48c3c107 | 866 | unsigned int n_ports; |
6cdf6eb3 | 867 | struct device *dev[2]; |
feb22b7f | 868 | unsigned int (*init_chipset)(struct pci_dev *); |
849d7130 | 869 | irq_handler_t irq_handler; |
ef0b0427 | 870 | unsigned long host_flags; |
6cdf6eb3 | 871 | void *host_priv; |
bd53cbcc | 872 | ide_hwif_t *cur_port; /* for hosts requiring serialization */ |
5b31f855 BZ |
873 | |
874 | /* used for hosts requiring serialization */ | |
e720b9e4 | 875 | volatile unsigned long host_busy; |
48c3c107 BZ |
876 | }; |
877 | ||
5b31f855 BZ |
878 | #define IDE_HOST_BUSY 0 |
879 | ||
1da177e4 LT |
880 | /* |
881 | * internal ide interrupt handler type | |
882 | */ | |
1da177e4 LT |
883 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); |
884 | typedef int (ide_expiry_t)(ide_drive_t *); | |
885 | ||
0eea6458 | 886 | /* used by ide-cd, ide-floppy, etc. */ |
9567b349 | 887 | typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned); |
0eea6458 | 888 | |
f9383c42 | 889 | extern struct mutex ide_setting_mtx; |
1da177e4 | 890 | |
92f1f8fd EO |
891 | /* |
892 | * configurable drive settings | |
893 | */ | |
894 | ||
895 | #define DS_SYNC (1 << 0) | |
896 | ||
897 | struct ide_devset { | |
898 | int (*get)(ide_drive_t *); | |
899 | int (*set)(ide_drive_t *, int); | |
900 | unsigned int flags; | |
901 | }; | |
902 | ||
903 | #define __DEVSET(_flags, _get, _set) { \ | |
904 | .flags = _flags, \ | |
905 | .get = _get, \ | |
906 | .set = _set, \ | |
907 | } | |
7662d046 | 908 | |
8185d5aa | 909 | #define ide_devset_get(name, field) \ |
92f1f8fd | 910 | static int get_##name(ide_drive_t *drive) \ |
8185d5aa BZ |
911 | { \ |
912 | return drive->field; \ | |
913 | } | |
914 | ||
915 | #define ide_devset_set(name, field) \ | |
92f1f8fd | 916 | static int set_##name(ide_drive_t *drive, int arg) \ |
8185d5aa BZ |
917 | { \ |
918 | drive->field = arg; \ | |
919 | return 0; \ | |
920 | } | |
921 | ||
97100fc8 BZ |
922 | #define ide_devset_get_flag(name, flag) \ |
923 | static int get_##name(ide_drive_t *drive) \ | |
924 | { \ | |
925 | return !!(drive->dev_flags & flag); \ | |
926 | } | |
927 | ||
928 | #define ide_devset_set_flag(name, flag) \ | |
929 | static int set_##name(ide_drive_t *drive, int arg) \ | |
930 | { \ | |
931 | if (arg) \ | |
932 | drive->dev_flags |= flag; \ | |
933 | else \ | |
934 | drive->dev_flags &= ~flag; \ | |
935 | return 0; \ | |
936 | } | |
937 | ||
92f1f8fd EO |
938 | #define __IDE_DEVSET(_name, _flags, _get, _set) \ |
939 | const struct ide_devset ide_devset_##_name = \ | |
940 | __DEVSET(_flags, _get, _set) | |
941 | ||
942 | #define IDE_DEVSET(_name, _flags, _get, _set) \ | |
943 | static __IDE_DEVSET(_name, _flags, _get, _set) | |
944 | ||
945 | #define ide_devset_rw(_name, _func) \ | |
946 | IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
947 | ||
948 | #define ide_devset_w(_name, _func) \ | |
949 | IDE_DEVSET(_name, 0, NULL, set_##_func) | |
950 | ||
f8790489 BZ |
951 | #define ide_ext_devset_rw(_name, _func) \ |
952 | __IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
953 | ||
954 | #define ide_ext_devset_rw_sync(_name, _func) \ | |
955 | __IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func) | |
92f1f8fd EO |
956 | |
957 | #define ide_decl_devset(_name) \ | |
958 | extern const struct ide_devset ide_devset_##_name | |
959 | ||
960 | ide_decl_devset(io_32bit); | |
961 | ide_decl_devset(keepsettings); | |
962 | ide_decl_devset(pio_mode); | |
963 | ide_decl_devset(unmaskirq); | |
964 | ide_decl_devset(using_dma); | |
965 | ||
7662d046 | 966 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 967 | /* |
92f1f8fd | 968 | * /proc/ide interface |
1da177e4 LT |
969 | */ |
970 | ||
92f1f8fd EO |
971 | #define ide_devset_rw_field(_name, _field) \ |
972 | ide_devset_get(_name, _field); \ | |
973 | ide_devset_set(_name, _field); \ | |
974 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
975 | ||
97100fc8 BZ |
976 | #define ide_devset_rw_flag(_name, _field) \ |
977 | ide_devset_get_flag(_name, _field); \ | |
978 | ide_devset_set_flag(_name, _field); \ | |
979 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
980 | ||
92f1f8fd EO |
981 | struct ide_proc_devset { |
982 | const char *name; | |
983 | const struct ide_devset *setting; | |
984 | int min, max; | |
985 | int (*mulf)(ide_drive_t *); | |
986 | int (*divf)(ide_drive_t *); | |
8185d5aa BZ |
987 | }; |
988 | ||
92f1f8fd EO |
989 | #define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \ |
990 | .name = __stringify(_name), \ | |
991 | .setting = &ide_devset_##_name, \ | |
992 | .min = _min, \ | |
993 | .max = _max, \ | |
994 | .mulf = _mulf, \ | |
995 | .divf = _divf, \ | |
8185d5aa BZ |
996 | } |
997 | ||
92f1f8fd EO |
998 | #define IDE_PROC_DEVSET(_name, _min, _max) \ |
999 | __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL) | |
8185d5aa | 1000 | |
1da177e4 LT |
1001 | typedef struct { |
1002 | const char *name; | |
1003 | mode_t mode; | |
1004 | read_proc_t *read_proc; | |
1005 | write_proc_t *write_proc; | |
1006 | } ide_proc_entry_t; | |
1007 | ||
ecfd80e4 BZ |
1008 | void proc_ide_create(void); |
1009 | void proc_ide_destroy(void); | |
5cbf79cd | 1010 | void ide_proc_register_port(ide_hwif_t *); |
d9270a3f | 1011 | void ide_proc_port_register_devices(ide_hwif_t *); |
5b0c4b30 | 1012 | void ide_proc_unregister_device(ide_drive_t *); |
5cbf79cd | 1013 | void ide_proc_unregister_port(ide_hwif_t *); |
7f3c868b BZ |
1014 | void ide_proc_register_driver(ide_drive_t *, struct ide_driver *); |
1015 | void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *); | |
7662d046 | 1016 | |
1da177e4 LT |
1017 | read_proc_t proc_ide_read_capacity; |
1018 | read_proc_t proc_ide_read_geometry; | |
1019 | ||
1da177e4 LT |
1020 | /* |
1021 | * Standard exit stuff: | |
1022 | */ | |
1023 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
1024 | { \ | |
1025 | len -= off; \ | |
1026 | if (len < count) { \ | |
1027 | *eof = 1; \ | |
1028 | if (len <= 0) \ | |
1029 | return 0; \ | |
1030 | } else \ | |
1031 | len = count; \ | |
1032 | *start = page + off; \ | |
1033 | return len; \ | |
1034 | } | |
1035 | #else | |
ecfd80e4 BZ |
1036 | static inline void proc_ide_create(void) { ; } |
1037 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd | 1038 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
d9270a3f | 1039 | static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } |
5b0c4b30 | 1040 | static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } |
5cbf79cd | 1041 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } |
7f3c868b BZ |
1042 | static inline void ide_proc_register_driver(ide_drive_t *drive, |
1043 | struct ide_driver *driver) { ; } | |
1044 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, | |
1045 | struct ide_driver *driver) { ; } | |
1da177e4 LT |
1046 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
1047 | #endif | |
1048 | ||
e1c7c464 BP |
1049 | enum { |
1050 | /* enter/exit functions */ | |
1051 | IDE_DBG_FUNC = (1 << 0), | |
1052 | /* sense key/asc handling */ | |
1053 | IDE_DBG_SENSE = (1 << 1), | |
1054 | /* packet commands handling */ | |
1055 | IDE_DBG_PC = (1 << 2), | |
1056 | /* request handling */ | |
1057 | IDE_DBG_RQ = (1 << 3), | |
1058 | /* driver probing/setup */ | |
1059 | IDE_DBG_PROBE = (1 << 4), | |
1060 | }; | |
1061 | ||
1062 | /* DRV_NAME has to be defined in the driver before using the macro below */ | |
1063 | #define __ide_debug_log(lvl, fmt, args...) \ | |
1064 | { \ | |
1065 | if (unlikely(drive->debug_mask & lvl)) \ | |
1066 | printk(KERN_INFO DRV_NAME ": " fmt, ## args); \ | |
1067 | } | |
1068 | ||
1da177e4 | 1069 | /* |
0d346ba0 | 1070 | * Power Management state machine (rq->pm->pm_step). |
1da177e4 | 1071 | * |
0d346ba0 | 1072 | * For each step, the core calls ide_start_power_step() first. |
1da177e4 LT |
1073 | * This can return: |
1074 | * - ide_stopped : In this case, the core calls us back again unless | |
1075 | * step have been set to ide_power_state_completed. | |
1076 | * - ide_started : In this case, the channel is left busy until an | |
1077 | * async event (interrupt) occurs. | |
0d346ba0 | 1078 | * Typically, ide_start_power_step() will issue a taskfile request with |
1da177e4 LT |
1079 | * do_rw_taskfile(). |
1080 | * | |
0d346ba0 | 1081 | * Upon reception of the interrupt, the core will call ide_complete_power_step() |
1da177e4 LT |
1082 | * with the error code if any. This routine should update the step value |
1083 | * and return. It should not start a new request. The core will call | |
0d346ba0 BZ |
1084 | * ide_start_power_step() for the new step value, unless step have been |
1085 | * set to IDE_PM_COMPLETED. | |
1da177e4 | 1086 | */ |
1da177e4 | 1087 | enum { |
0d346ba0 BZ |
1088 | IDE_PM_START_SUSPEND, |
1089 | IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND, | |
1090 | IDE_PM_STANDBY, | |
1091 | ||
1092 | IDE_PM_START_RESUME, | |
1093 | IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME, | |
1094 | IDE_PM_IDLE, | |
1095 | IDE_PM_RESTORE_DMA, | |
1096 | ||
1097 | IDE_PM_COMPLETED, | |
1da177e4 LT |
1098 | }; |
1099 | ||
e2984c62 BZ |
1100 | int generic_ide_suspend(struct device *, pm_message_t); |
1101 | int generic_ide_resume(struct device *); | |
1102 | ||
1103 | void ide_complete_power_step(ide_drive_t *, struct request *); | |
1104 | ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *); | |
1105 | void ide_complete_pm_request(ide_drive_t *, struct request *); | |
1106 | void ide_check_pm_state(ide_drive_t *, struct request *); | |
1107 | ||
1da177e4 LT |
1108 | /* |
1109 | * Subdrivers support. | |
4ef3b8f4 LR |
1110 | * |
1111 | * The gendriver.owner field should be set to the module owner of this driver. | |
1112 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 1113 | */ |
7f3c868b | 1114 | struct ide_driver { |
1da177e4 | 1115 | const char *version; |
1da177e4 LT |
1116 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
1117 | int (*end_request)(ide_drive_t *, int, int); | |
1da177e4 | 1118 | struct device_driver gen_driver; |
4031bbe4 RK |
1119 | int (*probe)(ide_drive_t *); |
1120 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 1121 | void (*resume)(ide_drive_t *); |
4031bbe4 | 1122 | void (*shutdown)(ide_drive_t *); |
7662d046 | 1123 | #ifdef CONFIG_IDE_PROC_FS |
79cb3803 BZ |
1124 | ide_proc_entry_t * (*proc_entries)(ide_drive_t *); |
1125 | const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *); | |
7662d046 BZ |
1126 | #endif |
1127 | }; | |
1da177e4 | 1128 | |
7f3c868b | 1129 | #define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver) |
4031bbe4 | 1130 | |
08da591e BZ |
1131 | int ide_device_get(ide_drive_t *); |
1132 | void ide_device_put(ide_drive_t *); | |
1133 | ||
aa768773 BZ |
1134 | struct ide_ioctl_devset { |
1135 | unsigned int get_ioctl; | |
1136 | unsigned int set_ioctl; | |
92f1f8fd | 1137 | const struct ide_devset *setting; |
aa768773 BZ |
1138 | }; |
1139 | ||
1140 | int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, | |
1141 | unsigned long, const struct ide_ioctl_devset *); | |
1142 | ||
1bddd9e6 | 1143 | int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long); |
1da177e4 | 1144 | |
ebae41a5 BZ |
1145 | extern int ide_vlb_clk; |
1146 | extern int ide_pci_clk; | |
1147 | ||
1da177e4 | 1148 | extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); |
dbe217af AC |
1149 | int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, |
1150 | int uptodate, int nr_sectors); | |
1da177e4 | 1151 | |
1da177e4 LT |
1152 | extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); |
1153 | ||
cd2a2d96 BZ |
1154 | void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int, |
1155 | ide_expiry_t *); | |
1da177e4 | 1156 | |
1fc14258 BZ |
1157 | void ide_execute_pkt_cmd(ide_drive_t *); |
1158 | ||
9f87abe8 BZ |
1159 | void ide_pad_transfer(ide_drive_t *, int, int); |
1160 | ||
9892ec54 | 1161 | ide_startstop_t ide_error(ide_drive_t *, const char *, u8); |
1da177e4 | 1162 | |
4dde4492 | 1163 | void ide_fix_driveid(u16 *); |
01745112 | 1164 | |
1da177e4 LT |
1165 | extern void ide_fixstring(u8 *, const int, const int); |
1166 | ||
b163f46d BZ |
1167 | int ide_busy_sleep(ide_hwif_t *, unsigned long, int); |
1168 | ||
74af21cf | 1169 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 1170 | |
1da177e4 LT |
1171 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
1172 | ||
92f1f8fd EO |
1173 | extern int ide_devset_execute(ide_drive_t *drive, |
1174 | const struct ide_devset *setting, int arg); | |
1175 | ||
63f5abb0 | 1176 | extern void ide_do_drive_cmd(ide_drive_t *, struct request *); |
1da177e4 | 1177 | |
1da177e4 LT |
1178 | extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); |
1179 | ||
089c5c7e | 1180 | void ide_tf_dump(const char *, struct ide_taskfile *); |
1da177e4 | 1181 | |
374e042c BZ |
1182 | void ide_exec_command(ide_hwif_t *, u8); |
1183 | u8 ide_read_status(ide_hwif_t *); | |
1184 | u8 ide_read_altstatus(ide_hwif_t *); | |
374e042c BZ |
1185 | |
1186 | void ide_set_irq(ide_hwif_t *, int); | |
1187 | ||
1188 | void ide_tf_load(ide_drive_t *, ide_task_t *); | |
1189 | void ide_tf_read(ide_drive_t *, ide_task_t *); | |
1190 | ||
1191 | void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int); | |
1192 | void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int); | |
1193 | ||
acaa0f5f BZ |
1194 | int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int); |
1195 | ||
1da177e4 | 1196 | extern void SELECT_DRIVE(ide_drive_t *); |
ed4af48f | 1197 | void SELECT_MASK(ide_drive_t *, int); |
1da177e4 | 1198 | |
92eb4380 | 1199 | u8 ide_read_error(ide_drive_t *); |
1823649b | 1200 | void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *); |
92eb4380 | 1201 | |
1da177e4 | 1202 | extern int drive_is_ready(ide_drive_t *); |
1da177e4 | 1203 | |
2fc57388 BZ |
1204 | void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8); |
1205 | ||
51509eec BZ |
1206 | int ide_check_atapi_device(ide_drive_t *, const char *); |
1207 | ||
7bf7420a BZ |
1208 | void ide_init_pc(struct ide_atapi_pc *); |
1209 | ||
4abdc6ee EO |
1210 | /* Disk head parking */ |
1211 | extern wait_queue_head_t ide_park_wq; | |
1212 | ssize_t ide_park_show(struct device *dev, struct device_attribute *attr, | |
1213 | char *buf); | |
1214 | ssize_t ide_park_store(struct device *dev, struct device_attribute *attr, | |
1215 | const char *buf, size_t len); | |
1216 | ||
7645c151 BZ |
1217 | /* |
1218 | * Special requests for ide-tape block device strategy routine. | |
1219 | * | |
1220 | * In order to service a character device command, we add special requests to | |
1221 | * the tail of our block device request queue and wait for their completion. | |
1222 | */ | |
1223 | enum { | |
1224 | REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */ | |
1225 | REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */ | |
1226 | REQ_IDETAPE_READ = (1 << 2), | |
1227 | REQ_IDETAPE_WRITE = (1 << 3), | |
1228 | }; | |
1229 | ||
2ac07d92 | 1230 | int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *); |
7645c151 | 1231 | |
de699ad5 | 1232 | int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *); |
0c8a6c7a | 1233 | int ide_do_start_stop(ide_drive_t *, struct gendisk *, int); |
0578042d | 1234 | int ide_set_media_lock(ide_drive_t *, struct gendisk *, int); |
6b0da28b BZ |
1235 | void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *); |
1236 | void ide_retry_pc(ide_drive_t *, struct gendisk *); | |
0578042d | 1237 | |
4cad085e | 1238 | int ide_cd_expiry(ide_drive_t *); |
844b9468 | 1239 | |
392de1d5 BP |
1240 | int ide_cd_get_xferlen(struct request *); |
1241 | ||
28ad91db | 1242 | ide_startstop_t ide_issue_pc(ide_drive_t *); |
594c16d8 | 1243 | |
f6e29e35 | 1244 | ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); |
1da177e4 | 1245 | |
4d7a984b TH |
1246 | void task_end_request(ide_drive_t *, struct request *, u8); |
1247 | ||
ac026ff2 | 1248 | int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16); |
9a3c49be BZ |
1249 | int ide_no_data_taskfile(ide_drive_t *, ide_task_t *); |
1250 | ||
1da177e4 | 1251 | int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); |
1da177e4 | 1252 | |
1da177e4 | 1253 | extern int ide_driveid_update(ide_drive_t *); |
1da177e4 LT |
1254 | extern int ide_config_drive_speed(ide_drive_t *, u8); |
1255 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1da177e4 LT |
1256 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); |
1257 | ||
1258 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1259 | ||
1da177e4 LT |
1260 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
1261 | ||
1da177e4 | 1262 | extern void ide_timer_expiry(unsigned long); |
7d12e780 | 1263 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1264 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1265 | |
1266 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1267 | ||
6d208b39 | 1268 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
725522b5 GKH |
1269 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1270 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1271 | #else |
1272 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1273 | #endif | |
1274 | ||
6636487e BZ |
1275 | static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) |
1276 | { | |
1277 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) | |
1278 | return 1; | |
1279 | return 0; | |
1280 | } | |
1281 | ||
c97c6aca | 1282 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, |
48c3c107 | 1283 | hw_regs_t *, hw_regs_t **); |
85620436 | 1284 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); |
1da177e4 | 1285 | |
8e882ba1 | 1286 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
b123f56e BZ |
1287 | int ide_pci_set_master(struct pci_dev *, const char *); |
1288 | unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *); | |
ebb00fb5 | 1289 | int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *); |
b123f56e | 1290 | int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); |
c413b9b9 | 1291 | #else |
b123f56e BZ |
1292 | static inline int ide_hwif_setup_dma(ide_hwif_t *hwif, |
1293 | const struct ide_port_info *d) | |
1294 | { | |
1295 | return -EINVAL; | |
1296 | } | |
c413b9b9 BZ |
1297 | #endif |
1298 | ||
c0ae5023 | 1299 | struct ide_pci_enablebit { |
1da177e4 LT |
1300 | u8 reg; /* byte pci reg holding the enable-bit */ |
1301 | u8 mask; /* mask to isolate the enable-bit */ | |
1302 | u8 val; /* value of masked reg when "enabled" */ | |
c0ae5023 | 1303 | }; |
1da177e4 LT |
1304 | |
1305 | enum { | |
1306 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1307 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1308 | /* single port device */ |
a5d8c5c8 | 1309 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1310 | /* don't use legacy PIO blacklist */ |
1311 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
e277f91f BZ |
1312 | /* set for the second port of QD65xx */ |
1313 | IDE_HFLAG_QD_2ND_PORT = (1 << 3), | |
26bcb879 BZ |
1314 | /* use PIO8/9 for prefetch off/on */ |
1315 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1316 | /* use PIO6/7 for fast-devsel off/on */ | |
1317 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1318 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1319 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1320 | /* |
1321 | * keep DMA setting when programming PIO mode, may be used only | |
1322 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1323 | */ | |
1324 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1325 | /* program host for the transfer mode after programming device */ |
1326 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1327 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1328 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1329 | /* trust BIOS for programming chipset/device for DMA */ |
1330 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
cafa027b BZ |
1331 | /* host is CS5510/CS5520 */ |
1332 | IDE_HFLAG_CS5520 = (1 << 11), | |
33c1002e BZ |
1333 | /* ATAPI DMA is unsupported */ |
1334 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
5e71d9c5 BZ |
1335 | /* set if host is a "non-bootable" controller */ |
1336 | IDE_HFLAG_NON_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1337 | /* host doesn't support DMA */ |
1338 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1339 | /* check if host is PCI IDE device before allowing DMA */ | |
1340 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
c5dd43ec BZ |
1341 | /* host uses MMIO */ |
1342 | IDE_HFLAG_MMIO = (1 << 16), | |
238e4f14 BZ |
1343 | /* no LBA48 */ |
1344 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1345 | /* no LBA48 DMA */ | |
1346 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1347 | /* data FIFO is cleared by an error */ |
1348 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1349 | /* serialize ports */ |
1350 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
3985ee3b BZ |
1351 | /* use legacy IRQs */ |
1352 | IDE_HFLAG_LEGACY_IRQS = (1 << 21), | |
8acf28c0 BZ |
1353 | /* force use of legacy IRQs */ |
1354 | IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), | |
1f66019b BZ |
1355 | /* host is TRM290 */ |
1356 | IDE_HFLAG_TRM290 = (1 << 23), | |
caea7602 BZ |
1357 | /* use 32-bit I/O ops */ |
1358 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1359 | /* unmask IRQs */ | |
1360 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
6636487e | 1361 | IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26), |
1fd18905 BZ |
1362 | /* serialize ports if DMA is possible (for sl82c105) */ |
1363 | IDE_HFLAG_SERIALIZE_DMA = (1 << 27), | |
8ac2b42a BZ |
1364 | /* force host out of "simplex" mode */ |
1365 | IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), | |
4166c199 BZ |
1366 | /* DSC overlap is unsupported */ |
1367 | IDE_HFLAG_NO_DSC = (1 << 29), | |
807b90d0 BZ |
1368 | /* never use 32-bit I/O ops */ |
1369 | IDE_HFLAG_NO_IO_32BIT = (1 << 30), | |
1370 | /* never unmask IRQs */ | |
1371 | IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), | |
1da177e4 LT |
1372 | }; |
1373 | ||
7cab14a7 | 1374 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
7cab14a7 | 1375 | # define IDE_HFLAG_OFF_BOARD 0 |
5e71d9c5 BZ |
1376 | #else |
1377 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE | |
7cab14a7 BZ |
1378 | #endif |
1379 | ||
039788e1 | 1380 | struct ide_port_info { |
1da177e4 | 1381 | char *name; |
a326b02b | 1382 | unsigned int (*init_chipset)(struct pci_dev *); |
1da177e4 LT |
1383 | void (*init_iops)(ide_hwif_t *); |
1384 | void (*init_hwif)(ide_hwif_t *); | |
b123f56e BZ |
1385 | int (*init_dma)(ide_hwif_t *, |
1386 | const struct ide_port_info *); | |
ac95beed | 1387 | |
374e042c | 1388 | const struct ide_tp_ops *tp_ops; |
ac95beed | 1389 | const struct ide_port_ops *port_ops; |
f37afdac | 1390 | const struct ide_dma_ops *dma_ops; |
ac95beed | 1391 | |
c0ae5023 BZ |
1392 | struct ide_pci_enablebit enablebits[2]; |
1393 | ||
528a572d | 1394 | hwif_chipset_t chipset; |
6b492496 BZ |
1395 | |
1396 | u16 max_sectors; /* if < than the default one */ | |
1397 | ||
9ffcf364 | 1398 | u32 host_flags; |
4099d143 | 1399 | u8 pio_mask; |
5f8b6c34 BZ |
1400 | u8 swdma_mask; |
1401 | u8 mwdma_mask; | |
18137207 | 1402 | u8 udma_mask; |
039788e1 | 1403 | }; |
1da177e4 | 1404 | |
6cdf6eb3 BZ |
1405 | int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *); |
1406 | int ide_pci_init_two(struct pci_dev *, struct pci_dev *, | |
1407 | const struct ide_port_info *, void *); | |
ef0b0427 | 1408 | void ide_pci_remove(struct pci_dev *); |
1da177e4 | 1409 | |
feb22b7f BZ |
1410 | #ifdef CONFIG_PM |
1411 | int ide_pci_suspend(struct pci_dev *, pm_message_t); | |
1412 | int ide_pci_resume(struct pci_dev *); | |
1413 | #else | |
1414 | #define ide_pci_suspend NULL | |
1415 | #define ide_pci_resume NULL | |
1416 | #endif | |
1417 | ||
1da177e4 LT |
1418 | void ide_map_sg(ide_drive_t *, struct request *); |
1419 | void ide_init_sg_cmd(ide_drive_t *, struct request *); | |
1420 | ||
1421 | #define BAD_DMA_DRIVE 0 | |
1422 | #define GOOD_DMA_DRIVE 1 | |
1423 | ||
65e5f2e3 JC |
1424 | struct drive_list_entry { |
1425 | const char *id_model; | |
1426 | const char *id_firmware; | |
1427 | }; | |
1428 | ||
4dde4492 | 1429 | int ide_in_drive_list(u16 *, const struct drive_list_entry *); |
a5b7e70d BZ |
1430 | |
1431 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
2dbe7e91 | 1432 | int ide_dma_good_drive(ide_drive_t *); |
1da177e4 | 1433 | int __ide_dma_bad_drive(ide_drive_t *); |
3ab7efe8 | 1434 | int ide_id_dma_bug(ide_drive_t *); |
7670df73 BZ |
1435 | |
1436 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1437 | ||
1438 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1439 | { | |
1440 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1441 | } | |
1442 | ||
4a546e04 | 1443 | void ide_dma_off_quietly(ide_drive_t *); |
7469aaf6 | 1444 | void ide_dma_off(ide_drive_t *); |
4a546e04 | 1445 | void ide_dma_on(ide_drive_t *); |
3608b5d7 | 1446 | int ide_set_dma(ide_drive_t *); |
578cfa0d | 1447 | void ide_check_dma_crc(ide_drive_t *); |
1da177e4 LT |
1448 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1449 | ||
2bbd57ca BZ |
1450 | int ide_allocate_dma_engine(ide_hwif_t *); |
1451 | void ide_release_dma_engine(ide_hwif_t *); | |
1452 | ||
062f9f02 BZ |
1453 | int ide_build_sglist(ide_drive_t *, struct request *); |
1454 | void ide_destroy_dmatable(ide_drive_t *); | |
1455 | ||
8e882ba1 | 1456 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF |
2dbe7e91 | 1457 | int config_drive_for_dma(ide_drive_t *); |
1da177e4 | 1458 | extern int ide_build_dmatable(ide_drive_t *, struct request *); |
15ce926a | 1459 | void ide_dma_host_set(ide_drive_t *, int); |
1da177e4 | 1460 | extern int ide_dma_setup(ide_drive_t *); |
f37afdac | 1461 | void ide_dma_exec_cmd(ide_drive_t *, u8); |
1da177e4 | 1462 | extern void ide_dma_start(ide_drive_t *); |
653bcf52 | 1463 | int ide_dma_end(ide_drive_t *); |
f37afdac | 1464 | int ide_dma_test_irq(ide_drive_t *); |
592b5315 | 1465 | u8 ide_dma_sff_read_status(ide_hwif_t *); |
71fc9fcc | 1466 | extern const struct ide_dma_ops sff_dma_ops; |
2dbe7e91 BZ |
1467 | #else |
1468 | static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } | |
8e882ba1 | 1469 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ |
1da177e4 | 1470 | |
de23ec9c | 1471 | void ide_dma_lost_irq(ide_drive_t *); |
ffa15a69 | 1472 | void ide_dma_timeout(ide_drive_t *); |
de23ec9c | 1473 | |
1da177e4 | 1474 | #else |
3ab7efe8 | 1475 | static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } |
7670df73 | 1476 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1477 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
4a546e04 | 1478 | static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } |
7469aaf6 | 1479 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
4a546e04 | 1480 | static inline void ide_dma_on(ide_drive_t *drive) { ; } |
1da177e4 | 1481 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1482 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
578cfa0d | 1483 | static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } |
0d1bad21 | 1484 | static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } |
2bbd57ca | 1485 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1da177e4 | 1486 | |
e3a59b4d HR |
1487 | #ifdef CONFIG_BLK_DEV_IDEACPI |
1488 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); | |
1489 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1490 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
1491 | extern void ide_acpi_init(ide_hwif_t *hwif); | |
eafd88a3 | 1492 | void ide_acpi_port_init_devices(ide_hwif_t *); |
5e32132b | 1493 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d HR |
1494 | #else |
1495 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } | |
1496 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1497 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
1498 | static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } | |
eafd88a3 | 1499 | static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } |
5e32132b | 1500 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1501 | #endif |
1502 | ||
1da177e4 LT |
1503 | void ide_register_region(struct gendisk *); |
1504 | void ide_unregister_region(struct gendisk *); | |
1505 | ||
f01393e4 | 1506 | void ide_undecoded_slave(ide_drive_t *); |
1da177e4 | 1507 | |
9fd91d95 | 1508 | void ide_port_apply_params(ide_hwif_t *); |
ebdab07d | 1509 | int ide_sysfs_register_port(ide_hwif_t *); |
9fd91d95 | 1510 | |
48c3c107 | 1511 | struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **); |
8a69580e | 1512 | void ide_host_free(struct ide_host *); |
48c3c107 BZ |
1513 | int ide_host_register(struct ide_host *, const struct ide_port_info *, |
1514 | hw_regs_t **); | |
6f904d01 BZ |
1515 | int ide_host_add(const struct ide_port_info *, hw_regs_t **, |
1516 | struct ide_host **); | |
48c3c107 | 1517 | void ide_host_remove(struct ide_host *); |
0bfeee7d | 1518 | int ide_legacy_device_add(const struct ide_port_info *, unsigned long); |
2dde7861 BZ |
1519 | void ide_port_unregister_devices(ide_hwif_t *); |
1520 | void ide_port_scan(ide_hwif_t *); | |
1da177e4 LT |
1521 | |
1522 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1523 | { | |
1524 | return hwif->hwif_data; | |
1525 | } | |
1526 | ||
1527 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1528 | { | |
1529 | hwif->hwif_data = data; | |
1530 | } | |
1531 | ||
3ab7efe8 | 1532 | const char *ide_xfer_verbose(u8 mode); |
1da177e4 LT |
1533 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); |
1534 | extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); | |
1535 | ||
a501633c | 1536 | u64 ide_get_lba_addr(struct ide_taskfile *, int); |
1da177e4 LT |
1537 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1538 | ||
3be53f3f BZ |
1539 | struct ide_timing { |
1540 | u8 mode; | |
1541 | u8 setup; /* t1 */ | |
1542 | u16 act8b; /* t2 for 8-bit io */ | |
1543 | u16 rec8b; /* t2i for 8-bit io */ | |
1544 | u16 cyc8b; /* t0 for 8-bit io */ | |
1545 | u16 active; /* t2 or tD */ | |
1546 | u16 recover; /* t2i or tK */ | |
1547 | u16 cycle; /* t0 */ | |
1548 | u16 udma; /* t2CYCTYP/2 */ | |
1549 | }; | |
1550 | ||
1551 | enum { | |
1552 | IDE_TIMING_SETUP = (1 << 0), | |
1553 | IDE_TIMING_ACT8B = (1 << 1), | |
1554 | IDE_TIMING_REC8B = (1 << 2), | |
1555 | IDE_TIMING_CYC8B = (1 << 3), | |
1556 | IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | | |
1557 | IDE_TIMING_CYC8B, | |
1558 | IDE_TIMING_ACTIVE = (1 << 4), | |
1559 | IDE_TIMING_RECOVER = (1 << 5), | |
1560 | IDE_TIMING_CYCLE = (1 << 6), | |
1561 | IDE_TIMING_UDMA = (1 << 7), | |
1562 | IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | | |
1563 | IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | | |
1564 | IDE_TIMING_CYCLE | IDE_TIMING_UDMA, | |
1565 | }; | |
1566 | ||
f06ab340 | 1567 | struct ide_timing *ide_timing_find_mode(u8); |
c9d6c1a2 | 1568 | u16 ide_pio_cycle_time(ide_drive_t *, u8); |
f06ab340 BZ |
1569 | void ide_timing_merge(struct ide_timing *, struct ide_timing *, |
1570 | struct ide_timing *, unsigned int); | |
1571 | int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int); | |
1572 | ||
9ad54093 BZ |
1573 | int ide_scan_pio_blacklist(char *); |
1574 | ||
2134758d | 1575 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
1da177e4 | 1576 | |
88b2b32b BZ |
1577 | int ide_set_pio_mode(ide_drive_t *, u8); |
1578 | int ide_set_dma_mode(ide_drive_t *, u8); | |
1579 | ||
26bcb879 BZ |
1580 | void ide_set_pio(ide_drive_t *, u8); |
1581 | ||
1582 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1583 | { | |
1584 | ide_set_pio(drive, 255); | |
1585 | } | |
1da177e4 | 1586 | |
ebdab07d BZ |
1587 | char *ide_media_string(ide_drive_t *); |
1588 | ||
1589 | extern struct device_attribute ide_dev_attrs[]; | |
1da177e4 | 1590 | extern struct bus_type ide_bus_type; |
f74c9141 | 1591 | extern struct class *ide_port_class; |
1da177e4 | 1592 | |
7b9f25b5 BZ |
1593 | static inline void ide_dump_identify(u8 *id) |
1594 | { | |
1595 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); | |
1596 | } | |
1597 | ||
86b37860 CL |
1598 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1599 | { | |
96f80219 | 1600 | return hwif->dev ? dev_to_node(hwif->dev) : -1; |
86b37860 CL |
1601 | } |
1602 | ||
7e59ea21 | 1603 | static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive) |
1b678347 | 1604 | { |
5e7f3a46 | 1605 | ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1]; |
1b678347 | 1606 | |
97100fc8 | 1607 | return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; |
1b678347 | 1608 | } |
2bd24a1c BZ |
1609 | |
1610 | #define ide_port_for_each_dev(i, dev, port) \ | |
1611 | for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) | |
1612 | ||
1613 | #define ide_host_for_each_port(i, port, host) \ | |
1614 | for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++) | |
1615 | ||
1da177e4 | 1616 | #endif /* _IDE_H */ |