Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
76582d0a | 24 | #include <linux/types.h> |
74315ccc | 25 | |
4a77a6cf JR |
26 | #define IOMMU_READ (1) |
27 | #define IOMMU_WRITE (2) | |
9cf06697 | 28 | #define IOMMU_CACHE (4) /* DMA cache coherency */ |
4a77a6cf | 29 | |
905d66c1 | 30 | struct iommu_ops; |
d72e31c9 | 31 | struct iommu_group; |
ff21776d | 32 | struct bus_type; |
4a77a6cf | 33 | struct device; |
4f3f8d9d | 34 | struct iommu_domain; |
ba1eabfa | 35 | struct notifier_block; |
4f3f8d9d OBC |
36 | |
37 | /* iommu fault flags */ | |
38 | #define IOMMU_FAULT_READ 0x0 | |
39 | #define IOMMU_FAULT_WRITE 0x1 | |
40 | ||
41 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 42 | struct device *, unsigned long, int, void *); |
4a77a6cf | 43 | |
0ff64f80 JR |
44 | struct iommu_domain_geometry { |
45 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
46 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
47 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
48 | }; | |
49 | ||
4a77a6cf | 50 | struct iommu_domain { |
905d66c1 | 51 | struct iommu_ops *ops; |
4a77a6cf | 52 | void *priv; |
4f3f8d9d | 53 | iommu_fault_handler_t handler; |
77ca2332 | 54 | void *handler_token; |
0ff64f80 | 55 | struct iommu_domain_geometry geometry; |
4a77a6cf JR |
56 | }; |
57 | ||
dbb9fd86 | 58 | #define IOMMU_CAP_CACHE_COHERENCY 0x1 |
323f99cb | 59 | #define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */ |
dbb9fd86 | 60 | |
7cabf491 VS |
61 | /* |
62 | * Following constraints are specifc to FSL_PAMUV1: | |
63 | * -aperture must be power of 2, and naturally aligned | |
64 | * -number of windows must be power of 2, and address space size | |
65 | * of each window is determined by aperture size / # of windows | |
66 | * -the actual size of the mapped region of a window must be power | |
67 | * of 2 starting with 4KB and physical address must be naturally | |
68 | * aligned. | |
69 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
70 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
71 | * iommu implementation supports these constraints. | |
72 | */ | |
73 | ||
0cd76dd1 | 74 | enum iommu_attr { |
0ff64f80 | 75 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 76 | DOMAIN_ATTR_PAGING, |
69356712 | 77 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
78 | DOMAIN_ATTR_FSL_PAMU_STASH, |
79 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
80 | DOMAIN_ATTR_FSL_PAMUV1, | |
a8b8a88a | 81 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
82 | }; |
83 | ||
39d4ebb9 JR |
84 | #ifdef CONFIG_IOMMU_API |
85 | ||
7d3002cc OBC |
86 | /** |
87 | * struct iommu_ops - iommu ops and capabilities | |
88 | * @domain_init: init iommu domain | |
89 | * @domain_destroy: destroy iommu domain | |
90 | * @attach_dev: attach device to an iommu domain | |
91 | * @detach_dev: detach device from an iommu domain | |
92 | * @map: map a physically contiguous memory region to an iommu domain | |
93 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
94 | * @iova_to_phys: translate iova to physical address | |
95 | * @domain_has_cap: domain capabilities query | |
d72e31c9 AW |
96 | * @add_device: add device to iommu grouping |
97 | * @remove_device: remove device from iommu grouping | |
0cd76dd1 JR |
98 | * @domain_get_attr: Query domain attributes |
99 | * @domain_set_attr: Change domain attributes | |
7d3002cc OBC |
100 | * @pgsize_bitmap: bitmap of supported page sizes |
101 | */ | |
4a77a6cf JR |
102 | struct iommu_ops { |
103 | int (*domain_init)(struct iommu_domain *domain); | |
104 | void (*domain_destroy)(struct iommu_domain *domain); | |
105 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); | |
106 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 107 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
108 | phys_addr_t paddr, size_t size, int prot); |
109 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
110 | size_t size); | |
bb5547ac | 111 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
dbb9fd86 SY |
112 | int (*domain_has_cap)(struct iommu_domain *domain, |
113 | unsigned long cap); | |
d72e31c9 AW |
114 | int (*add_device)(struct device *dev); |
115 | void (*remove_device)(struct device *dev); | |
1460432c | 116 | int (*device_group)(struct device *dev, unsigned int *groupid); |
0cd76dd1 JR |
117 | int (*domain_get_attr)(struct iommu_domain *domain, |
118 | enum iommu_attr attr, void *data); | |
119 | int (*domain_set_attr)(struct iommu_domain *domain, | |
120 | enum iommu_attr attr, void *data); | |
d7787d57 JR |
121 | |
122 | /* Window handling functions */ | |
123 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 124 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 125 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
69356712 JR |
126 | /* Set the numer of window per domain */ |
127 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); | |
128 | /* Get the numer of window per domain */ | |
129 | u32 (*domain_get_windows)(struct iommu_domain *domain); | |
d7787d57 | 130 | |
7d3002cc | 131 | unsigned long pgsize_bitmap; |
4a77a6cf JR |
132 | }; |
133 | ||
d72e31c9 AW |
134 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
135 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
136 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
137 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
138 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
139 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
140 | ||
ff21776d | 141 | extern int bus_set_iommu(struct bus_type *bus, struct iommu_ops *ops); |
a1b60c1c | 142 | extern bool iommu_present(struct bus_type *bus); |
905d66c1 | 143 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 144 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
145 | extern void iommu_domain_free(struct iommu_domain *domain); |
146 | extern int iommu_attach_device(struct iommu_domain *domain, | |
147 | struct device *dev); | |
148 | extern void iommu_detach_device(struct iommu_domain *domain, | |
149 | struct device *dev); | |
cefc53c7 | 150 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
151 | phys_addr_t paddr, size_t size, int prot); |
152 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
153 | size_t size); | |
bb5547ac | 154 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
dbb9fd86 SY |
155 | extern int iommu_domain_has_cap(struct iommu_domain *domain, |
156 | unsigned long cap); | |
4f3f8d9d | 157 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 158 | iommu_fault_handler_t handler, void *token); |
d72e31c9 AW |
159 | |
160 | extern int iommu_attach_group(struct iommu_domain *domain, | |
161 | struct iommu_group *group); | |
162 | extern void iommu_detach_group(struct iommu_domain *domain, | |
163 | struct iommu_group *group); | |
164 | extern struct iommu_group *iommu_group_alloc(void); | |
165 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
166 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
167 | void *iommu_data, | |
168 | void (*release)(void *iommu_data)); | |
169 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
170 | extern int iommu_group_add_device(struct iommu_group *group, | |
171 | struct device *dev); | |
172 | extern void iommu_group_remove_device(struct device *dev); | |
173 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
174 | int (*fn)(struct device *, void *)); | |
175 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
176 | extern void iommu_group_put(struct iommu_group *group); | |
177 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
178 | struct notifier_block *nb); | |
179 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
180 | struct notifier_block *nb); | |
181 | extern int iommu_group_id(struct iommu_group *group); | |
4f3f8d9d | 182 | |
0cd76dd1 JR |
183 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
184 | void *data); | |
185 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
186 | void *data); | |
4f3f8d9d | 187 | |
d7787d57 JR |
188 | /* Window handling function prototypes */ |
189 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
190 | phys_addr_t offset, u64 size, |
191 | int prot); | |
d7787d57 | 192 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
193 | /** |
194 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
195 | * @domain: the iommu domain where the fault has happened | |
196 | * @dev: the device where the fault has happened | |
197 | * @iova: the faulting address | |
198 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
199 | * | |
200 | * This function should be called by the low-level IOMMU implementations | |
201 | * whenever IOMMU faults happen, to allow high-level users, that are | |
202 | * interested in such events, to know about them. | |
203 | * | |
204 | * This event may be useful for several possible use cases: | |
205 | * - mere logging of the event | |
206 | * - dynamic TLB/PTE loading | |
207 | * - if restarting of the faulting device is required | |
208 | * | |
209 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
210 | * PTE/TLB loading will one day be supported, implementations will be able | |
211 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
212 | * |
213 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
214 | * (though fault handlers can also return -ENOSYS, in case they want to | |
215 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
216 | */ |
217 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
218 | struct device *dev, unsigned long iova, int flags) | |
219 | { | |
0ed6d2d2 | 220 | int ret = -ENOSYS; |
4a77a6cf | 221 | |
4f3f8d9d OBC |
222 | /* |
223 | * if upper layers showed interest and installed a fault handler, | |
224 | * invoke it. | |
225 | */ | |
226 | if (domain->handler) | |
77ca2332 OBC |
227 | ret = domain->handler(domain, dev, iova, flags, |
228 | domain->handler_token); | |
4a77a6cf | 229 | |
4f3f8d9d | 230 | return ret; |
4a77a6cf JR |
231 | } |
232 | ||
4a77a6cf JR |
233 | #else /* CONFIG_IOMMU_API */ |
234 | ||
39d4ebb9 | 235 | struct iommu_ops {}; |
d72e31c9 | 236 | struct iommu_group {}; |
4a77a6cf | 237 | |
a1b60c1c | 238 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
239 | { |
240 | return false; | |
241 | } | |
242 | ||
905d66c1 | 243 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
244 | { |
245 | return NULL; | |
246 | } | |
247 | ||
248 | static inline void iommu_domain_free(struct iommu_domain *domain) | |
249 | { | |
250 | } | |
251 | ||
252 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
253 | struct device *dev) | |
254 | { | |
255 | return -ENODEV; | |
256 | } | |
257 | ||
258 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
259 | struct device *dev) | |
260 | { | |
261 | } | |
262 | ||
cefc53c7 JR |
263 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
264 | phys_addr_t paddr, int gfp_order, int prot) | |
265 | { | |
266 | return -ENODEV; | |
267 | } | |
268 | ||
269 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
270 | int gfp_order) | |
271 | { | |
272 | return -ENODEV; | |
273 | } | |
274 | ||
d7787d57 JR |
275 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
276 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 277 | u64 size, int prot) |
d7787d57 JR |
278 | { |
279 | return -ENODEV; | |
280 | } | |
281 | ||
282 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
283 | u32 wnd_nr) | |
284 | { | |
285 | } | |
286 | ||
bb5547ac | 287 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
288 | { |
289 | return 0; | |
290 | } | |
291 | ||
dbb9fd86 SY |
292 | static inline int domain_has_cap(struct iommu_domain *domain, |
293 | unsigned long cap) | |
294 | { | |
295 | return 0; | |
296 | } | |
297 | ||
4f3f8d9d | 298 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 299 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
300 | { |
301 | } | |
302 | ||
bef83de5 AW |
303 | static inline int iommu_attach_group(struct iommu_domain *domain, |
304 | struct iommu_group *group) | |
d72e31c9 AW |
305 | { |
306 | return -ENODEV; | |
307 | } | |
308 | ||
bef83de5 AW |
309 | static inline void iommu_detach_group(struct iommu_domain *domain, |
310 | struct iommu_group *group) | |
d72e31c9 AW |
311 | { |
312 | } | |
313 | ||
bef83de5 | 314 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
315 | { |
316 | return ERR_PTR(-ENODEV); | |
317 | } | |
318 | ||
bef83de5 | 319 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
320 | { |
321 | return NULL; | |
322 | } | |
323 | ||
bef83de5 AW |
324 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
325 | void *iommu_data, | |
326 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
327 | { |
328 | } | |
329 | ||
bef83de5 AW |
330 | static inline int iommu_group_set_name(struct iommu_group *group, |
331 | const char *name) | |
d72e31c9 AW |
332 | { |
333 | return -ENODEV; | |
334 | } | |
335 | ||
bef83de5 AW |
336 | static inline int iommu_group_add_device(struct iommu_group *group, |
337 | struct device *dev) | |
d72e31c9 AW |
338 | { |
339 | return -ENODEV; | |
340 | } | |
341 | ||
bef83de5 | 342 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
343 | { |
344 | } | |
345 | ||
bef83de5 AW |
346 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
347 | void *data, | |
348 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
349 | { |
350 | return -ENODEV; | |
351 | } | |
352 | ||
bef83de5 | 353 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
354 | { |
355 | return NULL; | |
356 | } | |
357 | ||
bef83de5 | 358 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
359 | { |
360 | } | |
361 | ||
bef83de5 AW |
362 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
363 | struct notifier_block *nb) | |
1460432c AW |
364 | { |
365 | return -ENODEV; | |
366 | } | |
367 | ||
bef83de5 AW |
368 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
369 | struct notifier_block *nb) | |
d72e31c9 AW |
370 | { |
371 | return 0; | |
372 | } | |
373 | ||
bef83de5 | 374 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
375 | { |
376 | return -ENODEV; | |
377 | } | |
1460432c | 378 | |
0cd76dd1 JR |
379 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
380 | enum iommu_attr attr, void *data) | |
381 | { | |
382 | return -EINVAL; | |
383 | } | |
384 | ||
385 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
386 | enum iommu_attr attr, void *data) | |
387 | { | |
388 | return -EINVAL; | |
389 | } | |
390 | ||
4a77a6cf JR |
391 | #endif /* CONFIG_IOMMU_API */ |
392 | ||
393 | #endif /* __LINUX_IOMMU_H */ |