Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
76582d0a | 24 | #include <linux/types.h> |
56fa4849 | 25 | #include <trace/events/iommu.h> |
74315ccc | 26 | |
4a77a6cf JR |
27 | #define IOMMU_READ (1) |
28 | #define IOMMU_WRITE (2) | |
9cf06697 | 29 | #define IOMMU_CACHE (4) /* DMA cache coherency */ |
4a77a6cf | 30 | |
905d66c1 | 31 | struct iommu_ops; |
d72e31c9 | 32 | struct iommu_group; |
ff21776d | 33 | struct bus_type; |
4a77a6cf | 34 | struct device; |
4f3f8d9d | 35 | struct iommu_domain; |
ba1eabfa | 36 | struct notifier_block; |
4f3f8d9d OBC |
37 | |
38 | /* iommu fault flags */ | |
39 | #define IOMMU_FAULT_READ 0x0 | |
40 | #define IOMMU_FAULT_WRITE 0x1 | |
41 | ||
42 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 43 | struct device *, unsigned long, int, void *); |
4a77a6cf | 44 | |
0ff64f80 JR |
45 | struct iommu_domain_geometry { |
46 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
47 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
48 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
49 | }; | |
50 | ||
4a77a6cf | 51 | struct iommu_domain { |
905d66c1 | 52 | struct iommu_ops *ops; |
4a77a6cf | 53 | void *priv; |
4f3f8d9d | 54 | iommu_fault_handler_t handler; |
77ca2332 | 55 | void *handler_token; |
0ff64f80 | 56 | struct iommu_domain_geometry geometry; |
4a77a6cf JR |
57 | }; |
58 | ||
dbb9fd86 | 59 | #define IOMMU_CAP_CACHE_COHERENCY 0x1 |
323f99cb | 60 | #define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */ |
dbb9fd86 | 61 | |
7cabf491 VS |
62 | /* |
63 | * Following constraints are specifc to FSL_PAMUV1: | |
64 | * -aperture must be power of 2, and naturally aligned | |
65 | * -number of windows must be power of 2, and address space size | |
66 | * of each window is determined by aperture size / # of windows | |
67 | * -the actual size of the mapped region of a window must be power | |
68 | * of 2 starting with 4KB and physical address must be naturally | |
69 | * aligned. | |
70 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
71 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
72 | * iommu implementation supports these constraints. | |
73 | */ | |
74 | ||
0cd76dd1 | 75 | enum iommu_attr { |
0ff64f80 | 76 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 77 | DOMAIN_ATTR_PAGING, |
69356712 | 78 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
79 | DOMAIN_ATTR_FSL_PAMU_STASH, |
80 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
81 | DOMAIN_ATTR_FSL_PAMUV1, | |
a8b8a88a | 82 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
83 | }; |
84 | ||
39d4ebb9 JR |
85 | #ifdef CONFIG_IOMMU_API |
86 | ||
7d3002cc OBC |
87 | /** |
88 | * struct iommu_ops - iommu ops and capabilities | |
89 | * @domain_init: init iommu domain | |
90 | * @domain_destroy: destroy iommu domain | |
91 | * @attach_dev: attach device to an iommu domain | |
92 | * @detach_dev: detach device from an iommu domain | |
93 | * @map: map a physically contiguous memory region to an iommu domain | |
94 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
95 | * @iova_to_phys: translate iova to physical address | |
96 | * @domain_has_cap: domain capabilities query | |
d72e31c9 AW |
97 | * @add_device: add device to iommu grouping |
98 | * @remove_device: remove device from iommu grouping | |
0cd76dd1 JR |
99 | * @domain_get_attr: Query domain attributes |
100 | * @domain_set_attr: Change domain attributes | |
7d3002cc OBC |
101 | * @pgsize_bitmap: bitmap of supported page sizes |
102 | */ | |
4a77a6cf JR |
103 | struct iommu_ops { |
104 | int (*domain_init)(struct iommu_domain *domain); | |
105 | void (*domain_destroy)(struct iommu_domain *domain); | |
106 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); | |
107 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 108 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
109 | phys_addr_t paddr, size_t size, int prot); |
110 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
111 | size_t size); | |
bb5547ac | 112 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
dbb9fd86 SY |
113 | int (*domain_has_cap)(struct iommu_domain *domain, |
114 | unsigned long cap); | |
d72e31c9 AW |
115 | int (*add_device)(struct device *dev); |
116 | void (*remove_device)(struct device *dev); | |
1460432c | 117 | int (*device_group)(struct device *dev, unsigned int *groupid); |
0cd76dd1 JR |
118 | int (*domain_get_attr)(struct iommu_domain *domain, |
119 | enum iommu_attr attr, void *data); | |
120 | int (*domain_set_attr)(struct iommu_domain *domain, | |
121 | enum iommu_attr attr, void *data); | |
d7787d57 JR |
122 | |
123 | /* Window handling functions */ | |
124 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 125 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 126 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
69356712 JR |
127 | /* Set the numer of window per domain */ |
128 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); | |
129 | /* Get the numer of window per domain */ | |
130 | u32 (*domain_get_windows)(struct iommu_domain *domain); | |
d7787d57 | 131 | |
7d3002cc | 132 | unsigned long pgsize_bitmap; |
4a77a6cf JR |
133 | }; |
134 | ||
d72e31c9 AW |
135 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
136 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
137 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
138 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
139 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
140 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
141 | ||
ff21776d | 142 | extern int bus_set_iommu(struct bus_type *bus, struct iommu_ops *ops); |
a1b60c1c | 143 | extern bool iommu_present(struct bus_type *bus); |
905d66c1 | 144 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 145 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
146 | extern void iommu_domain_free(struct iommu_domain *domain); |
147 | extern int iommu_attach_device(struct iommu_domain *domain, | |
148 | struct device *dev); | |
149 | extern void iommu_detach_device(struct iommu_domain *domain, | |
150 | struct device *dev); | |
cefc53c7 | 151 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
152 | phys_addr_t paddr, size_t size, int prot); |
153 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
154 | size_t size); | |
bb5547ac | 155 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
dbb9fd86 SY |
156 | extern int iommu_domain_has_cap(struct iommu_domain *domain, |
157 | unsigned long cap); | |
4f3f8d9d | 158 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 159 | iommu_fault_handler_t handler, void *token); |
d72e31c9 AW |
160 | |
161 | extern int iommu_attach_group(struct iommu_domain *domain, | |
162 | struct iommu_group *group); | |
163 | extern void iommu_detach_group(struct iommu_domain *domain, | |
164 | struct iommu_group *group); | |
165 | extern struct iommu_group *iommu_group_alloc(void); | |
166 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
167 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
168 | void *iommu_data, | |
169 | void (*release)(void *iommu_data)); | |
170 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
171 | extern int iommu_group_add_device(struct iommu_group *group, | |
172 | struct device *dev); | |
173 | extern void iommu_group_remove_device(struct device *dev); | |
174 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
175 | int (*fn)(struct device *, void *)); | |
176 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
177 | extern void iommu_group_put(struct iommu_group *group); | |
178 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
179 | struct notifier_block *nb); | |
180 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
181 | struct notifier_block *nb); | |
182 | extern int iommu_group_id(struct iommu_group *group); | |
4f3f8d9d | 183 | |
0cd76dd1 JR |
184 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
185 | void *data); | |
186 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
187 | void *data); | |
4f3f8d9d | 188 | |
d7787d57 JR |
189 | /* Window handling function prototypes */ |
190 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
191 | phys_addr_t offset, u64 size, |
192 | int prot); | |
d7787d57 | 193 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
194 | /** |
195 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
196 | * @domain: the iommu domain where the fault has happened | |
197 | * @dev: the device where the fault has happened | |
198 | * @iova: the faulting address | |
199 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
200 | * | |
201 | * This function should be called by the low-level IOMMU implementations | |
202 | * whenever IOMMU faults happen, to allow high-level users, that are | |
203 | * interested in such events, to know about them. | |
204 | * | |
205 | * This event may be useful for several possible use cases: | |
206 | * - mere logging of the event | |
207 | * - dynamic TLB/PTE loading | |
208 | * - if restarting of the faulting device is required | |
209 | * | |
210 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
211 | * PTE/TLB loading will one day be supported, implementations will be able | |
212 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
213 | * |
214 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
215 | * (though fault handlers can also return -ENOSYS, in case they want to | |
216 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
217 | */ |
218 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
219 | struct device *dev, unsigned long iova, int flags) | |
220 | { | |
0ed6d2d2 | 221 | int ret = -ENOSYS; |
4a77a6cf | 222 | |
4f3f8d9d OBC |
223 | /* |
224 | * if upper layers showed interest and installed a fault handler, | |
225 | * invoke it. | |
226 | */ | |
227 | if (domain->handler) | |
77ca2332 OBC |
228 | ret = domain->handler(domain, dev, iova, flags, |
229 | domain->handler_token); | |
4a77a6cf | 230 | |
56fa4849 | 231 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 232 | return ret; |
4a77a6cf JR |
233 | } |
234 | ||
4a77a6cf JR |
235 | #else /* CONFIG_IOMMU_API */ |
236 | ||
39d4ebb9 | 237 | struct iommu_ops {}; |
d72e31c9 | 238 | struct iommu_group {}; |
4a77a6cf | 239 | |
a1b60c1c | 240 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
241 | { |
242 | return false; | |
243 | } | |
244 | ||
905d66c1 | 245 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
246 | { |
247 | return NULL; | |
248 | } | |
249 | ||
250 | static inline void iommu_domain_free(struct iommu_domain *domain) | |
251 | { | |
252 | } | |
253 | ||
254 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
255 | struct device *dev) | |
256 | { | |
257 | return -ENODEV; | |
258 | } | |
259 | ||
260 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
261 | struct device *dev) | |
262 | { | |
263 | } | |
264 | ||
cefc53c7 JR |
265 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
266 | phys_addr_t paddr, int gfp_order, int prot) | |
267 | { | |
268 | return -ENODEV; | |
269 | } | |
270 | ||
271 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
272 | int gfp_order) | |
273 | { | |
274 | return -ENODEV; | |
275 | } | |
276 | ||
d7787d57 JR |
277 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
278 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 279 | u64 size, int prot) |
d7787d57 JR |
280 | { |
281 | return -ENODEV; | |
282 | } | |
283 | ||
284 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
285 | u32 wnd_nr) | |
286 | { | |
287 | } | |
288 | ||
bb5547ac | 289 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
290 | { |
291 | return 0; | |
292 | } | |
293 | ||
dbb9fd86 SY |
294 | static inline int domain_has_cap(struct iommu_domain *domain, |
295 | unsigned long cap) | |
296 | { | |
297 | return 0; | |
298 | } | |
299 | ||
4f3f8d9d | 300 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 301 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
302 | { |
303 | } | |
304 | ||
bef83de5 AW |
305 | static inline int iommu_attach_group(struct iommu_domain *domain, |
306 | struct iommu_group *group) | |
d72e31c9 AW |
307 | { |
308 | return -ENODEV; | |
309 | } | |
310 | ||
bef83de5 AW |
311 | static inline void iommu_detach_group(struct iommu_domain *domain, |
312 | struct iommu_group *group) | |
d72e31c9 AW |
313 | { |
314 | } | |
315 | ||
bef83de5 | 316 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
317 | { |
318 | return ERR_PTR(-ENODEV); | |
319 | } | |
320 | ||
bef83de5 | 321 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
322 | { |
323 | return NULL; | |
324 | } | |
325 | ||
bef83de5 AW |
326 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
327 | void *iommu_data, | |
328 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
329 | { |
330 | } | |
331 | ||
bef83de5 AW |
332 | static inline int iommu_group_set_name(struct iommu_group *group, |
333 | const char *name) | |
d72e31c9 AW |
334 | { |
335 | return -ENODEV; | |
336 | } | |
337 | ||
bef83de5 AW |
338 | static inline int iommu_group_add_device(struct iommu_group *group, |
339 | struct device *dev) | |
d72e31c9 AW |
340 | { |
341 | return -ENODEV; | |
342 | } | |
343 | ||
bef83de5 | 344 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
345 | { |
346 | } | |
347 | ||
bef83de5 AW |
348 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
349 | void *data, | |
350 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
351 | { |
352 | return -ENODEV; | |
353 | } | |
354 | ||
bef83de5 | 355 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
356 | { |
357 | return NULL; | |
358 | } | |
359 | ||
bef83de5 | 360 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
361 | { |
362 | } | |
363 | ||
bef83de5 AW |
364 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
365 | struct notifier_block *nb) | |
1460432c AW |
366 | { |
367 | return -ENODEV; | |
368 | } | |
369 | ||
bef83de5 AW |
370 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
371 | struct notifier_block *nb) | |
d72e31c9 AW |
372 | { |
373 | return 0; | |
374 | } | |
375 | ||
bef83de5 | 376 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
377 | { |
378 | return -ENODEV; | |
379 | } | |
1460432c | 380 | |
0cd76dd1 JR |
381 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
382 | enum iommu_attr attr, void *data) | |
383 | { | |
384 | return -EINVAL; | |
385 | } | |
386 | ||
387 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
388 | enum iommu_attr attr, void *data) | |
389 | { | |
390 | return -EINVAL; | |
391 | } | |
392 | ||
4a77a6cf JR |
393 | #endif /* CONFIG_IOMMU_API */ |
394 | ||
395 | #endif /* __LINUX_IOMMU_H */ |