[deliverable/linux.git] / include / linux / irq.h

#ifndef _LINUX_IRQ_H
#define _LINUX_IRQ_H

/*
 * Please do not include this file in generic code.  There is currently
 * no requirement for any architecture to implement anything held
 * within this file.
 *
 * Thanks. --rmk
 */

#include <linux/smp.h>

#ifndef CONFIG_S390

#include <linux/linkage.h>
#include <linux/cache.h>
#include <linux/spinlock.h>
#include <linux/cpumask.h>
#include <linux/irqreturn.h>
#include <linux/errno.h>

#include <asm/irq.h>
#include <asm/ptrace.h>
#include <asm/irq_regs.h>

struct irq_desc;
typedef	void (*irq_flow_handler_t)(unsigned int irq,
					    struct irq_desc *desc);


/*
 * IRQ line status.
 *
 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
 *
 * IRQ types
 */
#define IRQ_TYPE_NONE		0x00000000	/* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING	0x00000001	/* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING	0x00000002	/* Edge falling type */
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH	0x00000004	/* Level high type */
#define IRQ_TYPE_LEVEL_LOW	0x00000008	/* Level low type */
#define IRQ_TYPE_SENSE_MASK	0x0000000f	/* Mask of the above */
#define IRQ_TYPE_PROBE		0x00000010	/* Probing in progress */

/* Internal flags */
#define IRQ_INPROGRESS		0x00000100	/* IRQ handler active - do not enter! */
#define IRQ_DISABLED		0x00000200	/* IRQ disabled - do not enter! */
#define IRQ_PENDING		0x00000400	/* IRQ pending - replay on enable */
#define IRQ_REPLAY		0x00000800	/* IRQ has been replayed but not acked yet */
#define IRQ_AUTODETECT		0x00001000	/* IRQ is being autodetected */
#define IRQ_WAITING		0x00002000	/* IRQ not yet seen - for autodetection */
#define IRQ_LEVEL		0x00004000	/* IRQ level triggered */
#define IRQ_MASKED		0x00008000	/* IRQ masked - shouldn't be seen again */
#define IRQ_PER_CPU		0x00010000	/* IRQ is per CPU */
#define IRQ_NOPROBE		0x00020000	/* IRQ is not valid for probing */
#define IRQ_NOREQUEST		0x00040000	/* IRQ cannot be requested */
#define IRQ_NOAUTOEN		0x00080000	/* IRQ will not be enabled on request irq */
#define IRQ_WAKEUP		0x00100000	/* IRQ triggers system wakeup */
#define IRQ_MOVE_PENDING	0x00200000	/* need to re-target IRQ destination */
#define IRQ_NO_BALANCING	0x00400000	/* IRQ is excluded from balancing */
#define IRQ_SPURIOUS_DISABLED	0x00800000	/* IRQ was disabled by the spurious trap */

#ifdef CONFIG_IRQ_PER_CPU
# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
# define IRQ_NO_BALANCING_MASK	(IRQ_PER_CPU | IRQ_NO_BALANCING)
#else
# define CHECK_IRQ_PER_CPU(var) 0
# define IRQ_NO_BALANCING_MASK	IRQ_NO_BALANCING
#endif

struct proc_dir_entry;
struct msi_desc;

/**
 * struct irq_chip - hardware interrupt chip descriptor
 *
 * @name:		name for /proc/interrupts
 * @startup:		start up the interrupt (defaults to ->enable if NULL)
 * @shutdown:		shut down the interrupt (defaults to ->disable if NULL)
 * @enable:		enable the interrupt (defaults to chip->unmask if NULL)
 * @disable:		disable the interrupt (defaults to chip->mask if NULL)
 * @ack:		start of a new interrupt
 * @mask:		mask an interrupt source
 * @mask_ack:		ack and mask an interrupt source
 * @unmask:		unmask an interrupt source
 * @eoi:		end of interrupt - chip level
 * @end:		end of interrupt - flow level
 * @set_affinity:	set the CPU affinity on SMP machines
 * @retrigger:		resend an IRQ to the CPU
 * @set_type:		set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
 * @set_wake:		enable/disable power-management wake-on of an IRQ
 *
 * @release:		release function solely used by UML
 * @typename:		obsoleted by name, kept as migration helper
 */
struct irq_chip {
	const char	*name;
	unsigned int	(*startup)(unsigned int irq);
	void		(*shutdown)(unsigned int irq);
	void		(*enable)(unsigned int irq);
	void		(*disable)(unsigned int irq);

	void		(*ack)(unsigned int irq);
	void		(*mask)(unsigned int irq);
	void		(*mask_ack)(unsigned int irq);
	void		(*unmask)(unsigned int irq);
	void		(*eoi)(unsigned int irq);

	void		(*end)(unsigned int irq);
	void		(*set_affinity)(unsigned int irq, cpumask_t dest);
	int		(*retrigger)(unsigned int irq);
	int		(*set_type)(unsigned int irq, unsigned int flow_type);
	int		(*set_wake)(unsigned int irq, unsigned int on);

	/* Currently used only by UML, might disappear one day.*/
#ifdef CONFIG_IRQ_RELEASE_METHOD
	void		(*release)(unsigned int irq, void *dev_id);
#endif
	/*
	 * For compatibility, ->typename is copied into ->name.
	 * Will disappear.
	 */
	const char	*typename;
};

/**
 * struct irq_desc - interrupt descriptor
 *
 * @handle_irq:		highlevel irq-events handler [if NULL, __do_IRQ()]
 * @chip:		low level interrupt hardware access
 * @msi_desc:		MSI descriptor
 * @handler_data:	per-IRQ data for the irq_chip methods
 * @chip_data:		platform-specific per-chip private data for the chip
 *			methods, to allow shared chip implementations
 * @action:		the irq action chain
 * @status:		status information
 * @depth:		disable-depth, for nested irq_disable() calls
 * @wake_depth:		enable depth, for multiple set_irq_wake() callers
 * @irq_count:		stats field to detect stalled irqs
 * @irqs_unhandled:	stats field for spurious unhandled interrupts
 * @last_unhandled:	aging timer for unhandled count
 * @lock:		locking for SMP
 * @affinity:		IRQ affinity on SMP
 * @cpu:		cpu index useful for balancing
 * @pending_mask:	pending rebalanced interrupts
 * @dir:		/proc/irq/ procfs entry
 * @affinity_entry:	/proc/irq/smp_affinity procfs entry on SMP
 * @name:		flow handler name for /proc/interrupts output
 */
struct irq_desc {
	irq_flow_handler_t	handle_irq;
	struct irq_chip		*chip;
	struct msi_desc		*msi_desc;
	void			*handler_data;
	void			*chip_data;
	struct irqaction	*action;	/* IRQ action list */
	unsigned int		status;		/* IRQ status */

	unsigned int		depth;		/* nested irq disables */
	unsigned int		wake_depth;	/* nested wake enables */
	unsigned int		irq_count;	/* For detecting broken IRQs */
	unsigned int		irqs_unhandled;
	unsigned long		last_unhandled;	/* Aging timer for unhandled count */
	spinlock_t		lock;
#ifdef CONFIG_SMP
	cpumask_t		affinity;
	unsigned int		cpu;
#endif
#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
	cpumask_t		pending_mask;
#endif
#ifdef CONFIG_PROC_FS
	struct proc_dir_entry	*dir;
#endif
	const char		*name;
} ____cacheline_internodealigned_in_smp;

extern struct irq_desc irq_desc[NR_IRQS];

/*
 * Migration helpers for obsolete names, they will go away:
 */
#define hw_interrupt_type	irq_chip
typedef struct irq_chip		hw_irq_controller;
#define no_irq_type		no_irq_chip
typedef struct irq_desc		irq_desc_t;

/*
 * Pick up the arch-dependent methods:
 */
#include <asm/hw_irq.h>

extern int setup_irq(unsigned int irq, struct irqaction *new);

#ifdef CONFIG_GENERIC_HARDIRQS

#ifndef handle_dynamic_tick
# define handle_dynamic_tick(a)		do { } while (0)
#endif

#ifdef CONFIG_SMP

#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)

void set_pending_irq(unsigned int irq, cpumask_t mask);
void move_native_irq(int irq);
void move_masked_irq(int irq);

#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */

static inline void move_irq(int irq)
{
}

static inline void move_native_irq(int irq)
{
}

static inline void move_masked_irq(int irq)
{
}

static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
{
}

#endif /* CONFIG_GENERIC_PENDING_IRQ */

#else /* CONFIG_SMP */

#define move_native_irq(x)
#define move_masked_irq(x)

#endif /* CONFIG_SMP */

#ifdef CONFIG_IRQBALANCE
extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
#else
static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
{
}
#endif

extern int no_irq_affinity;

static inline int irq_balancing_disabled(unsigned int irq)
{
	return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
}

/* Handle irq action chains: */
extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);

/*
 * Built-in IRQ handlers for various IRQ types,
 * callable via desc->chip->handle_irq()
 */
extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);

/*
 * Monolithic do_IRQ implementation.
 */
#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
extern unsigned int __do_IRQ(unsigned int irq);
#endif

/*
 * Architectures call this to let the generic IRQ layer
 * handle an interrupt. If the descriptor is attached to an
 * irqchip-style controller then we call the ->handle_irq() handler,
 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
 */
static inline void generic_handle_irq(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;

#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
	desc->handle_irq(irq, desc);
#else
	if (likely(desc->handle_irq))
		desc->handle_irq(irq, desc);
	else
		__do_IRQ(irq);
#endif
}

/* Handling of unhandled and spurious interrupts: */
extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
			   int action_ret);

/* Resending of interrupts :*/
void check_irq_resend(struct irq_desc *desc, unsigned int irq);

/* Enable/disable irq debugging output: */
extern int noirqdebug_setup(char *str);

/* Checks whether the interrupt can be requested by request_irq(): */
extern int can_request_irq(unsigned int irq, unsigned long irqflags);

/* Dummy irq-chip implementations: */
extern struct irq_chip no_irq_chip;
extern struct irq_chip dummy_irq_chip;

extern void
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
			 irq_flow_handler_t handle);
extern void
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
			      irq_flow_handler_t handle, const char *name);

extern void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
		  const char *name);

/* caller has locked the irq_desc and both params are valid */
static inline void __set_irq_handler_unlocked(int irq,
					      irq_flow_handler_t handler)
{
	irq_desc[irq].handle_irq = handler;
}

/*
 * Set a highlevel flow handler for a given IRQ:
 */
static inline void
set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
{
	__set_irq_handler(irq, handle, 0, NULL);
}

/*
 * Set a highlevel chained flow handler for a given IRQ.
 * (a chained handler is automatically enabled and set to
 *  IRQ_NOREQUEST and IRQ_NOPROBE)
 */
static inline void
set_irq_chained_handler(unsigned int irq,
			irq_flow_handler_t handle)
{
	__set_irq_handler(irq, handle, 1, NULL);
}

extern void set_irq_noprobe(unsigned int irq);
extern void set_irq_probe(unsigned int irq);

/* Handle dynamic irq creation and destruction */
extern int create_irq(void);
extern void destroy_irq(unsigned int irq);

/* Test to see if a driver has successfully requested an irq */
static inline int irq_has_action(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;
	return desc->action != NULL;
}

/* Dynamic irq helper functions */
extern void dynamic_irq_init(unsigned int irq);
extern void dynamic_irq_cleanup(unsigned int irq);

/* Set/get chip/data for an IRQ: */
extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
extern int set_irq_data(unsigned int irq, void *data);
extern int set_irq_chip_data(unsigned int irq, void *data);
extern int set_irq_type(unsigned int irq, unsigned int type);
extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);

#define get_irq_chip(irq)	(irq_desc[irq].chip)
#define get_irq_chip_data(irq)	(irq_desc[irq].chip_data)
#define get_irq_data(irq)	(irq_desc[irq].handler_data)
#define get_irq_msi(irq)	(irq_desc[irq].msi_desc)

#endif /* CONFIG_GENERIC_HARDIRQS */

#endif /* !CONFIG_S390 */

#endif /* _LINUX_IRQ_H */
Commit	Line	Data
06fcb0c6 IM	1	#ifndef _LINUX_IRQ_H
06fcb0c6 IM	2	#define _LINUX_IRQ_H
1da177e4 LT	3
	4	/*
	5	* Please do not include this file in generic code. There is currently
	6	* no requirement for any architecture to implement anything held
	7	* within this file.
	8	*
	9	* Thanks. --rmk
	10	*/
	11
23f9b317	12	#include <linux/smp.h>
1da177e4	13
06fcb0c6	14	#ifndef CONFIG_S390
1da177e4 LT	15
	16	#include <linux/linkage.h>
	17	#include <linux/cache.h>
	18	#include <linux/spinlock.h>
	19	#include <linux/cpumask.h>
908dcecd	20	#include <linux/irqreturn.h>
77904fd6	21	#include <linux/errno.h>
1da177e4 LT	22
	23	#include <asm/irq.h>
	24	#include <asm/ptrace.h>
7d12e780	25	#include <asm/irq_regs.h>
1da177e4	26
57a58a94	27	struct irq_desc;
ec701584	28	typedef void (*irq_flow_handler_t)(unsigned int irq,
7d12e780	29	struct irq_desc *desc);
57a58a94 DH	30
57a58a94 DH	31
1da177e4 LT	32	/*
1da177e4 LT	33	* IRQ line status.
6e213616	34	*
950f4427	35	* Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
6e213616 TG	36	*
6e213616 TG	37	* IRQ types
1da177e4	38	*/
6e213616 TG	39	#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
	40	#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
	41	#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
	42	#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING \| IRQ_TYPE_EDGE_RISING)
	43	#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
	44	#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
	45	#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
	46	#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
	47
	48	/* Internal flags */
950f4427 TG	49	#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
	50	#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
	51	#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
	52	#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
	53	#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
	54	#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
	55	#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
	56	#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
	57	#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
	58	#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
	59	#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
	60	#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
d7e25f33 IM	61	#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
	62	#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
	63	#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
1adb0850	64	#define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
950f4427	65
0d7012a9	66	#ifdef CONFIG_IRQ_PER_CPU
f26fdd59	67	# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
950f4427	68	# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU \| IRQ_NO_BALANCING)
f26fdd59 KW	69	#else
f26fdd59 KW	70	# define CHECK_IRQ_PER_CPU(var) 0
950f4427	71	# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
f26fdd59	72	#endif
1da177e4	73
6a6de9ef	74	struct proc_dir_entry;
5b912c10	75	struct msi_desc;
6a6de9ef	76
8fee5c36	77	/**
6a6de9ef	78	* struct irq_chip - hardware interrupt chip descriptor
8fee5c36 IM	79	*
	80	* @name: name for /proc/interrupts
	81	* @startup: start up the interrupt (defaults to ->enable if NULL)
	82	* @shutdown: shut down the interrupt (defaults to ->disable if NULL)
	83	* @enable: enable the interrupt (defaults to chip->unmask if NULL)
	84	* @disable: disable the interrupt (defaults to chip->mask if NULL)
8fee5c36 IM	85	* @ack: start of a new interrupt
	86	* @mask: mask an interrupt source
	87	* @mask_ack: ack and mask an interrupt source
	88	* @unmask: unmask an interrupt source
47c2a3aa IM	89	* @eoi: end of interrupt - chip level
47c2a3aa IM	90	* @end: end of interrupt - flow level
8fee5c36 IM	91	* @set_affinity: set the CPU affinity on SMP machines
	92	* @retrigger: resend an IRQ to the CPU
	93	* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
	94	* @set_wake: enable/disable power-management wake-on of an IRQ
	95	*
	96	* @release: release function solely used by UML
6a6de9ef	97	* @typename: obsoleted by name, kept as migration helper
1da177e4	98	*/
6a6de9ef TG	99	struct irq_chip {
6a6de9ef TG	100	const char *name;
71d218b7 IM	101	unsigned int (*startup)(unsigned int irq);
	102	void (*shutdown)(unsigned int irq);
	103	void (*enable)(unsigned int irq);
	104	void (*disable)(unsigned int irq);
6a6de9ef	105
71d218b7	106	void (*ack)(unsigned int irq);
6a6de9ef TG	107	void (*mask)(unsigned int irq);
	108	void (*mask_ack)(unsigned int irq);
	109	void (*unmask)(unsigned int irq);
47c2a3aa	110	void (*eoi)(unsigned int irq);
6a6de9ef	111
71d218b7 IM	112	void (*end)(unsigned int irq);
71d218b7 IM	113	void (*set_affinity)(unsigned int irq, cpumask_t dest);
c0ad90a3	114	int (*retrigger)(unsigned int irq);
6a6de9ef TG	115	int (*set_type)(unsigned int irq, unsigned int flow_type);
6a6de9ef TG	116	int (*set_wake)(unsigned int irq, unsigned int on);
c0ad90a3	117
b77d6adc PBG	118	/* Currently used only by UML, might disappear one day.*/
b77d6adc PBG	119	#ifdef CONFIG_IRQ_RELEASE_METHOD
71d218b7	120	void (release)(unsigned int irq, void dev_id);
b77d6adc	121	#endif
6a6de9ef TG	122	/*
	123	* For compatibility, ->typename is copied into ->name.
	124	* Will disappear.
	125	*/
	126	const char *typename;
1da177e4 LT	127	};
1da177e4 LT	128
8fee5c36 IM	129	/**
	130	* struct irq_desc - interrupt descriptor
	131	*
6a6de9ef TG	132	* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
6a6de9ef TG	133	* @chip: low level interrupt hardware access
472900b8	134	* @msi_desc: MSI descriptor
6a6de9ef TG	135	* @handler_data: per-IRQ data for the irq_chip methods
	136	* @chip_data: platform-specific per-chip private data for the chip
	137	* methods, to allow shared chip implementations
8fee5c36 IM	138	* @action: the irq action chain
	139	* @status: status information
	140	* @depth: disable-depth, for nested irq_disable() calls
15a647eb	141	* @wake_depth: enable depth, for multiple set_irq_wake() callers
8fee5c36 IM	142	* @irq_count: stats field to detect stalled irqs
8fee5c36 IM	143	* @irqs_unhandled: stats field for spurious unhandled interrupts
5ac4d823	144	* @last_unhandled: aging timer for unhandled count
8fee5c36 IM	145	* @lock: locking for SMP
8fee5c36 IM	146	* @affinity: IRQ affinity on SMP
6a6de9ef	147	* @cpu: cpu index useful for balancing
8fee5c36	148	* @pending_mask: pending rebalanced interrupts
8fee5c36 IM	149	* @dir: /proc/irq/ procfs entry
8fee5c36 IM	150	* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
a460e745	151	* @name: flow handler name for /proc/interrupts output
1da177e4	152	*/
34ffdb72	153	struct irq_desc {
57a58a94	154	irq_flow_handler_t handle_irq;
6a6de9ef	155	struct irq_chip *chip;
5b912c10	156	struct msi_desc *msi_desc;
6a6de9ef	157	void *handler_data;
71d218b7 IM	158	void *chip_data;
	159	struct irqaction action; / IRQ action list */
	160	unsigned int status; /* IRQ status */
6a6de9ef	161
71d218b7	162	unsigned int depth; /* nested irq disables */
15a647eb	163	unsigned int wake_depth; /* nested wake enables */
71d218b7 IM	164	unsigned int irq_count; /* For detecting broken IRQs */
71d218b7 IM	165	unsigned int irqs_unhandled;
4f27c00b	166	unsigned long last_unhandled; /* Aging timer for unhandled count */
71d218b7	167	spinlock_t lock;
a53da52f	168	#ifdef CONFIG_SMP
71d218b7	169	cpumask_t affinity;
6a6de9ef	170	unsigned int cpu;
a53da52f	171	#endif
06fcb0c6	172	#if defined(CONFIG_GENERIC_PENDING_IRQ) \|\| defined(CONFIG_IRQBALANCE)
cd916d31	173	cpumask_t pending_mask;
54d5d424	174	#endif
4a733ee1	175	#ifdef CONFIG_PROC_FS
a460e745	176	struct proc_dir_entry *dir;
4a733ee1	177	#endif
a460e745	178	const char *name;
e729aa16	179	} ____cacheline_internodealigned_in_smp;
1da177e4	180
34ffdb72	181	extern struct irq_desc irq_desc[NR_IRQS];
1da177e4	182
34ffdb72 IM	183	/*
	184	* Migration helpers for obsolete names, they will go away:
	185	*/
6a6de9ef TG	186	#define hw_interrupt_type irq_chip
	187	typedef struct irq_chip hw_irq_controller;
	188	#define no_irq_type no_irq_chip
34ffdb72 IM	189	typedef struct irq_desc irq_desc_t;
	190
	191	/*
	192	* Pick up the arch-dependent methods:
	193	*/
	194	#include <asm/hw_irq.h>
1da177e4	195
06fcb0c6	196	extern int setup_irq(unsigned int irq, struct irqaction *new);
1da177e4 LT	197
1da177e4 LT	198	#ifdef CONFIG_GENERIC_HARDIRQS
06fcb0c6	199
d061daa0 TG	200	#ifndef handle_dynamic_tick
	201	# define handle_dynamic_tick(a) do { } while (0)
	202	#endif
	203
54d5d424 AR	204	#ifdef CONFIG_SMP
54d5d424 AR	205
06fcb0c6	206	#if defined(CONFIG_GENERIC_PENDING_IRQ) \|\| defined(CONFIG_IRQBALANCE)
54d5d424	207
c777ac55 AM	208	void set_pending_irq(unsigned int irq, cpumask_t mask);
c777ac55 AM	209	void move_native_irq(int irq);
e7b946e9	210	void move_masked_irq(int irq);
54d5d424	211
06fcb0c6 IM	212	#else /* CONFIG_GENERIC_PENDING_IRQ \|\| CONFIG_IRQBALANCE */
	213
	214	static inline void move_irq(int irq)
	215	{
	216	}
	217
	218	static inline void move_native_irq(int irq)
	219	{
	220	}
	221
e7b946e9 EB	222	static inline void move_masked_irq(int irq)
	223	{
	224	}
	225
06fcb0c6 IM	226	static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
	227	{
	228	}
54d5d424	229
06fcb0c6	230	#endif /* CONFIG_GENERIC_PENDING_IRQ */
54d5d424	231
06fcb0c6	232	#else /* CONFIG_SMP */
54d5d424	233
54d5d424	234	#define move_native_irq(x)
e7b946e9	235	#define move_masked_irq(x)
54d5d424	236
06fcb0c6	237	#endif /* CONFIG_SMP */
54d5d424	238
1b61b910 ZY	239	#ifdef CONFIG_IRQBALANCE
	240	extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
	241	#else
	242	static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
	243	{
	244	}
	245	#endif
	246
1da177e4	247	extern int no_irq_affinity;
1da177e4	248
950f4427 TG	249	static inline int irq_balancing_disabled(unsigned int irq)
	250	{
	251	return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
	252	}
	253
6a6de9ef	254	/* Handle irq action chains: */
7d12e780	255	extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
6a6de9ef TG	256
	257	/*
	258	* Built-in IRQ handlers for various IRQ types,
	259	* callable via desc->chip->handle_irq()
	260	*/
ec701584 HH	261	extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
	262	extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
	263	extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
	264	extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
	265	extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
	266	extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
6a6de9ef	267
2e60bbb6	268	/*
6a6de9ef	269	* Monolithic do_IRQ implementation.
2e60bbb6	270	*/
af8c65b5	271	#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
ec701584	272	extern unsigned int __do_IRQ(unsigned int irq);
af8c65b5	273	#endif
2e60bbb6	274
dae86204 IM	275	/*
	276	* Architectures call this to let the generic IRQ layer
	277	* handle an interrupt. If the descriptor is attached to an
	278	* irqchip-style controller then we call the ->handle_irq() handler,
	279	* and it calls __do_IRQ() if it's attached to an irqtype-style controller.
	280	*/
7d12e780	281	static inline void generic_handle_irq(unsigned int irq)
dae86204 IM	282	{
	283	struct irq_desc *desc = irq_desc + irq;
	284
af8c65b5	285	#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
7d12e780	286	desc->handle_irq(irq, desc);
af8c65b5	287	#else
dae86204	288	if (likely(desc->handle_irq))
7d12e780	289	desc->handle_irq(irq, desc);
dae86204	290	else
7d12e780	291	__do_IRQ(irq);
af8c65b5	292	#endif
dae86204 IM	293	}
dae86204 IM	294
6a6de9ef	295	/* Handling of unhandled and spurious interrupts: */
34ffdb72	296	extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
7d12e780	297	int action_ret);
1da177e4	298
a4633adc TG	299	/* Resending of interrupts :*/
	300	void check_irq_resend(struct irq_desc *desc, unsigned int irq);
	301
6a6de9ef TG	302	/* Enable/disable irq debugging output: */
	303	extern int noirqdebug_setup(char *str);
	304
	305	/* Checks whether the interrupt can be requested by request_irq(): */
	306	extern int can_request_irq(unsigned int irq, unsigned long irqflags);
	307
f8b5473f	308	/* Dummy irq-chip implementations: */
6a6de9ef	309	extern struct irq_chip no_irq_chip;
f8b5473f	310	extern struct irq_chip dummy_irq_chip;
6a6de9ef	311
145fc655 IM	312	extern void
	313	set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
	314	irq_flow_handler_t handle);
6a6de9ef	315	extern void
a460e745 IM	316	set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
	317	irq_flow_handler_t handle, const char *name);
	318
6a6de9ef	319	extern void
a460e745 IM	320	__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
a460e745 IM	321	const char *name);
1da177e4	322
b019e573 KH	323	/* caller has locked the irq_desc and both params are valid */
	324	static inline void __set_irq_handler_unlocked(int irq,
	325	irq_flow_handler_t handler)
	326	{
	327	irq_desc[irq].handle_irq = handler;
	328	}
	329
6a6de9ef TG	330	/*
	331	* Set a highlevel flow handler for a given IRQ:
	332	*/
	333	static inline void
57a58a94	334	set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
6a6de9ef	335	{
a460e745	336	__set_irq_handler(irq, handle, 0, NULL);
6a6de9ef TG	337	}
	338
	339	/*
	340	* Set a highlevel chained flow handler for a given IRQ.
	341	* (a chained handler is automatically enabled and set to
	342	* IRQ_NOREQUEST and IRQ_NOPROBE)
	343	*/
	344	static inline void
	345	set_irq_chained_handler(unsigned int irq,
57a58a94	346	irq_flow_handler_t handle)
6a6de9ef	347	{
a460e745	348	__set_irq_handler(irq, handle, 1, NULL);
6a6de9ef TG	349	}
6a6de9ef TG	350
46f4f8f6 RB	351	extern void set_irq_noprobe(unsigned int irq);
	352	extern void set_irq_probe(unsigned int irq);
	353
3a16d713 EB	354	/* Handle dynamic irq creation and destruction */
	355	extern int create_irq(void);
	356	extern void destroy_irq(unsigned int irq);
	357
1f80025e EB	358	/* Test to see if a driver has successfully requested an irq */
	359	static inline int irq_has_action(unsigned int irq)
	360	{
	361	struct irq_desc *desc = irq_desc + irq;
	362	return desc->action != NULL;
	363	}
	364
3a16d713 EB	365	/* Dynamic irq helper functions */
	366	extern void dynamic_irq_init(unsigned int irq);
	367	extern void dynamic_irq_cleanup(unsigned int irq);
dd87eb3a	368
3a16d713	369	/* Set/get chip/data for an IRQ: */
dd87eb3a TG	370	extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
	371	extern int set_irq_data(unsigned int irq, void *data);
	372	extern int set_irq_chip_data(unsigned int irq, void *data);
	373	extern int set_irq_type(unsigned int irq, unsigned int type);
5b912c10	374	extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
dd87eb3a TG	375
	376	#define get_irq_chip(irq) (irq_desc[irq].chip)
	377	#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
	378	#define get_irq_data(irq) (irq_desc[irq].handler_data)
5b912c10	379	#define get_irq_msi(irq) (irq_desc[irq].msi_desc)
dd87eb3a	380
6a6de9ef	381	#endif /* CONFIG_GENERIC_HARDIRQS */
1da177e4	382
06fcb0c6	383	#endif /* !CONFIG_S390 */
1da177e4	384
06fcb0c6	385	#endif /* _LINUX_IRQ_H */