sparse irq_desc[] array: core kernel and x86 changes
[deliverable/linux.git] / include / linux / irq.h
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06fcb0c6
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1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
1da177e4
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3
4/*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
8 *
9 * Thanks. --rmk
10 */
11
23f9b317 12#include <linux/smp.h>
1da177e4 13
06fcb0c6 14#ifndef CONFIG_S390
1da177e4
LT
15
16#include <linux/linkage.h>
17#include <linux/cache.h>
18#include <linux/spinlock.h>
19#include <linux/cpumask.h>
908dcecd 20#include <linux/irqreturn.h>
dd3a1db9 21#include <linux/irqnr.h>
77904fd6 22#include <linux/errno.h>
1da177e4
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23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
7d12e780 26#include <asm/irq_regs.h>
1da177e4 27
57a58a94 28struct irq_desc;
ec701584 29typedef void (*irq_flow_handler_t)(unsigned int irq,
7d12e780 30 struct irq_desc *desc);
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31
32
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33/*
34 * IRQ line status.
6e213616 35 *
950f4427 36 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
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37 *
38 * IRQ types
1da177e4 39 */
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40#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
41#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
42#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
43#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
44#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
45#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
46#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
47#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
48
49/* Internal flags */
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50#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
51#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
52#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
53#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
54#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
55#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
56#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
57#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
58#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
59#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
60#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
61#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
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62#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
63#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
64#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
1adb0850 65#define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
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TG
66#define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
67#define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
950f4427 68
0d7012a9 69#ifdef CONFIG_IRQ_PER_CPU
f26fdd59 70# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
950f4427 71# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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72#else
73# define CHECK_IRQ_PER_CPU(var) 0
950f4427 74# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
f26fdd59 75#endif
1da177e4 76
6a6de9ef 77struct proc_dir_entry;
5b912c10 78struct msi_desc;
6a6de9ef 79
8fee5c36 80/**
6a6de9ef 81 * struct irq_chip - hardware interrupt chip descriptor
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82 *
83 * @name: name for /proc/interrupts
84 * @startup: start up the interrupt (defaults to ->enable if NULL)
85 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
86 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
87 * @disable: disable the interrupt (defaults to chip->mask if NULL)
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88 * @ack: start of a new interrupt
89 * @mask: mask an interrupt source
90 * @mask_ack: ack and mask an interrupt source
91 * @unmask: unmask an interrupt source
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92 * @eoi: end of interrupt - chip level
93 * @end: end of interrupt - flow level
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94 * @set_affinity: set the CPU affinity on SMP machines
95 * @retrigger: resend an IRQ to the CPU
96 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
97 * @set_wake: enable/disable power-management wake-on of an IRQ
98 *
99 * @release: release function solely used by UML
6a6de9ef 100 * @typename: obsoleted by name, kept as migration helper
1da177e4 101 */
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102struct irq_chip {
103 const char *name;
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104 unsigned int (*startup)(unsigned int irq);
105 void (*shutdown)(unsigned int irq);
106 void (*enable)(unsigned int irq);
107 void (*disable)(unsigned int irq);
6a6de9ef 108
71d218b7 109 void (*ack)(unsigned int irq);
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110 void (*mask)(unsigned int irq);
111 void (*mask_ack)(unsigned int irq);
112 void (*unmask)(unsigned int irq);
47c2a3aa 113 void (*eoi)(unsigned int irq);
6a6de9ef 114
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115 void (*end)(unsigned int irq);
116 void (*set_affinity)(unsigned int irq, cpumask_t dest);
c0ad90a3 117 int (*retrigger)(unsigned int irq);
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118 int (*set_type)(unsigned int irq, unsigned int flow_type);
119 int (*set_wake)(unsigned int irq, unsigned int on);
c0ad90a3 120
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121 /* Currently used only by UML, might disappear one day.*/
122#ifdef CONFIG_IRQ_RELEASE_METHOD
71d218b7 123 void (*release)(unsigned int irq, void *dev_id);
b77d6adc 124#endif
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125 /*
126 * For compatibility, ->typename is copied into ->name.
127 * Will disappear.
128 */
129 const char *typename;
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130};
131
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132struct timer_rand_state;
133struct irq_2_iommu;
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134/**
135 * struct irq_desc - interrupt descriptor
2ed1cdcf 136 * @irq: interrupt number for this descriptor
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TG
137 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
138 * @chip: low level interrupt hardware access
472900b8 139 * @msi_desc: MSI descriptor
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TG
140 * @handler_data: per-IRQ data for the irq_chip methods
141 * @chip_data: platform-specific per-chip private data for the chip
142 * methods, to allow shared chip implementations
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143 * @action: the irq action chain
144 * @status: status information
145 * @depth: disable-depth, for nested irq_disable() calls
15a647eb 146 * @wake_depth: enable depth, for multiple set_irq_wake() callers
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147 * @irq_count: stats field to detect stalled irqs
148 * @irqs_unhandled: stats field for spurious unhandled interrupts
5ac4d823 149 * @last_unhandled: aging timer for unhandled count
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150 * @lock: locking for SMP
151 * @affinity: IRQ affinity on SMP
6a6de9ef 152 * @cpu: cpu index useful for balancing
8fee5c36 153 * @pending_mask: pending rebalanced interrupts
8fee5c36 154 * @dir: /proc/irq/ procfs entry
a460e745 155 * @name: flow handler name for /proc/interrupts output
1da177e4 156 */
34ffdb72 157struct irq_desc {
08678b08 158 unsigned int irq;
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159#ifdef CONFIG_SPARSE_IRQ
160 struct timer_rand_state *timer_rand_state;
161 unsigned int *kstat_irqs;
162# ifdef CONFIG_INTR_REMAP
163 struct irq_2_iommu *irq_2_iommu;
164# endif
165#endif
57a58a94 166 irq_flow_handler_t handle_irq;
6a6de9ef 167 struct irq_chip *chip;
5b912c10 168 struct msi_desc *msi_desc;
6a6de9ef 169 void *handler_data;
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IM
170 void *chip_data;
171 struct irqaction *action; /* IRQ action list */
172 unsigned int status; /* IRQ status */
6a6de9ef 173
71d218b7 174 unsigned int depth; /* nested irq disables */
15a647eb 175 unsigned int wake_depth; /* nested wake enables */
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IM
176 unsigned int irq_count; /* For detecting broken IRQs */
177 unsigned int irqs_unhandled;
4f27c00b 178 unsigned long last_unhandled; /* Aging timer for unhandled count */
71d218b7 179 spinlock_t lock;
a53da52f 180#ifdef CONFIG_SMP
71d218b7 181 cpumask_t affinity;
6a6de9ef 182 unsigned int cpu;
a53da52f 183#endif
8b8e8c1b 184#ifdef CONFIG_GENERIC_PENDING_IRQ
cd916d31 185 cpumask_t pending_mask;
54d5d424 186#endif
4a733ee1 187#ifdef CONFIG_PROC_FS
a460e745 188 struct proc_dir_entry *dir;
4a733ee1 189#endif
a460e745 190 const char *name;
e729aa16 191} ____cacheline_internodealigned_in_smp;
1da177e4 192
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193extern void early_irq_init(void);
194extern void arch_early_irq_init(void);
195extern void arch_init_chip_data(struct irq_desc *desc, int cpu);
196extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
197 struct irq_desc *desc, int cpu);
198extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
199
200#ifndef CONFIG_SPARSE_IRQ
9059d8fa 201
34ffdb72 202extern struct irq_desc irq_desc[NR_IRQS];
9059d8fa 203
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204static inline struct irq_desc *irq_to_desc(unsigned int irq)
205{
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206 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
207}
208static inline struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
209{
210 return irq_to_desc(irq);
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211}
212
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213#ifdef CONFIG_GENERIC_HARDIRQS
214# define for_each_irq_desc(irq, desc) \
215 for (irq = 0, desc = irq_desc; irq < nr_irqs; irq++, desc++)
216# define for_each_irq_desc_reverse(irq, desc) \
217 for (irq = nr_irqs - 1, desc = irq_desc + (nr_irqs - 1); \
218 irq >= 0; irq--, desc--)
219#endif
220
221#else
222
223extern struct irq_desc *irq_to_desc(unsigned int irq);
224extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu);
225extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu);
226
227# define for_each_irq_desc(irq, desc) \
228 for (irq = 0, desc = irq_to_desc(irq); irq < nr_irqs; irq++, desc = irq_to_desc(irq))
229# define for_each_irq_desc_reverse(irq, desc) \
230 for (irq = nr_irqs - 1, desc = irq_to_desc(irq); irq >= 0; irq--, desc = irq_to_desc(irq))
231
232#define kstat_irqs_this_cpu(DESC) \
233 ((DESC)->kstat_irqs[smp_processor_id()])
234#define kstat_incr_irqs_this_cpu(irqno, DESC) \
235 ((DESC)->kstat_irqs[smp_processor_id()]++)
236
237#endif
238
34ffdb72
IM
239/*
240 * Migration helpers for obsolete names, they will go away:
241 */
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242#define hw_interrupt_type irq_chip
243typedef struct irq_chip hw_irq_controller;
244#define no_irq_type no_irq_chip
34ffdb72
IM
245typedef struct irq_desc irq_desc_t;
246
247/*
248 * Pick up the arch-dependent methods:
249 */
250#include <asm/hw_irq.h>
1da177e4 251
06fcb0c6 252extern int setup_irq(unsigned int irq, struct irqaction *new);
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LT
253
254#ifdef CONFIG_GENERIC_HARDIRQS
06fcb0c6 255
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AR
256#ifdef CONFIG_SMP
257
8b8e8c1b 258#ifdef CONFIG_GENERIC_PENDING_IRQ
54d5d424 259
c777ac55 260void move_native_irq(int irq);
e7b946e9 261void move_masked_irq(int irq);
54d5d424 262
8b8e8c1b 263#else /* CONFIG_GENERIC_PENDING_IRQ */
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264
265static inline void move_irq(int irq)
266{
267}
268
269static inline void move_native_irq(int irq)
270{
271}
272
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273static inline void move_masked_irq(int irq)
274{
275}
276
06fcb0c6 277#endif /* CONFIG_GENERIC_PENDING_IRQ */
54d5d424 278
06fcb0c6 279#else /* CONFIG_SMP */
54d5d424 280
54d5d424 281#define move_native_irq(x)
e7b946e9 282#define move_masked_irq(x)
54d5d424 283
06fcb0c6 284#endif /* CONFIG_SMP */
54d5d424 285
1da177e4 286extern int no_irq_affinity;
1da177e4 287
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288static inline int irq_balancing_disabled(unsigned int irq)
289{
08678b08
YL
290 struct irq_desc *desc;
291
292 desc = irq_to_desc(irq);
293 return desc->status & IRQ_NO_BALANCING_MASK;
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294}
295
6a6de9ef 296/* Handle irq action chains: */
7d12e780 297extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
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298
299/*
300 * Built-in IRQ handlers for various IRQ types,
301 * callable via desc->chip->handle_irq()
302 */
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303extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
304extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
305extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
306extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
307extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
308extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
6a6de9ef 309
2e60bbb6 310/*
6a6de9ef 311 * Monolithic do_IRQ implementation.
2e60bbb6 312 */
af8c65b5 313#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
ec701584 314extern unsigned int __do_IRQ(unsigned int irq);
af8c65b5 315#endif
2e60bbb6 316
dae86204
IM
317/*
318 * Architectures call this to let the generic IRQ layer
319 * handle an interrupt. If the descriptor is attached to an
320 * irqchip-style controller then we call the ->handle_irq() handler,
321 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
322 */
46926b67 323static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
dae86204 324{
af8c65b5 325#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
7d12e780 326 desc->handle_irq(irq, desc);
af8c65b5 327#else
dae86204 328 if (likely(desc->handle_irq))
7d12e780 329 desc->handle_irq(irq, desc);
dae86204 330 else
7d12e780 331 __do_IRQ(irq);
af8c65b5 332#endif
dae86204
IM
333}
334
46926b67
YL
335static inline void generic_handle_irq(unsigned int irq)
336{
337 generic_handle_irq_desc(irq, irq_to_desc(irq));
338}
339
6a6de9ef 340/* Handling of unhandled and spurious interrupts: */
34ffdb72 341extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
7d12e780 342 int action_ret);
1da177e4 343
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TG
344/* Resending of interrupts :*/
345void check_irq_resend(struct irq_desc *desc, unsigned int irq);
346
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347/* Enable/disable irq debugging output: */
348extern int noirqdebug_setup(char *str);
349
350/* Checks whether the interrupt can be requested by request_irq(): */
351extern int can_request_irq(unsigned int irq, unsigned long irqflags);
352
f8b5473f 353/* Dummy irq-chip implementations: */
6a6de9ef 354extern struct irq_chip no_irq_chip;
f8b5473f 355extern struct irq_chip dummy_irq_chip;
6a6de9ef 356
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IM
357extern void
358set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
359 irq_flow_handler_t handle);
6a6de9ef 360extern void
a460e745
IM
361set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
362 irq_flow_handler_t handle, const char *name);
363
6a6de9ef 364extern void
a460e745
IM
365__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
366 const char *name);
1da177e4 367
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368/* caller has locked the irq_desc and both params are valid */
369static inline void __set_irq_handler_unlocked(int irq,
370 irq_flow_handler_t handler)
371{
08678b08
YL
372 struct irq_desc *desc;
373
374 desc = irq_to_desc(irq);
375 desc->handle_irq = handler;
b019e573
KH
376}
377
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TG
378/*
379 * Set a highlevel flow handler for a given IRQ:
380 */
381static inline void
57a58a94 382set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
6a6de9ef 383{
a460e745 384 __set_irq_handler(irq, handle, 0, NULL);
6a6de9ef
TG
385}
386
387/*
388 * Set a highlevel chained flow handler for a given IRQ.
389 * (a chained handler is automatically enabled and set to
390 * IRQ_NOREQUEST and IRQ_NOPROBE)
391 */
392static inline void
393set_irq_chained_handler(unsigned int irq,
57a58a94 394 irq_flow_handler_t handle)
6a6de9ef 395{
a460e745 396 __set_irq_handler(irq, handle, 1, NULL);
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TG
397}
398
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399extern void set_irq_noprobe(unsigned int irq);
400extern void set_irq_probe(unsigned int irq);
401
3a16d713 402/* Handle dynamic irq creation and destruction */
6d50bc26 403extern unsigned int create_irq_nr(unsigned int irq_want);
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EB
404extern int create_irq(void);
405extern void destroy_irq(unsigned int irq);
406
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407/* Test to see if a driver has successfully requested an irq */
408static inline int irq_has_action(unsigned int irq)
409{
08678b08 410 struct irq_desc *desc = irq_to_desc(irq);
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EB
411 return desc->action != NULL;
412}
413
3a16d713
EB
414/* Dynamic irq helper functions */
415extern void dynamic_irq_init(unsigned int irq);
416extern void dynamic_irq_cleanup(unsigned int irq);
dd87eb3a 417
3a16d713 418/* Set/get chip/data for an IRQ: */
dd87eb3a
TG
419extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
420extern int set_irq_data(unsigned int irq, void *data);
421extern int set_irq_chip_data(unsigned int irq, void *data);
422extern int set_irq_type(unsigned int irq, unsigned int type);
5b912c10 423extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
dd87eb3a 424
08678b08
YL
425#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
426#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
427#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
428#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
dd87eb3a 429
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YL
430#define get_irq_desc_chip(desc) ((desc)->chip)
431#define get_irq_desc_chip_data(desc) ((desc)->chip_data)
432#define get_irq_desc_data(desc) ((desc)->handler_data)
433#define get_irq_desc_msi(desc) ((desc)->msi_desc)
434
6a6de9ef 435#endif /* CONFIG_GENERIC_HARDIRQS */
1da177e4 436
06fcb0c6 437#endif /* !CONFIG_S390 */
1da177e4 438
06fcb0c6 439#endif /* _LINUX_IRQ_H */
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