[deliverable/linux.git] / include / linux / irq.h

#ifndef _LINUX_IRQ_H
#define _LINUX_IRQ_H

/*
 * Please do not include this file in generic code.  There is currently
 * no requirement for any architecture to implement anything held
 * within this file.
 *
 * Thanks. --rmk
 */

#include <linux/smp.h>

#ifndef CONFIG_S390

#include <linux/linkage.h>
#include <linux/cache.h>
#include <linux/spinlock.h>
#include <linux/cpumask.h>
#include <linux/irqreturn.h>
#include <linux/errno.h>

#include <asm/irq.h>
#include <asm/ptrace.h>
#include <asm/irq_regs.h>

struct irq_desc;
typedef	void fastcall (*irq_flow_handler_t)(unsigned int irq,
					    struct irq_desc *desc);


/*
 * IRQ line status.
 *
 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
 *
 * IRQ types
 */
#define IRQ_TYPE_NONE		0x00000000	/* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING	0x00000001	/* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING	0x00000002	/* Edge falling type */
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH	0x00000004	/* Level high type */
#define IRQ_TYPE_LEVEL_LOW	0x00000008	/* Level low type */
#define IRQ_TYPE_SENSE_MASK	0x0000000f	/* Mask of the above */
#define IRQ_TYPE_PROBE		0x00000010	/* Probing in progress */

/* Internal flags */
#define IRQ_INPROGRESS		0x00000100	/* IRQ handler active - do not enter! */
#define IRQ_DISABLED		0x00000200	/* IRQ disabled - do not enter! */
#define IRQ_PENDING		0x00000400	/* IRQ pending - replay on enable */
#define IRQ_REPLAY		0x00000800	/* IRQ has been replayed but not acked yet */
#define IRQ_AUTODETECT		0x00001000	/* IRQ is being autodetected */
#define IRQ_WAITING		0x00002000	/* IRQ not yet seen - for autodetection */
#define IRQ_LEVEL		0x00004000	/* IRQ level triggered */
#define IRQ_MASKED		0x00008000	/* IRQ masked - shouldn't be seen again */
#define IRQ_PER_CPU		0x00010000	/* IRQ is per CPU */
#define IRQ_NOPROBE		0x00020000	/* IRQ is not valid for probing */
#define IRQ_NOREQUEST		0x00040000	/* IRQ cannot be requested */
#define IRQ_NOAUTOEN		0x00080000	/* IRQ will not be enabled on request irq */
#define IRQ_WAKEUP		0x00100000	/* IRQ triggers system wakeup */
#define IRQ_MOVE_PENDING	0x00200000	/* need to re-target IRQ destination */
#define IRQ_NO_BALANCING	0x00400000	/* IRQ is excluded from balancing */

#ifdef CONFIG_IRQ_PER_CPU
# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
# define IRQ_NO_BALANCING_MASK	(IRQ_PER_CPU | IRQ_NO_BALANCING)
#else
# define CHECK_IRQ_PER_CPU(var) 0
# define IRQ_NO_BALANCING_MASK	IRQ_NO_BALANCING
#endif

struct proc_dir_entry;
struct msi_desc;

/**
 * struct irq_chip - hardware interrupt chip descriptor
 *
 * @name:		name for /proc/interrupts
 * @startup:		start up the interrupt (defaults to ->enable if NULL)
 * @shutdown:		shut down the interrupt (defaults to ->disable if NULL)
 * @enable:		enable the interrupt (defaults to chip->unmask if NULL)
 * @disable:		disable the interrupt (defaults to chip->mask if NULL)
 * @ack:		start of a new interrupt
 * @mask:		mask an interrupt source
 * @mask_ack:		ack and mask an interrupt source
 * @unmask:		unmask an interrupt source
 * @eoi:		end of interrupt - chip level
 * @end:		end of interrupt - flow level
 * @set_affinity:	set the CPU affinity on SMP machines
 * @retrigger:		resend an IRQ to the CPU
 * @set_type:		set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
 * @set_wake:		enable/disable power-management wake-on of an IRQ
 *
 * @release:		release function solely used by UML
 * @typename:		obsoleted by name, kept as migration helper
 */
struct irq_chip {
	const char	*name;
	unsigned int	(*startup)(unsigned int irq);
	void		(*shutdown)(unsigned int irq);
	void		(*enable)(unsigned int irq);
	void		(*disable)(unsigned int irq);

	void		(*ack)(unsigned int irq);
	void		(*mask)(unsigned int irq);
	void		(*mask_ack)(unsigned int irq);
	void		(*unmask)(unsigned int irq);
	void		(*eoi)(unsigned int irq);

	void		(*end)(unsigned int irq);
	void		(*set_affinity)(unsigned int irq, cpumask_t dest);
	int		(*retrigger)(unsigned int irq);
	int		(*set_type)(unsigned int irq, unsigned int flow_type);
	int		(*set_wake)(unsigned int irq, unsigned int on);

	/* Currently used only by UML, might disappear one day.*/
#ifdef CONFIG_IRQ_RELEASE_METHOD
	void		(*release)(unsigned int irq, void *dev_id);
#endif
	/*
	 * For compatibility, ->typename is copied into ->name.
	 * Will disappear.
	 */
	const char	*typename;
};

/**
 * struct irq_desc - interrupt descriptor
 *
 * @handle_irq:		highlevel irq-events handler [if NULL, __do_IRQ()]
 * @chip:		low level interrupt hardware access
 * @msi_desc:		MSI descriptor
 * @handler_data:	per-IRQ data for the irq_chip methods
 * @chip_data:		platform-specific per-chip private data for the chip
 *			methods, to allow shared chip implementations
 * @action:		the irq action chain
 * @status:		status information
 * @depth:		disable-depth, for nested irq_disable() calls
 * @wake_depth:		enable depth, for multiple set_irq_wake() callers
 * @irq_count:		stats field to detect stalled irqs
 * @irqs_unhandled:	stats field for spurious unhandled interrupts
 * @lock:		locking for SMP
 * @affinity:		IRQ affinity on SMP
 * @cpu:		cpu index useful for balancing
 * @pending_mask:	pending rebalanced interrupts
 * @dir:		/proc/irq/ procfs entry
 * @affinity_entry:	/proc/irq/smp_affinity procfs entry on SMP
 * @name:		flow handler name for /proc/interrupts output
 *
 * Pad this out to 32 bytes for cache and indexing reasons.
 */
struct irq_desc {
	irq_flow_handler_t	handle_irq;
	struct irq_chip		*chip;
	struct msi_desc		*msi_desc;
	void			*handler_data;
	void			*chip_data;
	struct irqaction	*action;	/* IRQ action list */
	unsigned int		status;		/* IRQ status */

	unsigned int		depth;		/* nested irq disables */
	unsigned int		wake_depth;	/* nested wake enables */
	unsigned int		irq_count;	/* For detecting broken IRQs */
	unsigned int		irqs_unhandled;
	spinlock_t		lock;
#ifdef CONFIG_SMP
	cpumask_t		affinity;
	unsigned int		cpu;
#endif
#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
	cpumask_t		pending_mask;
#endif
#ifdef CONFIG_PROC_FS
	struct proc_dir_entry	*dir;
#endif
	const char		*name;
} ____cacheline_aligned;

extern struct irq_desc irq_desc[NR_IRQS];

/*
 * Migration helpers for obsolete names, they will go away:
 */
#define hw_interrupt_type	irq_chip
typedef struct irq_chip		hw_irq_controller;
#define no_irq_type		no_irq_chip
typedef struct irq_desc		irq_desc_t;

/*
 * Pick up the arch-dependent methods:
 */
#include <asm/hw_irq.h>

extern int setup_irq(unsigned int irq, struct irqaction *new);

#ifdef CONFIG_GENERIC_HARDIRQS

#ifndef handle_dynamic_tick
# define handle_dynamic_tick(a)		do { } while (0)
#endif

#ifdef CONFIG_SMP

#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)

void set_pending_irq(unsigned int irq, cpumask_t mask);
void move_native_irq(int irq);
void move_masked_irq(int irq);

#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */

static inline void move_irq(int irq)
{
}

static inline void move_native_irq(int irq)
{
}

static inline void move_masked_irq(int irq)
{
}

static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
{
}

#endif /* CONFIG_GENERIC_PENDING_IRQ */

extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
extern int irq_can_set_affinity(unsigned int irq);

#else /* CONFIG_SMP */

#define move_native_irq(x)
#define move_masked_irq(x)

static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
{
	return -EINVAL;
}

static inline int irq_can_set_affinity(unsigned int irq) { return 0; }

#endif /* CONFIG_SMP */

#ifdef CONFIG_IRQBALANCE
extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
#else
static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
{
}
#endif

#ifdef CONFIG_AUTO_IRQ_AFFINITY
extern int select_smp_affinity(unsigned int irq);
#else
static inline int select_smp_affinity(unsigned int irq)
{
	return 1;
}
#endif

extern int no_irq_affinity;

static inline int irq_balancing_disabled(unsigned int irq)
{
	return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
}

/* Handle irq action chains: */
extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);

/*
 * Built-in IRQ handlers for various IRQ types,
 * callable via desc->chip->handle_irq()
 */
extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc);

/*
 * Monolithic do_IRQ implementation.
 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
 */
#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
extern fastcall unsigned int __do_IRQ(unsigned int irq);
#endif

/*
 * Architectures call this to let the generic IRQ layer
 * handle an interrupt. If the descriptor is attached to an
 * irqchip-style controller then we call the ->handle_irq() handler,
 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
 */
static inline void generic_handle_irq(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;

#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
	desc->handle_irq(irq, desc);
#else
	if (likely(desc->handle_irq))
		desc->handle_irq(irq, desc);
	else
		__do_IRQ(irq);
#endif
}

/* Handling of unhandled and spurious interrupts: */
extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
			   int action_ret);

/* Resending of interrupts :*/
void check_irq_resend(struct irq_desc *desc, unsigned int irq);

/* Enable/disable irq debugging output: */
extern int noirqdebug_setup(char *str);

/* Checks whether the interrupt can be requested by request_irq(): */
extern int can_request_irq(unsigned int irq, unsigned long irqflags);

/* Dummy irq-chip implementations: */
extern struct irq_chip no_irq_chip;
extern struct irq_chip dummy_irq_chip;

extern void
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
			 irq_flow_handler_t handle);
extern void
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
			      irq_flow_handler_t handle, const char *name);

extern void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
		  const char *name);

/*
 * Set a highlevel flow handler for a given IRQ:
 */
static inline void
set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
{
	__set_irq_handler(irq, handle, 0, NULL);
}

/*
 * Set a highlevel chained flow handler for a given IRQ.
 * (a chained handler is automatically enabled and set to
 *  IRQ_NOREQUEST and IRQ_NOPROBE)
 */
static inline void
set_irq_chained_handler(unsigned int irq,
			irq_flow_handler_t handle)
{
	__set_irq_handler(irq, handle, 1, NULL);
}

/* Handle dynamic irq creation and destruction */
extern int create_irq(void);
extern void destroy_irq(unsigned int irq);

/* Test to see if a driver has successfully requested an irq */
static inline int irq_has_action(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;
	return desc->action != NULL;
}

/* Dynamic irq helper functions */
extern void dynamic_irq_init(unsigned int irq);
extern void dynamic_irq_cleanup(unsigned int irq);

/* Set/get chip/data for an IRQ: */
extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
extern int set_irq_data(unsigned int irq, void *data);
extern int set_irq_chip_data(unsigned int irq, void *data);
extern int set_irq_type(unsigned int irq, unsigned int type);
extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);

#define get_irq_chip(irq)	(irq_desc[irq].chip)
#define get_irq_chip_data(irq)	(irq_desc[irq].chip_data)
#define get_irq_data(irq)	(irq_desc[irq].handler_data)
#define get_irq_msi(irq)	(irq_desc[irq].msi_desc)

#endif /* CONFIG_GENERIC_HARDIRQS */

#endif /* !CONFIG_S390 */

#endif /* _LINUX_IRQ_H */
Commit	Line	Data
06fcb0c6 IM	1	#ifndef _LINUX_IRQ_H
06fcb0c6 IM	2	#define _LINUX_IRQ_H
1da177e4 LT	3
	4	/*
	5	* Please do not include this file in generic code. There is currently
	6	* no requirement for any architecture to implement anything held
	7	* within this file.
	8	*
	9	* Thanks. --rmk
	10	*/
	11
23f9b317	12	#include <linux/smp.h>
1da177e4	13
06fcb0c6	14	#ifndef CONFIG_S390
1da177e4 LT	15
	16	#include <linux/linkage.h>
	17	#include <linux/cache.h>
	18	#include <linux/spinlock.h>
	19	#include <linux/cpumask.h>
908dcecd	20	#include <linux/irqreturn.h>
77904fd6	21	#include <linux/errno.h>
1da177e4 LT	22
	23	#include <asm/irq.h>
	24	#include <asm/ptrace.h>
7d12e780	25	#include <asm/irq_regs.h>
1da177e4	26
57a58a94 DH	27	struct irq_desc;
57a58a94 DH	28	typedef void fastcall (*irq_flow_handler_t)(unsigned int irq,
7d12e780	29	struct irq_desc *desc);
57a58a94 DH	30
57a58a94 DH	31
1da177e4 LT	32	/*
1da177e4 LT	33	* IRQ line status.
6e213616	34	*
950f4427	35	* Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
6e213616 TG	36	*
6e213616 TG	37	* IRQ types
1da177e4	38	*/
6e213616 TG	39	#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
	40	#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
	41	#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
	42	#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING \| IRQ_TYPE_EDGE_RISING)
	43	#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
	44	#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
	45	#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
	46	#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
	47
	48	/* Internal flags */
950f4427 TG	49	#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
	50	#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
	51	#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
	52	#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
	53	#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
	54	#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
	55	#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
	56	#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
	57	#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
	58	#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
	59	#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
	60	#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
d7e25f33 IM	61	#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
	62	#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
	63	#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
950f4427	64
0d7012a9	65	#ifdef CONFIG_IRQ_PER_CPU
f26fdd59	66	# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
950f4427	67	# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU \| IRQ_NO_BALANCING)
f26fdd59 KW	68	#else
f26fdd59 KW	69	# define CHECK_IRQ_PER_CPU(var) 0
950f4427	70	# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
f26fdd59	71	#endif
1da177e4	72
6a6de9ef	73	struct proc_dir_entry;
5b912c10	74	struct msi_desc;
6a6de9ef	75
8fee5c36	76	/**
6a6de9ef	77	* struct irq_chip - hardware interrupt chip descriptor
8fee5c36 IM	78	*
	79	* @name: name for /proc/interrupts
	80	* @startup: start up the interrupt (defaults to ->enable if NULL)
	81	* @shutdown: shut down the interrupt (defaults to ->disable if NULL)
	82	* @enable: enable the interrupt (defaults to chip->unmask if NULL)
	83	* @disable: disable the interrupt (defaults to chip->mask if NULL)
8fee5c36 IM	84	* @ack: start of a new interrupt
	85	* @mask: mask an interrupt source
	86	* @mask_ack: ack and mask an interrupt source
	87	* @unmask: unmask an interrupt source
47c2a3aa IM	88	* @eoi: end of interrupt - chip level
47c2a3aa IM	89	* @end: end of interrupt - flow level
8fee5c36 IM	90	* @set_affinity: set the CPU affinity on SMP machines
	91	* @retrigger: resend an IRQ to the CPU
	92	* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
	93	* @set_wake: enable/disable power-management wake-on of an IRQ
	94	*
	95	* @release: release function solely used by UML
6a6de9ef	96	* @typename: obsoleted by name, kept as migration helper
1da177e4	97	*/
6a6de9ef TG	98	struct irq_chip {
6a6de9ef TG	99	const char *name;
71d218b7 IM	100	unsigned int (*startup)(unsigned int irq);
	101	void (*shutdown)(unsigned int irq);
	102	void (*enable)(unsigned int irq);
	103	void (*disable)(unsigned int irq);
6a6de9ef	104
71d218b7	105	void (*ack)(unsigned int irq);
6a6de9ef TG	106	void (*mask)(unsigned int irq);
	107	void (*mask_ack)(unsigned int irq);
	108	void (*unmask)(unsigned int irq);
47c2a3aa	109	void (*eoi)(unsigned int irq);
6a6de9ef	110
71d218b7 IM	111	void (*end)(unsigned int irq);
71d218b7 IM	112	void (*set_affinity)(unsigned int irq, cpumask_t dest);
c0ad90a3	113	int (*retrigger)(unsigned int irq);
6a6de9ef TG	114	int (*set_type)(unsigned int irq, unsigned int flow_type);
6a6de9ef TG	115	int (*set_wake)(unsigned int irq, unsigned int on);
c0ad90a3	116
b77d6adc PBG	117	/* Currently used only by UML, might disappear one day.*/
b77d6adc PBG	118	#ifdef CONFIG_IRQ_RELEASE_METHOD
71d218b7	119	void (release)(unsigned int irq, void dev_id);
b77d6adc	120	#endif
6a6de9ef TG	121	/*
	122	* For compatibility, ->typename is copied into ->name.
	123	* Will disappear.
	124	*/
	125	const char *typename;
1da177e4 LT	126	};
1da177e4 LT	127
8fee5c36 IM	128	/**
	129	* struct irq_desc - interrupt descriptor
	130	*
6a6de9ef TG	131	* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
6a6de9ef TG	132	* @chip: low level interrupt hardware access
472900b8	133	* @msi_desc: MSI descriptor
6a6de9ef TG	134	* @handler_data: per-IRQ data for the irq_chip methods
	135	* @chip_data: platform-specific per-chip private data for the chip
	136	* methods, to allow shared chip implementations
8fee5c36 IM	137	* @action: the irq action chain
	138	* @status: status information
	139	* @depth: disable-depth, for nested irq_disable() calls
15a647eb	140	* @wake_depth: enable depth, for multiple set_irq_wake() callers
8fee5c36 IM	141	* @irq_count: stats field to detect stalled irqs
	142	* @irqs_unhandled: stats field for spurious unhandled interrupts
	143	* @lock: locking for SMP
	144	* @affinity: IRQ affinity on SMP
6a6de9ef	145	* @cpu: cpu index useful for balancing
8fee5c36	146	* @pending_mask: pending rebalanced interrupts
8fee5c36 IM	147	* @dir: /proc/irq/ procfs entry
8fee5c36 IM	148	* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
a460e745	149	* @name: flow handler name for /proc/interrupts output
1da177e4 LT	150	*
	151	* Pad this out to 32 bytes for cache and indexing reasons.
	152	*/
34ffdb72	153	struct irq_desc {
57a58a94	154	irq_flow_handler_t handle_irq;
6a6de9ef	155	struct irq_chip *chip;
5b912c10	156	struct msi_desc *msi_desc;
6a6de9ef	157	void *handler_data;
71d218b7 IM	158	void *chip_data;
	159	struct irqaction action; / IRQ action list */
	160	unsigned int status; /* IRQ status */
6a6de9ef	161
71d218b7	162	unsigned int depth; /* nested irq disables */
15a647eb	163	unsigned int wake_depth; /* nested wake enables */
71d218b7 IM	164	unsigned int irq_count; /* For detecting broken IRQs */
	165	unsigned int irqs_unhandled;
	166	spinlock_t lock;
a53da52f	167	#ifdef CONFIG_SMP
71d218b7	168	cpumask_t affinity;
6a6de9ef	169	unsigned int cpu;
a53da52f	170	#endif
06fcb0c6	171	#if defined(CONFIG_GENERIC_PENDING_IRQ) \|\| defined(CONFIG_IRQBALANCE)
cd916d31	172	cpumask_t pending_mask;
54d5d424	173	#endif
4a733ee1	174	#ifdef CONFIG_PROC_FS
a460e745	175	struct proc_dir_entry *dir;
4a733ee1	176	#endif
a460e745	177	const char *name;
34ffdb72	178	} ____cacheline_aligned;
1da177e4	179
34ffdb72	180	extern struct irq_desc irq_desc[NR_IRQS];
1da177e4	181
34ffdb72 IM	182	/*
	183	* Migration helpers for obsolete names, they will go away:
	184	*/
6a6de9ef TG	185	#define hw_interrupt_type irq_chip
	186	typedef struct irq_chip hw_irq_controller;
	187	#define no_irq_type no_irq_chip
34ffdb72 IM	188	typedef struct irq_desc irq_desc_t;
	189
	190	/*
	191	* Pick up the arch-dependent methods:
	192	*/
	193	#include <asm/hw_irq.h>
1da177e4	194
06fcb0c6	195	extern int setup_irq(unsigned int irq, struct irqaction *new);
1da177e4 LT	196
1da177e4 LT	197	#ifdef CONFIG_GENERIC_HARDIRQS
06fcb0c6	198
d061daa0 TG	199	#ifndef handle_dynamic_tick
	200	# define handle_dynamic_tick(a) do { } while (0)
	201	#endif
	202
54d5d424 AR	203	#ifdef CONFIG_SMP
54d5d424 AR	204
06fcb0c6	205	#if defined(CONFIG_GENERIC_PENDING_IRQ) \|\| defined(CONFIG_IRQBALANCE)
54d5d424	206
c777ac55 AM	207	void set_pending_irq(unsigned int irq, cpumask_t mask);
c777ac55 AM	208	void move_native_irq(int irq);
e7b946e9	209	void move_masked_irq(int irq);
54d5d424	210
06fcb0c6 IM	211	#else /* CONFIG_GENERIC_PENDING_IRQ \|\| CONFIG_IRQBALANCE */
	212
	213	static inline void move_irq(int irq)
	214	{
	215	}
	216
	217	static inline void move_native_irq(int irq)
	218	{
	219	}
	220
e7b946e9 EB	221	static inline void move_masked_irq(int irq)
	222	{
	223	}
	224
06fcb0c6 IM	225	static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
	226	{
	227	}
54d5d424	228
06fcb0c6	229	#endif /* CONFIG_GENERIC_PENDING_IRQ */
54d5d424	230
771ee3b0 TG	231	extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
	232	extern int irq_can_set_affinity(unsigned int irq);
	233
06fcb0c6	234	#else /* CONFIG_SMP */
54d5d424	235
54d5d424	236	#define move_native_irq(x)
e7b946e9	237	#define move_masked_irq(x)
54d5d424	238
771ee3b0 TG	239	static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
	240	{
	241	return -EINVAL;
	242	}
	243
	244	static inline int irq_can_set_affinity(unsigned int irq) { return 0; }
	245
06fcb0c6	246	#endif /* CONFIG_SMP */
54d5d424	247
1b61b910 ZY	248	#ifdef CONFIG_IRQBALANCE
	249	extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
	250	#else
	251	static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
	252	{
	253	}
	254	#endif
	255
71d218b7 IM	256	#ifdef CONFIG_AUTO_IRQ_AFFINITY
	257	extern int select_smp_affinity(unsigned int irq);
	258	#else
	259	static inline int select_smp_affinity(unsigned int irq)
	260	{
	261	return 1;
	262	}
	263	#endif
	264
1da177e4	265	extern int no_irq_affinity;
1da177e4	266
950f4427 TG	267	static inline int irq_balancing_disabled(unsigned int irq)
	268	{
	269	return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
	270	}
	271
6a6de9ef	272	/* Handle irq action chains: */
7d12e780	273	extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
6a6de9ef TG	274
	275	/*
	276	* Built-in IRQ handlers for various IRQ types,
	277	* callable via desc->chip->handle_irq()
	278	*/
7d12e780 DH	279	extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc);
	280	extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
	281	extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc);
	282	extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc);
	283	extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
	284	extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc);
6a6de9ef	285
2e60bbb6	286	/*
6a6de9ef TG	287	* Monolithic do_IRQ implementation.
6a6de9ef TG	288	* (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
2e60bbb6	289	*/
af8c65b5	290	#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
7d12e780	291	extern fastcall unsigned int __do_IRQ(unsigned int irq);
af8c65b5	292	#endif
2e60bbb6	293
dae86204 IM	294	/*
	295	* Architectures call this to let the generic IRQ layer
	296	* handle an interrupt. If the descriptor is attached to an
	297	* irqchip-style controller then we call the ->handle_irq() handler,
	298	* and it calls __do_IRQ() if it's attached to an irqtype-style controller.
	299	*/
7d12e780	300	static inline void generic_handle_irq(unsigned int irq)
dae86204 IM	301	{
	302	struct irq_desc *desc = irq_desc + irq;
	303
af8c65b5	304	#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
7d12e780	305	desc->handle_irq(irq, desc);
af8c65b5	306	#else
dae86204	307	if (likely(desc->handle_irq))
7d12e780	308	desc->handle_irq(irq, desc);
dae86204	309	else
7d12e780	310	__do_IRQ(irq);
af8c65b5	311	#endif
dae86204 IM	312	}
dae86204 IM	313
6a6de9ef	314	/* Handling of unhandled and spurious interrupts: */
34ffdb72	315	extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
7d12e780	316	int action_ret);
1da177e4	317
a4633adc TG	318	/* Resending of interrupts :*/
	319	void check_irq_resend(struct irq_desc *desc, unsigned int irq);
	320
6a6de9ef TG	321	/* Enable/disable irq debugging output: */
	322	extern int noirqdebug_setup(char *str);
	323
	324	/* Checks whether the interrupt can be requested by request_irq(): */
	325	extern int can_request_irq(unsigned int irq, unsigned long irqflags);
	326
f8b5473f	327	/* Dummy irq-chip implementations: */
6a6de9ef	328	extern struct irq_chip no_irq_chip;
f8b5473f	329	extern struct irq_chip dummy_irq_chip;
6a6de9ef	330
145fc655 IM	331	extern void
	332	set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
	333	irq_flow_handler_t handle);
6a6de9ef	334	extern void
a460e745 IM	335	set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
	336	irq_flow_handler_t handle, const char *name);
	337
6a6de9ef	338	extern void
a460e745 IM	339	__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
a460e745 IM	340	const char *name);
1da177e4	341
6a6de9ef TG	342	/*
	343	* Set a highlevel flow handler for a given IRQ:
	344	*/
	345	static inline void
57a58a94	346	set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
6a6de9ef	347	{
a460e745	348	__set_irq_handler(irq, handle, 0, NULL);
6a6de9ef TG	349	}
	350
	351	/*
	352	* Set a highlevel chained flow handler for a given IRQ.
	353	* (a chained handler is automatically enabled and set to
	354	* IRQ_NOREQUEST and IRQ_NOPROBE)
	355	*/
	356	static inline void
	357	set_irq_chained_handler(unsigned int irq,
57a58a94	358	irq_flow_handler_t handle)
6a6de9ef	359	{
a460e745	360	__set_irq_handler(irq, handle, 1, NULL);
6a6de9ef TG	361	}
6a6de9ef TG	362
3a16d713 EB	363	/* Handle dynamic irq creation and destruction */
	364	extern int create_irq(void);
	365	extern void destroy_irq(unsigned int irq);
	366
1f80025e EB	367	/* Test to see if a driver has successfully requested an irq */
	368	static inline int irq_has_action(unsigned int irq)
	369	{
	370	struct irq_desc *desc = irq_desc + irq;
	371	return desc->action != NULL;
	372	}
	373
3a16d713 EB	374	/* Dynamic irq helper functions */
	375	extern void dynamic_irq_init(unsigned int irq);
	376	extern void dynamic_irq_cleanup(unsigned int irq);
dd87eb3a	377
3a16d713	378	/* Set/get chip/data for an IRQ: */
dd87eb3a TG	379	extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
	380	extern int set_irq_data(unsigned int irq, void *data);
	381	extern int set_irq_chip_data(unsigned int irq, void *data);
	382	extern int set_irq_type(unsigned int irq, unsigned int type);
5b912c10	383	extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
dd87eb3a TG	384
	385	#define get_irq_chip(irq) (irq_desc[irq].chip)
	386	#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
	387	#define get_irq_data(irq) (irq_desc[irq].handler_data)
5b912c10	388	#define get_irq_msi(irq) (irq_desc[irq].msi_desc)
dd87eb3a	389
6a6de9ef	390	#endif /* CONFIG_GENERIC_HARDIRQS */
1da177e4	391
06fcb0c6	392	#endif /* !CONFIG_S390 */
1da177e4	393
06fcb0c6	394	#endif /* _LINUX_IRQ_H */